Infineon TLE984x 2024.05.05 SVD file CM0 r0p0 little 2 false 8 32 ADC1 ADC1 ADC1 0x0 0x0 0x50 registers n CAL_CH0_1 Calibration for Channel 0 and 1 0x48 32 read-write n 0x0 0x0 CALGAIN_CH0 Gain Calibration for channel 0 8 7 read-write CALGAIN_CH1 Gain Calibration for channel 1 24 7 read-write CALOFFS_CH0 Offset Calibration for channel 0 0 4 read-write CALOFFS_CH1 Offset Calibration for channel 1 16 4 read-write CAL_CH10_11 Calibration for Channel 10 and 11 0x5C 32 read-write n 0x0 0x0 CALGAIN_CH10 Gain Calibration for channel 10 8 7 read-write CALGAIN_CH11 Gain Calibration for channel 11 24 7 read-write CALOFFS_CH10 Offset Calibration for channel 10 0 4 read-write CALOFFS_CH11 Offset Calibration for channel 11 16 4 read-write CAL_CH2_3 Calibration for Channel 2 and 3 0x4C 32 read-write n 0x0 0x0 CALGAIN_CH2 Gain Calibration for channel 2 8 7 read-write CALGAIN_CH3 Gain Calibration for channel 3 24 7 read-write CALOFFS_CH2 Offset Calibration for channel 2 0 4 read-write CALOFFS_CH3 Offset Calibration for channel 3 16 4 read-write CAL_CH4_5 Calibration for Channel 4 and 5 0x50 32 read-write n 0x0 0x0 CALGAIN_CH4 Gain Calibration for channel 4 8 7 read-write CALGAIN_CH5 Gain Calibration for channel 5 24 7 read-write CALOFFS_CH4 Offset Calibration for channel 4 0 4 read-write CALOFFS_CH5 Offset Calibration for channel 5 16 4 read-write CAL_CH6_7 Calibration for Channel 6 and 7 0x54 32 read-write n 0x0 0x0 CALGAIN_CH6 Gain Calibration for channel 6 8 7 read-write CALGAIN_CH7 Gain Calibration for channel 7 24 7 read-write CALOFFS_CH6 Offset Calibration for channel 6 0 4 read-write CALOFFS_CH7 Offset Calibration for channel 7 16 4 read-write CAL_CH8_9 Calibration for Channel 8 and 9 0x58 32 read-write n 0x0 0x0 CALGAIN_CH8 Gain Calibration for channel 8 8 7 read-write CALGAIN_CH9 Gain Calibration for channel 9 24 7 read-write CALOFFS_CH8 Offset Calibration for channel 8 0 4 read-write CALOFFS_CH9 Offset Calibration for channel 9 16 4 read-write CHx_EIM Channel Setting Bits for Exceptional Interrupt Measurement 0x8 32 read-write n 0x0 0x0 ADC1_EIM_TRIG_SEL Trigger selection for exceptional interrupt measurement (EIM) 16 2 read-write NONE None 0b000 COUT63 None 0b001 GPT12_T6OUT None 0b010 GPT12_T3OUT None 0b011 T2 t2_adc_trigger 0b100 T21 t21_adc_trigger 0b101 EIM_CHx Channel set for exceptional interrupt measurement (EIM) 0 3 read-write CH0_EN Channel 0 enable 0b0000 CH1_EN Channel 1 enable 0b0001 CH2_EN Channel 2 enable 0b0010 CH3_EN Channel 3 enable 0b0011 CH4_EN Channel 4 enable 0b0100 CH5_EN Channel 5 enable 0b0101 CH6_EN Channel 6 enable 0b0110 CH7_EN Channel 7 enable 0b0111 CH8_EN Channel 8 enable 0b1000 CH9_EN Channel 9 enable 0b1001 CH10_EN Channel 10 enable 0b1010 CH11_EN Channel 11 enable 0b1011 rfu reserved for future use 0b1100 EIM_EN Exceptional interrupt measurement (EIM) Trigger Event enable 11 read-write DISABLE start of EIM disabled 0b0 ENABLE start of IEM enabled 0b1 EIM_REP Repeat count for exceptional interrupt measurement (EIM) 8 2 read-write 1 Measurements 0b000 2 Measurements 0b001 4 Measurements 0b010 8 Measurements 0b011 16 Measurements 0b100 32 Measurements 0b101 64 Measurements 0b110 128 Measurements 0b111 CHx_ESM Channel Setting Bits for Exceptional Sequence Measurement 0xC 32 read-write n 0x0 0x0 ADC1_ESM_TRIG_SEL Trigger selection for exceptional interrupt measurement (ESM) 16 2 read-write NONE None 0b000 COUT63 None 0b001 GPT12_T6OUT None 0b010 GPT12_T3OUT None 0b011 T2 t2_adc_trigger 0b100 T21 t21_adc_trigger 0b101 ESM_0 Channel Sequence for Exceptional Sequence Measurement (ESM) 0 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 ESM_EN Enable for Exceptional Sequence Measurement Trigger Event 30 read-write Disable start of ESM disabled 0b0 Enable start of ESM enabled 0b1 ESM_STS Exceptional Sequence Measurement is finished 31 read-write not active Exceptional Sequence Measurement not done 0b0 done Exceptional Sequence Measurement done 0b1 CNT0_3_LOWER Lower Counter Trigger Level Channel 0-3 0xD8 32 read-write n 0x0 0x0 CNT_LO_CH0 Lower timer trigger threshold channel 0 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH1 Lower timer trigger threshold channel 1 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH2 Lower timer trigger threshold channel 2 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH3 Lower timer trigger threshold channel 3 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 HYST_LO_CH0 Channel 0 lower hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH1 Channel 1 lower hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH2 Channel 2 lower hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH3 Channel 3 lower hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 CNT0_3_UPPER Upper Counter Trigger Level Channel 0-3 0xE8 32 read-write n 0x0 0x0 CNT_UP_CH0 Upper timer trigger threshold channel 0 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH1 Upper timer trigger threshold channel 1 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH2 Upper timer trigger threshold channel 2 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH3 Upper timer trigger threshold channel 3 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 HYST_UP_CH0 Channel 0 upper hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH1 Channel 1 upper hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH2 Channel 2 upper hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH3 Channel 3 upper hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 CNT4_7_LOWER Lower Counter Trigger Level Channel 4-7 0xDC 32 read-write n 0x0 0x0 CNT_LO_CH4 Lower timer trigger threshold channel 4 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH5 Lower timer trigger threshold channel 5 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH6 Lower timer trigger threshold channel 6 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH7 Lower timer trigger threshold channel 7 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 HYST_LO_CH4 Channel 4 lower hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH5 Channel 5 lower hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH6 Channel 6 lower hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH7 Channel 7 lower hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 CNT4_7_UPPER Upper Counter Trigger Level Channel 4-7 0xEC 32 read-write n 0x0 0x0 CNT_UP_CH4 Upper timer trigger threshold channel 4 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH5 Upper timer trigger threshold channel 5 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH6 Upper timer trigger threshold channel 6 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH7 Upper timer trigger threshold channel 7 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 HYST_UP_CH4 Channel 4 upper hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH5 Channel 5 upper hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH6 Channel 6 upper hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH7 Channel 7 upper hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 CNT8_11_LOWER Lower Counter Trigger Level Channel 8-11 0xE0 32 read-write n 0x0 0x0 CNT_LO_CH10 Lower timer trigger threshold channel 10 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH11 Lower timer trigger threshold channel 11 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH8 Lower timer trigger threshold channel 8 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH9 Lower timer trigger threshold channel 9 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 HYST_LO_CH10 Channel 10 lower hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH11 Channel 11 lower hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH8 Channel 8 lower hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH9 Channel 9 lower hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 CNT8_11_UPPER Upper Counter Trigger Level Channel 8-11 0xF0 32 read-write n 0x0 0x0 CNT_UP_CH10 Upper timer trigger threshold channel 10 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH11 Upper timer trigger threshold channel 11 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH8 Upper timer trigger threshold channel 8 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH9 Upper timer trigger threshold channel 9 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 HYST_UP_CH10 Channel 10 upper hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH11 Channel 11 upper hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH8 Channel 8 upper hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH9 Channel 9 upper hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 CTRL2 Measurement Unit 1 Control Register 2 0x14 32 read-write n 0x0 0x0 CAL_EN Calibration Enable for Channels 0 to 11 0 11 read-write CH0_EN Channel 0 calibration enable 0b000000000001 CH1_EN Channel 1 calibration enable 0b000000000010 CH2_EN Channel 2 calibration enable 0b000000000100 CH3_EN Channel 3 calibration enable 0b000000001000 CH4_EN Channel 4 calibration enable 0b000000010000 CH5_EN Channel 5 calibration enable 0b000000100000 CH6_EN Channel 6 calibration enable 0b000001000000 CH7_EN Channel 7 calibration enable 0b000010000000 CH8_EN Channel 8 calibration enable 0b000100000000 CH9_EN Channel 9 calibration enable 0b001000000000 CH10_EN Channel 10 calibration enable 0b010000000000 CH11_EN Channel 11 calibration enable 0b100000000000 CTRL3 Measurement Unit 1 Control Register 3 0x18 32 read-write n 0x0 0x0 EoC_FAIL Fail of ADC End of Conversion Signal 6 read-only ADC EoC available End of Conversion Signal was sent properly by ADC 0b0 ADC EoC not available End of Conversion Signal was not sent properly by ADC 0b1 EoC_FAIL_CLR Fail of ADC End of Conversion Signal Clear 4 write-only ADC EoC Fail not clear no clear of EoC_FAIL flag 0b0 ADC EoC Fail clear Clear of EoC_FAIL flag 0b1 MCM_PD_N Power Down Signal for MCM 0 read-write MCM Disabled Measurement Core Module Disabled 0b0 MCM Enabled Measurement Core Module Enabled 0b1 MCM_RDY Ready Signal for MCM after Power On or Reset 7 read-only MCM Not Ready Measurement Core Module in startup phase 0b0 MCM Ready Measurement Core Module start-up phase finished 0b1 SAMPLE_TIME_HVCH Sample time of ADC1 8 3 read-write MICLK4 4 ADC1_CLK clock periods 0x0 MICLK6 6 ADC1_CLK clock periods 0x1 MICLK8 8 ADC1_CLK clock periods 0x2 MICLK10 10 ADC1_CLK clock periods 0x3 MICLK12 12 ADC1_CLK clock periods (default) 0x4 MICLK14 14 ADC1_CLK clock periods 0x5 MICLK16 16 ADC1_CLK clock periods 0x6 MICLK18 18 ADC1_CLK clock periods 0x7 MICLK20 20 ADC1_CLK clock periods 0x8 MICLK22 22 ADC1_CLK clock periods 0x9 SAMPLE_TIME_LVCH Sample time of ADC1 16 3 read-write MICLK4 4 ADC1_CLK clock periods(default) 0x0 MICLK6 6 ADC1_CLK clock periods 0x1 MICLK8 8 ADC1_CLK clock periods 0x2 MICLK10 10 ADC1_CLK clock periods 0x3 MICLK12 12 ADC1_CLK clock periods 0x4 MICLK14 14 ADC1_CLK clock periods 0x5 MICLK16 16 ADC1_CLK clock periods 0x6 MICLK18 18 ADC1_CLK clock periods 0x7 MICLK20 20 ADC1_CLK clock periods 0x8 MICLK22 22 ADC1_CLK clock periods 0x9 SW_MODE SW Mode Enable 1 read-write Software Mode Disable Sequencer running 0b0 Software Mode Enabled Sequencer stopped 0b1 CTRL4 Measurement Unit 1 Control Register 4 0x38 32 read-write n 0x0 0x0 MAX_CALTIME Maximum ADC Calibration Time 0 3 read-write 1 Sequence 0x0 2 Sequences 0x1 3 Sequences 0x2 4 Sequences 0x3 5 Sequence 0x4 6 Sequences 0x5 7 Sequences 0x6 8 Sequences 0x7 9 Sequences 0x8 10 Sequences 0x9 11 Sequences 0xA 12 Sequences 0xB 13 Sequences 0xC 14 Sequences 0xD 15 Sequences 0xE 16 Sequences 0xF CTRL5 Measurement Unit 1 Control Register 5 0x1C 32 read-write n 0x0 0x0 FILT_OUT_SEL_11_0 Output Filter Selection for Channels 0 to 11 0 11 read-write ADC1 Unfiltered Data can be monitored in the corresponding FILT_OUTx Registers None 0b000000000000 Channel 0 IIR Data enabled for FILT_OUT0 Register None 0b000000000001 Channel 1 IIR Data enabled for FILT_OUT1 Register None 0b000000000010 Channel 2 IIR Data enabled for FILT_OUT2 Register None 0b000000000100 Channel 3 IIR Data enabled for FILT_OUT3 Register None 0b000000001000 Channel 4 IIR Data enabled for FILT_OUT4 Register None 0b000000010000 Channel 5 IIR Data enabled for FILT_OUT5 Register None 0b000000100000 Channel 6 IIR Data enabled for FILT_OUT6 Register None 0b000001000000 Channel 7 IIR Data enabled for FILT_OUT7 Register None 0b000010000000 Channel 8 IIR Data enabled for FILT_OUT8 Register None 0b000100000000 Channel 9 IIR Data enabled for FILT_OUT9 Register None 0b001000000000 Channel 10 IIR Data enabled for FILT_OUT10 Register None 0b010000000000 Channel 11 IIR Data enabled for FILT_OUT11 Register None 0b100000000000 For Channels 11-0 IIR Data is enabled for FILT_OUTx Registers None 0b111111111111 CTRL_STS ADC1 Control and Status Register 0x0 32 read-write n 0x0 0x0 CAL_SIGN Output of Comparator to Steer Gain / Offset calibration 5 read-only EOC ADC1 End of Conversion (software mode) 7 read-only Pending conversion still running 0b0 Finished conversion has finished 0b1 PD_N ADC1 Power Down Signal 0 read-write POWER DOWN ADC1 is powered down 0b0 ACTIVE ADC1 is switched on 0b1 READY HVADC Ready bit 4 read-only Not ready Module in power down or in init phase 0b0 Ready set automatically 5 ADC clock cycles after module is enabled 0b1 SOS ADC1 Start of Sampling/Conversion (software mode) 2 read-write Disable no conversion is started 0b0 Enable conversion is started 0b1 STRTUP_DIS DPP1 Startup Disable 18 read-write Startup Enable DPP1 Startup enabled 0b0 Startup Disable DPP1 Startup disable 0b1 SW_CH_SEL Channel for software mode 8 3 read-write CH0_EN Channel 0 enable 0b0000 CH1_EN Channel 1 enable 0b0001 CH2_EN Channel 2 enable 0b0010 CH3_EN Channel 3 enable 0b0011 CH4_EN Channel 4 enable 0b0100 CH5_EN Channel 5 enable 0b0101 CH6_EN Channel 6 enable 0b0110 CH7_EN Channel 7 enable 0b0111 CH8_EN Channel 8 enable 0b1000 CH9_EN Channel 9 enable 0b1001 CH10_EN Channel 10 enable 0b1010 CH11_EN Channel 11 enable 0b1011 CH12_EN Channel 12 enable 0b1100 DCHCNT1_4_LOWER Lower Counter Trigger Level Differential Channel 1-4 0xE4 32 read-write n 0x0 0x0 CNT_LO_DCH1 Lower timer trigger threshold differential channel 1 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_DCH2 Lower timer trigger threshold differential channel 2 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_DCH3 Lower timer trigger threshold differential channel 3 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_DCH4 Lower timer trigger threshold differential channel 4 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 HYST_LO_DCH1 Differential Channel 1 lower hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_DCH2 Differential Channel 2 lower hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_DCH3 Differential Channel 3 lower hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_DCH4 Differential Channel 4 lower hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 DCHCNT1_4_UPPER Upper Counter Trigger Level Differential Channel 1-4 0xF4 32 read-write n 0x0 0x0 CNT_UP_DCH1 Upper timer trigger threshold differential channel 1 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 15 measurements 0x4 value6 15 measurements 0x5 value7 15 measurements 0x6 value8 15 measurements 0x7 CNT_UP_DCH2 Upper timer trigger threshold differential channel 2 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 15 measurements 0x4 value6 15 measurements 0x5 value7 15 measurements 0x6 value8 15 measurements 0x7 CNT_UP_DCH3 Upper timer trigger threshold differential channel 3 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 15 measurements 0x4 value6 15 measurements 0x5 value7 15 measurements 0x6 value8 15 measurements 0x7 CNT_UP_DCH4 Upper timer trigger threshold differential channel 4 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 15 measurements 0x4 value6 15 measurements 0x5 value7 15 measurements 0x6 value8 15 measurements 0x7 HYST_UP_DCH1 Differential Channel 1 upper hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_DCH2 Differential Channel 2 upper hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_DCH3 Differential Channel 3 upper hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_DCH4 Differential Channel 4 upper hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 DCHTH1_4_LOWER Lower Comparator Trigger Level Differential Channel 1-4 0xC4 32 read-write n 0x0 0x0 DCH1_LOW Differential Channel 1 lower trigger level 0 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF DCH2_LOW Differential Channel 2 lower trigger level 8 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF DCH3_LOW Differential Channel 3 lower trigger level 16 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF DCH4_LOW Differential Channel 4 lower trigger level 24 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF DCHTH1_4_UPPER Upper Comparator Trigger Level Differential Channel 1-4 0xD4 32 read-write n 0x0 0x0 DCH1_UP Differential Channel 1 upper trigger level 0 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF DCH2_UP Differential Channel 2 upper trigger level 8 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF DCH3_UP Differential Channel 3 upper trigger level 16 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF DCH4_UP Differential Channel 4 upper trigger level 24 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF DIFFCH_OUT1 ADC1 Differential Channel Output 1 0xA0 32 read-write n 0x0 0x0 DCH1 ADC differential output value 1 0 11 read-only DOF1 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 DVF1 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 DWFR1 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 DIFFCH_OUT2 ADC1 Differential Channel Output 2 0xA4 32 read-write n 0x0 0x0 DCH2 ADC differential output value 2 0 11 read-only DOF2 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 DVF2 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 DWFR2 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 DIFFCH_OUT3 ADC1 Differential Channel Output 3 0xA8 32 read-write n 0x0 0x0 DCH3 ADC differential output value 3 0 11 read-only DOF3 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 DVF3 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 DWFR3 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 DIFFCH_OUT4 ADC1 Differential Channel Output 4 0xAC 32 read-write n 0x0 0x0 DCH4 ADC differential output value 4 0 11 read-only DOF4 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 DVF4 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 DWFR4 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 DUIN_SEL Measurement Unit 1 - Differential Unit Input Selection Register 0xFC 32 read-write n 0x0 0x0 DU1RES_NEG Differential Unit 1 result negative 4 read-only DU1 Result positive Differential Unit 1 result positive after calculation 0b0 DU1 Result negative Differential Unit 1 result negative after calculation 0b1 DU1_EN Differential Unit 1 enable 0 read-write DU1 disable Differential Unit 1 is disabled 0b0 DU1 enable Differential Unit 1 is enabled 0b1 DU2RES_NEG Differential Unit 2 result negative 12 read-only DU2 Result positive Differential Unit 2 result positive after calculation 0b0 DU2 Result negative Differential Unit 2 result negative after calculation 0b1 DU2_EN Differential Unit 2 enable 8 read-write DU2 disable Differential Unit 2 is disabled 0b0 DU2 enable Differential Unit 2 is enabled 0b1 DU3RES_NEG Differential Unit 3 result negative 20 read-only DU3 Result positive Differential Unit 3 result positive after calculation 0b0 DU3 Result negative Differential Unit 3 result negative after calculation 0b1 DU3_EN Differential Unit 3 enable 16 read-write DU3 disable Differential Unit 3 is disabled 0b0 DU3 enable Differential Unit 3 is enabled 0b1 DU4RES_NEG Differential Unit 4 result negative 28 read-only DU4 Result positive Differential Unit 4 result positive after calculation 0b0 DU4 Result negative Differential Unit 4 result negative after calculation 0b1 DU4_EN Differential Unit 4 enable 24 read-write DU4 disable Differential Unit 4 is disabled 0b0 DU4 enable Differential Unit 4 is enabled 0b1 FILTCOEFF0_11 Filter Coefficients Measurement Unit Channel 0-11 0x60 32 read-write n 0x0 0x0 CH0 Filter Coefficients ADC channel 0 0 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 CH1 Filter Coefficients ADC channel 1 2 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 CH10 Filter Coefficients ADC channel 10 20 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 CH11 Filter Coefficients ADC channel 11 22 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 CH2 Filter Coefficients ADC channel 2 4 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 CH3 Filter Coefficients ADC channel 3 6 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 CH4 Filter Coefficients ADC channel 4 8 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 CH5 Filter Coefficients ADC channel 5 10 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 CH6 Filter Coefficients ADC channel 6 12 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 CH7 Filter Coefficients ADC channel 7 14 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 CH8 Filter Coefficients ADC channel 8 16 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 CH9 Filter Coefficients ADC channel 9 18 1 read-write 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 FILT_LO_CTRL Lower Threshold Filter Enable 0xB4 32 read-write n 0x0 0x0 FL_CH0_EN Lower threshold IIR filter enable Channel 0 0 read-write value1 disable 0b0 value2 enable 0b1 FL_CH10_EN Lower threshold IIR filter enable Channel 10 10 read-write value1 disable 0b0 value2 enable 0b1 FL_CH11_EN Lower threshold IIR filter enable Channel 11 11 read-write value1 disable 0b0 value2 enable 0b1 FL_CH1_EN Lower threshold IIR filter enable Channel 1 1 read-write value1 disable 0b0 value2 enable 0b1 FL_CH2_EN Lower threshold IIR filter enable Channel 2 2 read-write value1 disable 0b0 value2 enable 0b1 FL_CH3_EN Lower threshold IIR filter enable Channel 3 3 read-write value1 disable 0b0 value2 enable 0b1 FL_CH4_EN Lower threshold IIR filter enable Channel 4 4 read-write value1 disable 0b0 value2 enable 0b1 FL_CH5_EN Lower threshold IIR filter enable Channel 5 5 read-write value1 disable 0b0 value2 enable 0b1 FL_CH6_EN Lower threshold IIR filter enable Channel 6 6 read-write value1 disable 0b0 value2 enable 0b1 FL_CH7_EN Lower threshold IIR filter enable Channel 7 7 read-write value1 disable 0b0 value2 enable 0b1 FL_CH8_EN Lower threshold IIR filter enable Channel 8 8 read-write value1 disable 0b0 value2 enable 0b1 FL_CH9_EN Lower threshold IIR filter enable Channel 9 9 read-write value1 disable 0b0 value2 enable 0b1 FILT_OUT0 ADC1 or Filter Output Channel 0 0x70 32 read-write n 0x0 0x0 FILT_OUT_CH0 ADC or filter output value channel 0 0 11 read-only OF0 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF0 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR0 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT1 ADC1 or Filter Output Channel 1 0x74 32 read-write n 0x0 0x0 FILT_OUT_CH1 ADC or filter output value channel 1 0 11 read-only OF1 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF1 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR1 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT10 ADC1 or Filter Output Channel 10 0x98 32 read-write n 0x0 0x0 FILT_OUT_CH10 ADC or filter output value channel 10 0 11 read-only OF10 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF10 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR10 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT11 ADC1 or Filter Output Channel 11 0x9C 32 read-write n 0x0 0x0 FILT_OUT_CH11 ADC or filter output value channel 11 0 11 read-only OF11 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF11 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR11 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT12 ADC1 or Filter Output Channel 12 0x110 32 read-write n 0x0 0x0 FILT_OUT_CH12 ADC or filter output value channel 12 0 11 read-only OF12 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF12 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR12 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT2 ADC1 or Filter Output Channel 2 0x78 32 read-write n 0x0 0x0 FILT_OUT_CH2 ADC or filter output value channel 2 0 11 read-only OF2 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF2 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR2 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT3 ADC1 or Filter Output Channel 3 0x7C 32 read-write n 0x0 0x0 FILT_OUT_CH3 ADC or filter output value channel 3 0 11 read-only OF3 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF3 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR3 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT4 ADC1 or Filter Output Channel 4 0x80 32 read-write n 0x0 0x0 FILT_OUT_CH4 ADC or filter output value channel 4 0 11 read-only OF4 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF4 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR4 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT5 ADC1 or Filter Output Channel 5 0x84 32 read-write n 0x0 0x0 FILT_OUT_CH5 ADC or filter output value channel 5 0 11 read-only OF5 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF5 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR5 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT6 ADC1 or Filter Output Channel 6 0x88 32 read-write n 0x0 0x0 FILT_OUT_CH6 ADC or filter output value channel 6 0 11 read-only OF6 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF6 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR6 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT7 ADC1 or Filter Output Channel 7 0x8C 32 read-write n 0x0 0x0 FILT_OUT_CH7 ADC or filter output value channel 7 0 11 read-only OF7 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF7 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR7 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT8 ADC1 or Filter Output Channel 8 0x90 32 read-write n 0x0 0x0 FILT_OUT_CH8 ADC or filter output value channel 8 0 11 read-only OF8 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF8 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR8 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUT9 ADC1 or Filter Output Channel 9 0x94 32 read-write n 0x0 0x0 FILT_OUT_CH9 ADC or filter output value channel 9 0 11 read-only OF9 Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF9 Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR9 Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_OUTEIM ADC1 or Filter Output of EIM 0x120 32 read-write n 0x0 0x0 FILT_OUT_EIM ADC or filter output value for last EIM measurement 0 11 read-only OF_EIM Overrun Flag 18 read-only NO OVERRUN Result register not overwritten 0b0 OVERRUN Result register overwritten 0b1 VF_EIM Valid Flag 17 read-only NOT VALID No new valid data available 0b0 VALID Result register contains valid data and has not yet been read 0b1 WFR_EIM Wait for Read Mode 16 read-write DISABLE overwrite mode 0b0 ENABLE wait for read mode enabled 0b1 FILT_UP_CTRL Upper Threshold Filter Enable 0xB0 32 read-write n 0x0 0x0 FU_CH0_EN Upper threshold IIR filter enable Channel 0 0 read-write value1 disable 0b0 value2 enable 0b1 FU_CH10_EN Upper threshold IIR filter enable Channel 10 10 read-write value1 disable 0b0 value2 enable 0b1 FU_CH11_EN Upper threshold IIR filter enable Channel 11 11 read-write value1 disable 0b0 value2 enable 0b1 FU_CH1_EN Upper threshold IIR filter enable Channel 1 1 read-write value1 disable 0b0 value2 enable 0b1 FU_CH2_EN Upper threshold IIR filter enable Channel 2 2 read-write value1 disable 0b0 value2 enable 0b1 FU_CH3_EN Upper threshold IIR filter enable Channel 3 3 read-write value1 disable 0b0 value2 enable 0b1 FU_CH4_EN Upper threshold IIR filter enable Channel 4 4 read-write value1 disable 0b0 value2 enable 0b1 FU_CH5_EN Upper threshold IIR filter enable Channel 5 5 read-write value1 disable 0b0 value2 enable 0b1 FU_CH6_EN Upper threshold IIR filter enable Channel 6 6 read-write value1 disable 0b0 value2 enable 0b1 FU_CH7_EN Upper threshold IIR filter enable Channel 7 7 read-write value1 disable 0b0 value2 enable 0b1 FU_CH8_EN Upper threshold IIR filter enable Channel 8 8 read-write value1 disable 0b0 value2 enable 0b1 FU_CH9_EN Upper threshold IIR filter enable Channel 9 9 read-write value1 disable 0b0 value2 enable 0b1 IRQCLR_1 ADC1 Interrupt Status Clear 1 Register 0x6C 32 read-write n 0x0 0x0 DU1LO_ISC Differential Unit 1 lower Interrupt Status Clear 24 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 DU1UP_ISC Differential Unit 1 lower Interrupt Status Clear 25 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 DU2LO_ISC Differential Unit 2 lower Interrupt Status Clear 26 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 DU2UP_ISC Differential Unit 2 lower Interrupt Status Clear 27 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 DU3LO_ISC Differential Unit 3 lower Interrupt Status Clear 28 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 DU3UP_ISC Differential Unit 3 lower Interrupt Status Clear 29 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 DU4LO_ISC Differential Unit 4 lower Interrupt Status Clear 30 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 DU4UP_ISC Differential Unit 4 lower Interrupt Status Clear 31 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 EIM_ISC Exceptional Interrupt Measurement (EIM) Status Clear 16 write-only INACTIVE No EIM cleared 0b0 ACTIVE EIM cleared 0b1 ESM_ISC Exceptional Sequence Measurement (ESM) Status Clear 17 write-only INACTIVE No ESM has cleared 0b0 ACTIVE ESM cleared 0b1 MON1_ISC ADC1 MON 1 Interrupt Status Clear 2 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON2_ISC ADC1 MON 2 Interrupt Status Clear 3 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON3_ISC ADC1 MON 3 Interrupt Status Clear 4 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON4_ISC ADC1 MON 4 Interrupt Status Clear 5 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON5_ISC ADC1 MON 5 Interrupt Status Clear 6 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_0_ISC ADC1 Port 2.0 Interrupt Status Clear 12 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_1_ISC ADC1 Port 2.1 Interrupt Status Clear 7 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_2_ISC ADC1 Port 2.2 Interrupt Status Clear 8 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_3_ISC ADC1 Port 2.3 Interrupt Status Clear 9 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_6_ISC ADC1 Port 2.6 Interrupt Status Clear 10 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_7_ISC ADC1 Port 2.7 Interrupt Status Clear 11 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 VBATSEN_ISC ADC1 VBAT_SENSE Interrupt Status Clear 0 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 VS_ISC ADC1 VS Interrupt Status Clear 1 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 IRQCLR_2 ADC1 Interrupt Status Clear 2 Register 0x108 32 read-write n 0x0 0x0 MON1_LO_ISC ADC1 MON 1 Lower Threshold Interrupt Status Clear 2 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON1_UP_ISC ADC1 MON 1 Upper Threshold Interrupt Status Clear 18 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON2_LO_ISC ADC1 MON 2 Lower Threshold Interrupt Status Clear 3 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON2_UP_ISC ADC1 MON 2 Upper Threshold Interrupt Status Clear 19 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON3_LO_ISC ADC1 MON 3 Lower Threshold Interrupt Status Clear 4 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON3_UP_ISC ADC1 MON 3 Upper Threshold Interrupt Status Clear 20 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON4_LO_ISC ADC1 MON 4 Lower Threshold Interrupt Status Clear 5 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON4_UP_ISC ADC1 MON 4 Upper Threshold Interrupt Status Clear 21 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON5_LO_ISC ADC1 MON 5 Lower Threshold Interrupt Status Clear 6 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 MON5_UP_ISC ADC1 MON 5 Upper Threshold Interrupt Status Clear 22 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_1_LO_ISC ADC1 Port 2.1 Lower Threshold Interrupt Status Clear 7 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_1_UP_ISC ADC1 Port 2.1 Upper Threshold Interrupt Status Clear 23 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_2_LO_ISC ADC1 Port 2.2 Lower Threshold Interrupt Status Clear 8 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_2_UP_ISC ADC1 Port 2.2 Upper Threshold Interrupt Status Clear 24 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_3_LO_ISC ADC1 Port 2.3 Lower Threshold Interrupt Status Clear 9 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_3_UP_ISC ADC1 Port 2.3 Upper Threshold Interrupt Status Clear 25 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_6_LO_ISC ADC1 Port 2.6 Lower Threshold Interrupt Status Clear 10 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_6_UP_ISC ADC1 Port 2.6 Upper Threshold Interrupt Status Clear 26 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_7_LO_ISC ADC1 Port 2.7 Lower Threshold Interrupt Status Clear 11 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 P2_7_UP_ISC ADC1 Port 2.7 Upper Threshold Interrupt Status Clear 27 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 VS_LO_ISC ADC1 VS Lower Threshold Interrupt Status Clear 1 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 VS_UP_ISC ADC1 VS Upper Threshold Interrupt Status Clear 17 write-only INACTIVE interrupt status is not cleared 0b0 ACTIVE interrupt status is cleared 0b1 IRQEN_1 ADC1 Interrupt Enable 1 Register 0x68 32 read-write n 0x0 0x0 DU1LO_IEN Differential Unit 1 lower Interrupt Enable 24 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 DU1UP_IEN Differential Unit 1 upper Interrupt Enable 25 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 DU2LO_IEN Differential Unit 2 lower Interrupt Enable 26 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 DU2UP_IEN Differential Unit 2 upper Interrupt Enable 27 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 DU3LO_IEN Differential Unit 3 lower Interrupt Enable 28 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 DU3UP_IEN Differential Unit 3 upper Interrupt Enable 29 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 DU4LO_IEN Differential Unit 4 lower Interrupt Enable 30 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 DU4UP_IEN Differential Unit 4 upper Interrupt Enable 31 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 EIM_IEN Exceptional Interrupt Measurement (EIM) Interrupt Enable 16 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 ESM_IEN Exceptional Sequence Measurement (ESM) Interrupt Enable 17 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON1_IEN ADC1 MON 1 Interrupt Enable 2 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON2_IEN ADC1 MON 2 Interrupt Enable 3 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON3_IEN ADC1 MON 3 Interrupt Enable 4 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON4_IEN ADC1 MON 4 Interrupt Enable 5 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON5_IEN ADC1 MON 5 Interrupt Enable 6 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_0_IEN ADC1 Port 2.0 Interrupt Enable 12 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_1_IEN ADC1 Port 2.1 Interrupt Enable 7 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_2_IEN ADC1 Port 2.2 Interrupt Enable 8 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_3_IEN ADC1 Port 2.3 Interrupt Enable 9 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_6_IEN ADC1 Port 2.6 Interrupt Enable 10 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_7_IEN ADC1 Port 2.7 Interrupt Enable 11 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 VBATSEN_IEN ADC1 VBAT_SENSE Interrupt Enable 0 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 VS_IEN ADC1 VS Interrupt Enable 1 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 IRQEN_2 ADC1 Interrupt Enable 2 Register 0x10C 32 read-write n 0x0 0x0 MON1_LO_IEN ADC1 MON 1 Lower Threshold Interrupt Enable 2 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON1_UP_IEN ADC1 MON 1 Upper Threshold Interrupt Enable 18 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON2_LO_IEN ADC1 MON 2 Lower Threshold Interrupt Enable 3 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON2_UP_IEN ADC1 MON 2 Upper Threshold Interrupt Enable 19 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON3_LO_IEN ADC1 MON 3 Lower Threshold Interrupt Enable 4 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON3_UP_IEN ADC1 MON 3 Upper Threshold Interrupt Enable 20 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON4_LO_IEN ADC1 MON 4 Lower Threshold Interrupt Enable 5 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON4_UP_IEN ADC1 MON 4 Upper Threshold Interrupt Enable 21 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON5_LO_IEN ADC1 MON 5 Lower Threshold Interrupt Enable 6 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 MON5_UP_IEN ADC1 MON 5 Upper Threshold Interrupt Enable 22 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_1_LO_IEN ADC1 Port 2.1 Lower Threshold Interrupt Enable 7 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_1_UP_IEN ADC1 Port 2.1 Upper Threshold Interrupt Enable 23 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_2_LO_IEN ADC1 Port 2.2 Lower Threshold Interrupt Enable 8 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_2_UP_IEN ADC1 Port 2.2 Upper Threshold Interrupt Enable 24 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_3_LO_IEN ADC1 Port 2.3 Lower Threshold Interrupt Enable 9 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_3_UP_IEN ADC1 Port 2.3 Upper Threshold Interrupt Enable 25 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_6_LO_IEN ADC1 Port 2.6 Lower Threshold Interrupt Enable 10 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_6_UP_IEN ADC1 Port 2.6 Upper Threshold Interrupt Enable 26 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_7_LO_IEN ADC1 Port 2.7 Lower Threshold Interrupt Enable 11 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 P2_7_UP_IEN ADC1 Port 2.7 Upper Threshold Interrupt Enable 27 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 VS_LO_IEN ADC1 VS Lower Threshold Interrupt Enable 1 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 VS_UP_IEN ADC1 VS Upper Threshold Interrupt Enable 17 read-write DISABLED Interrupt disabled 0b0 ENABLED Interrupt enabled 0b1 IRQS_1 ADC1 Interrupt Status 1 Register 0x64 32 read-write n 0x0 0x0 DU1LO_IS ADC1 Differential Unit 1 (DU1) lower Channel Interrupt Status 24 read-write INACTIVE No DU lower Channel Interrupt has occurred 0b0 ACTIVE DU lower Channel Interrupt has occurred 0b1 DU1UP_IS ADC1 Differential Unit 1 (DU1) upper Channel Interrupt Status 25 read-write INACTIVE No DU upper Channel Interrupt has occurred 0b0 ACTIVE DU upper Channel Interrupt has occurred 0b1 DU2LO_IS ADC1 Differential Unit 2 (DU2) lower Channel Interrupt Status 26 read-write INACTIVE No DU lower Channel Interrupt has occurred 0b0 ACTIVE DU lower Channel Interrupt has occurred 0b1 DU2UP_IS ADC1 Differential Unit 2 (DU2) upper Channel Interrupt Status 27 read-write INACTIVE No DU upper Channel Interrupt has occurred 0b0 ACTIVE DU upper Channel Interrupt has occurred 0b1 DU3LO_IS ADC1 Differential Unit 3 (DU3) lower Channel Interrupt Status 28 read-write INACTIVE No DU lower Channel Interrupt has occurred 0b0 ACTIVE DU lower Channel Interrupt has occurred 0b1 DU3UP_IS ADC1 Differential Unit 3 (DU3) upper Channel Interrupt Status 29 read-write INACTIVE No DU upper Channel Interrupt has occurred 0b0 ACTIVE DU upper Channel Interrupt has occurred 0b1 DU4LO_IS ADC1 Differential Unit 4 (DU4) lower Channel Interrupt Status 30 read-write INACTIVE No DU lower Channel Interrupt has occurred 0b0 ACTIVE DU lower Channel Interrupt has occurred 0b1 DU4UP_IS ADC1 Differential Unit 4 (DU4) upper Channel Interrupt Status 31 read-write INACTIVE No DU upper Channel Interrupt has occurred 0b0 ACTIVE DU upper Channel Interrupt has occurred 0b1 EIM_IS Exceptional Interrupt Measurement (EIM) Status 16 read-write INACTIVE No EIM occurred 0b0 ACTIVE EIM occurred 0b1 ESM_IS Exceptional Sequence Measurement (ESM) Status 17 read-write INACTIVE No ESM has occurred 0b0 ACTIVE ESM occurred 0b1 MON1_IS ADC1 Channel 2 Interrupt Status 2 read-write INACTIVE No Channel 2 Interrupt has occurred 0b0 ACTIVE Channel 2 Interrupt has occurred 0b1 MON2_IS ADC1 Channel 3 Interrupt Status 3 read-write INACTIVE No Channel 3 Interrupt has occurred 0b0 ACTIVE Channel 3 Interrupt has occurred 0b1 MON3_IS ADC1 Channel 4 Interrupt Status 4 read-write INACTIVE No Channel 4 Interrupt has occurred 0b0 ACTIVE Channel 4 Interrupt has occurred 0b1 MON4_IS ADC1 Channel 5 Interrupt Status 5 read-write INACTIVE No Channel 5 Interrupt has occurred 0b0 ACTIVE Channel 5 Interrupt has occurred 0b1 MON5_IS ADC1 Channel 6 Interrupt Status 6 read-write INACTIVE No Channel 6 Interrupt has occurred 0b0 ACTIVE Channel 6 Interrupt has occurred 0b1 P2_0_IS ADC1 Channel 12 Interrupt Status 12 read-write INACTIVE No Channel 12 Interrupt has occurred 0b0 ACTIVE Channel 12 Interrupt has occurred 0b1 P2_1_IS ADC1 Channel 7 Interrupt Status 7 read-write INACTIVE No Channel 7 Interrupt has occurred 0b0 ACTIVE Channel 7 Interrupt has occurred 0b1 P2_2_IS ADC1 Channel 8 Interrupt Status 8 read-write INACTIVE No Channel 8 Interrupt has occurred 0b0 ACTIVE Channel 8 Interrupt has occurred 0b1 P2_3_IS ADC1 Channel 9 Interrupt Status 9 read-write INACTIVE No Channel 9 Interrupt has occurred 0b0 ACTIVE Channel 9 Interrupt has occurred 0b1 P2_6_IS ADC1 Channel 10 Interrupt Status 10 read-write INACTIVE No Channel 10 Interrupt has occurred 0b0 ACTIVE Channel 10 Interrupt has occurred 0b1 P2_7_IS ADC1 Channel 11 Interrupt Status 11 read-write INACTIVE No Channel 11 Interrupt has occurred 0b0 ACTIVE Channel 11 Interrupt has occurred 0b1 VBATSEN_IS ADC1 Channel 1 Interrupt Status 0 read-write INACTIVE No Channel 1 Interrupt has occurred 0b0 ACTIVE Channel 1 Interrupt has occurred 0b1 VS_IS ADC1 Channel 0 Interrupt Status 1 read-write INACTIVE No Channel 0 Interrupt has occurred 0b0 ACTIVE Channel 0 Interrupt has occurred 0b1 IRQS_2 ADC1 Interrupt Status 2 Register 0x100 32 read-write n 0x0 0x0 MON1_LO_IS ADC1 MON 1 Lower Threshold Interrupt Status 2 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 MON1_UP_IS ADC1 MON 1 Upper Threshold Interrupt Status 18 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 MON2_LO_IS ADC1 MON 2 Lower Threshold Interrupt Status 3 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 MON2_UP_IS ADC1 MON 2 Upper Threshold Interrupt Status 19 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 MON3_LO_IS ADC1 MON 3 Lower Threshold Interrupt Status 4 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 MON3_UP_IS ADC1 MON 3 Upper Threshold Interrupt Status 20 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 MON4_LO_IS ADC1 MON 4 Lower Threshold Interrupt Status 5 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 MON4_UP_IS ADC1 MON 4 Upper Threshold Interrupt Status 21 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 MON5_LO_IS ADC1 MON 5 Lower Threshold Interrupt Status 6 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 MON5_UP_IS ADC1 MON 5 Upper Threshold Interrupt Status 22 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 P2_1_LO_IS ADC1 Port 2.1 Lower Threshold Interrupt Status 7 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 P2_1_UP_IS ADC1 Port 2.1 Upper Threshold Interrupt Status 23 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 P2_2_LO_IS ADC1 Port 2.2 Lower Threshold Interrupt Status 8 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 P2_2_UP_IS ADC1 Port 2.2 Upper Threshold Interrupt Status 24 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 P2_3_LO_IS ADC1 Port 2.3 Lower Threshold Interrupt Status 9 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 P2_3_UP_IS ADC1 Port 2.3 Upper Threshold Interrupt Status 25 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 P2_6_LO_IS ADC1 Port 2.6 Lower Threshold Interrupt Status 10 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 P2_6_UP_IS ADC1 Port 2.6 Upper Threshold Interrupt Status 26 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 P2_7_LO_IS ADC1 Port 2.7 Lower Threshold Interrupt Status 11 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 P2_7_UP_IS ADC1 Port 2.7 Upper Threshold Interrupt Status 27 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 VS_LO_IS ADC1 VS Lower Threshold Interrupt Status 1 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 VS_UP_IS ADC1 VS Upper Threshold Interrupt Status 17 read-write INACTIVE no interrupt has occurred 0b0 ACTIVE interrupt has occurred 0b1 MAX_TIME Maximum Time for Software Mode 0x10 32 read-write n 0x0 0x0 MAX_TIME Maximum Time in Software Mode 0 7 read-write min Software mode is immediately left 0x00 max Software mode is active for 12.75 us 0xFF MMODE0_11 Overvoltage Measurement Mode of Ch 0-11 0xF8 32 read-write n 0x0 0x0 MMODE_0 Measurement mode Channel 0 0 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_1 Measurement mode Channel 1 2 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_10 Measurement mode Channel 10 20 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_11 Measurement mode Channel 11 22 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_2 Measurement mode Channel 2 4 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_3 Measurement mode Channel 3 6 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_4 Measurement mode Channel 4 8 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_5 Measurement mode Channel 5 10 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_6 Measurement mode Channel 6 12 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_7 Measurement mode Channel 7 14 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_8 Measurement mode Channel 8 16 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_9 Measurement mode Channel 9 18 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_D1 Measurement mode Differential Channel 1 24 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_D2 Measurement mode Differential Channel 2 26 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_D3 Measurement mode Differential Channel 3 28 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MMODE_D4 Measurement mode Differential Channel 4 30 1 read-write MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 SQ0_1 Measurement Unit 1 Channel Enable Bits for Cycle 0-1 0x20 32 read-write n 0x0 0x0 SQ0 Sequence 0 channel enable 0 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ1 Sequence 1 channel enable 16 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ10_11 Measurement Unit 1 Channel Enable Bits for Cycle 10-11 0x34 32 read-write n 0x0 0x0 SQ10 Sequence 10 channel enable 0 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ11 Sequence 11 channel enable 16 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ2_3 Measurement Unit 1 Channel Enable Bits for Cycle 2-3 0x24 32 read-write n 0x0 0x0 SQ2 Sequence 2 channel enable 0 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ3 Sequence 3 channel enable 16 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ4_5 Measurement Unit 1 Channel Enable Bits for Cycle 4-5 0x28 32 read-write n 0x0 0x0 SQ4 Sequence 4 channel enable 0 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ5 Sequence 5 channel enable 16 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ6_7 Measurement Unit 1 Channel Enable Bits for Cycle 6-7 0x2C 32 read-write n 0x0 0x0 SQ6 Sequence 6 channel enable 0 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ7 Sequence 7 channel enable 16 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ8_9 Measurement Unit 1 Channel Enable Bits for Cycle 8-9 0x30 32 read-write n 0x0 0x0 SQ8 Sequence 8 channel enable 0 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ9 Sequence 9 channel enable 16 11 read-write CH0_EN Channel 0 enable 0b000000000001 CH1_EN Channel 1 enable 0b000000000010 CH2_EN Channel 2 enable 0b000000000100 CH3_EN Channel 3 enable 0b000000001000 CH4_EN Channel 4 enable 0b000000010000 CH5_EN Channel 5 enable 0b000000100000 CH6_EN Channel 6 enable 0b000001000000 CH7_EN Channel 7 enable 0b000010000000 CH8_EN Channel 8 enable 0b000100000000 CH9_EN Channel 9 enable 0b001000000000 CH10_EN Channel 10 enable 0b010000000000 CH11_EN Channel 11 enable 0b100000000000 SQ_FB Sequencer Feedback Register 0x4 32 read-write n 0x0 0x0 CHx Current ADC1 Channel 16 3 read-only CH0 Channel 0 enable 0b0000 CH1 Channel 1 enable 0b0001 CH2 Channel 2 enable 0b0010 CH3 Channel 3 enable 0b0011 CH4 Channel 4 enable 0b0100 CH5 Channel 5 enable 0b0101 CH6 Channel 6 enable 0b0110 CH7 Channel 7 enable 0b0111 CH8 Channel 8 enable 0b1000 CH9 Channel 9 enable 0b1001 CH10 Channel 10 enable 0b1010 CH11 Channel 11 enable 0b1011 EIM_ACTIVE ADC1 EIM active 9 read-only not active EIM not active 0b0 active EIM active 0b1 ESM_ACTIVE ADC1 ESM active 10 read-only not active ESM not active 0b0 active ESM active 0b1 SQx Current Active ADC1 Sequence 11 3 read-only SQ0 Sequence 0 enable 0b0000 SQ1 Sequence 1 enable 0b0001 SQ2 Sequence 2 enable 0b0010 SQ3 Sequence 3 enable 0b0011 SQ4 Sequence 4 enable 0b0100 SQ5 Sequence 5 enable 0b0101 SQ6 Sequence 6 enable 0b0110 SQ7 Sequence 7 enable 0b0111 SQ8 Sequence 8 enable 0b1000 SQ9 Sequence 9 enable 0b1001 SQ10 Sequence 10 enable 0b1010 SQ11 Sequence 11 enable 0b1011 SQ_FB Current Sequence that caused software mode 0 4 read-only SQ0 Sequence 0 enable 0b00000 SQ1 Sequence 1 enable 0b00001 SQ2 Sequence 2 enable 0b00010 SQ3 Sequence 3 enable 0b00011 SQ4 Sequence 4 enable 0b00100 SQ5 Sequence 5 enable 0b00101 SQ6 Sequence 6 enable 0b00110 SQ7 Sequence 7 enable 0b00111 SQ8 Sequence 8 enable 0b01000 SQ9 Sequence 9 enable 0b01001 SQ10 Sequence 10 enable 0b01010 SQ11 Sequence 11 enable 0b01011 ESM ESM 0b11010 rfu None 0b11011 SUSPEND_SW SW Mode per Flag 0b11100 SUSPEND_DBG Debug Suspend Mode 0b11101 SQ_STOP ADC1 Sequencer Stop Signal for DPP 8 read-only DPP Running Postprocessing Sequencer in running mode 0b0 DPP Stopped Postprocessing Sequencer stopped / Software Mode entered 0b1 STSCLR_1 ADC1 Status Clear 1 Register 0x128 32 read-write n 0x0 0x0 DU1LO_SC ADC1 Differential Unit 1 (DU1) lower Channel Status Clear 24 write-only INACTIVE No DU lower Channel Status has occurred 0b0 ACTIVE DU lower Channel Status has occurred 0b1 DU1UP_SC ADC1 Differential Unit 1 (DU1) upper Channel Status Clear 25 write-only INACTIVE No DU upper Channel Status has occurred 0b0 ACTIVE DU upper Channel Status has occurred 0b1 DU2LO_SC ADC1 Differential Unit 2 (DU2) lower Channel Status Clear 26 write-only INACTIVE No DU lower Channel Status has occurred 0b0 ACTIVE DU lower Channel Status has occurred 0b1 DU2UP_SC ADC1 Differential Unit 2 (DU2) upper Channel Status Clear 27 write-only INACTIVE No DU upper Channel Status has occurred 0b0 ACTIVE DU upper Channel Status has occurred 0b1 DU3LO_SC ADC1 Differential Unit 3 (DU3) lower Channel Status Clear 28 write-only INACTIVE No DU lower Channel Status has occurred 0b0 ACTIVE DU lower Channel Status has occurred 0b1 DU3UP_SC ADC1 Differential Unit 3 (DU3) upper Channel Status Clear 29 write-only INACTIVE No DU upper Channel Status has occurred 0b0 ACTIVE DU upper Channel Status has occurred 0b1 DU4LO_SC ADC1 Differential Unit 4 (DU4) lower Channel Status Clear 30 write-only INACTIVE No DU lower Channel Status has occurred 0b0 ACTIVE DU lower Channel Status has occurred 0b1 DU4UP_SC ADC1 Differential Unit 4 (DU4) upper Channel Status Clear 31 write-only INACTIVE No DU upper Channel Status has occurred 0b0 ACTIVE DU upper Channel Status has occurred 0b1 STS_1 ADC1 Status 1 Register 0x124 32 read-write n 0x0 0x0 DU1LO_STS ADC1 Differential Unit 1 (DU1) lower Channel Status 24 read-write INACTIVE No DU lower Channel Status has occurred 0b0 ACTIVE DU lower Channel Status has occurred 0b1 DU1UP_STS ADC1 Differential Unit 1 (DU1) upper Channel Status 25 read-write INACTIVE No DU upper Channel Status has occurred 0b0 ACTIVE DU upper Channel Status has occurred 0b1 DU2LO_STS ADC1 Differential Unit 2 (DU2) lower Channel Status 26 read-write INACTIVE No DU lower Channel Status has occurred 0b0 ACTIVE DU lower Channel Status has occurred 0b1 DU2UP_STS ADC1 Differential Unit 2 (DU2) upper Channel Status 27 read-write INACTIVE No DU upper Channel Status has occurred 0b0 ACTIVE DU upper Channel Status has occurred 0b1 DU3LO_STS ADC1 Differential Unit 3 (DU3) lower Channel Status 28 read-write INACTIVE No DU lower Channel Status has occurred 0b0 ACTIVE DU lower Channel Status has occurred 0b1 DU3UP_STS ADC1 Differential Unit 3 (DU3) upper Channel Status 29 read-write INACTIVE No DU upper Channel Status has occurred 0b0 ACTIVE DU upper Channel Status has occurred 0b1 DU4LO_STS ADC1 Differential Unit 4 (DU4) lower Channel Status 30 read-write INACTIVE No DU lower Channel Status has occurred 0b0 ACTIVE DU lower Channel Status has occurred 0b1 DU4UP_STS ADC1 Differential Unit 4 (DU4) upper Channel Status 31 read-write INACTIVE No DU upper Channel Status has occurred 0b0 ACTIVE DU upper Channel Status has occurred 0b1 STS_2 ADC1 Status 2 Register 0x104 32 read-write n 0x0 0x0 MON1_LO_STS ADC1 MON 1 Lower Threshold Status 2 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 MON1_UP_STS ADC1 MON 1 Upper Threshold Status 18 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 MON2_LO_STS ADC1 MON 2 Lower Threshold Status 3 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 MON2_UP_STS ADC1 MON 2 Upper Threshold Status 19 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 MON3_LO_STS ADC1 MON 3 Lower Threshold Status 4 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 MON3_UP_STS ADC1 MON 3 Upper Threshold Status 20 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 MON4_LO_STS ADC1 MON 4 Lower Threshold Status 5 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 MON4_UP_STS ADC1 MON 4 Upper Threshold Status 21 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 MON5_LO_STS ADC1 MON 5 Lower Threshold Status 6 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 MON5_UP_STS ADC1 MON 5 Upper Threshold Status 22 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 P2_1_LO_STS ADC1 Port 2.1 Lower Threshold Status 7 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 P2_1_UP_STS ADC1 Port 2.1 Upper Threshold Status 23 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 P2_2_LO_STS ADC1 Port 2.2 Lower Threshold Status 8 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 P2_2_UP_STS ADC1 Port 2.2 Upper Threshold Status 24 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 P2_3_LO_STS ADC1 Port 2.3 Lower Threshold Status 9 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 P2_3_UP_STS ADC1 Port 2.3 Upper Threshold Status 25 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 P2_6_LO_STS ADC1 Port 2.6 Lower Threshold Status 10 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 P2_6_UP_STS ADC1 Port 2.6 Upper Threshold Status 26 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 P2_7_LO_STS ADC1 Port 2.7 Lower Threshold Status 11 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 P2_7_UP_STS ADC1 Port 2.7 Upper Threshold Status 27 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 VS_LO_STS ADC1 VS Lower Threshold Status 1 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 VS_UP_STS ADC1 VS Upper Threshold Status 17 read-only Below limit Status below upper threshold 0b0 Above limit Upper threshold exceeded 0b1 TH0_3_LOWER Lower Comparator Trigger Level Channel 0-3 0x40 32 read-write n 0x0 0x0 CH0_LOW Channel 0 lower trigger level 0 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF CH1_LOW Channel 1 lower trigger level 8 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF CH2_LOW Channel 2 lower trigger level 16 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF CH3_LOW Channel 3 lower trigger level 24 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF TH0_3_UPPER Upper Comparator Trigger Level Channel 0-3 0xC8 32 read-write n 0x0 0x0 CH0_UP Channel 0 upper trigger level 0 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF CH1_UP Channel 1 upper trigger level 8 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF CH2_UP Channel 2 upper trigger level 16 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF CH3_UP Channel 3 upper trigger level 24 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF TH4_7_LOWER Lower Comparator Trigger Level Channel 4-7 0x44 32 read-write n 0x0 0x0 CH4_LOW Channel 4 lower trigger level 0 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF CH5_LOW Channel 5 lower trigger level 8 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF CH6_LOW Channel 6 lower trigger level 16 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF CH7_LOW Channel 7 lower trigger level 24 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF TH4_7_UPPER Upper Comparator Trigger Level Channel 4-7 0xCC 32 read-write n 0x0 0x0 CH4_UP Channel 4 upper trigger level 0 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF CH5_UP Channel 5 upper trigger level 8 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF CH6_UP Channel 6upper trigger level 16 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF CH7_UP Channel 7 upper trigger level 24 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF TH8_11_LOWER Lower Comparator Trigger Level Channel 8-11 0xC0 32 read-write n 0x0 0x0 CH10_LOW Channel 10 lower trigger level 16 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF CH11_LOW Channel 11 lower trigger level 24 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF CH8_LOW Channel 8 lower trigger level 0 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF CH9_LOW Channel 9 lower trigger level 8 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF TH8_11_UPPER Upper Comparator Trigger Level Channel 8-11 0xD0 32 read-write n 0x0 0x0 CH10_UP Channel 10 upper trigger level 16 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF CH11_UP Channel 11 upper trigger level 24 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF CH8_UP Channel 8 upper trigger level 0 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF CH9_UP Channel 9 upper trigger level 8 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF ADC2 ADC2 ADC2 0x0 0x0 0x2000 registers n CAL_CH0_1 Calibration for Channel 0 and 1 0x34 32 read-write n 0x0 0x0 GAIN_CH0 Gain Calibration for channel 0 8 7 read-only GAIN_CH1 Gain Calibration for channel 1 24 7 read-only OFFS_CH0 Offset Calibration for channel 0 0 4 read-only OFFS_CH1 Offset Calibration for channel 1 16 4 read-only CAL_CH2_3 Calibration for Channel 2 and 3 0x38 32 read-write n 0x0 0x0 GAIN_CH2 Gain Calibration for channel 2 8 7 read-only GAIN_CH3 Gain Calibration for channel 3 24 7 read-only OFFS_CH2 Offset Calibration for channel 2 0 4 read-only OFFS_CH3 Offset Calibration for channel 3 16 4 read-only CAL_CH4_5 Calibration for Channel 4 and 5 0x3C 32 read-write n 0x0 0x0 GAIN_CH4 Gain Calibration for channel 4 8 7 read-only GAIN_CH5 Gain Calibration for channel 5 24 7 read-only OFFS_CH4 Offset Calibration for channel 4 0 4 read-only OFFS_CH5 Offset Calibration for channel 5 16 4 read-only CAL_CH6_7 Calibration for Channel 6 and 7 0x40 32 read-write n 0x0 0x0 GAIN_CH6 Gain Calibration for channel 6 8 7 read-only OFFS_CH6 Offset Calibration for channel 6 0 4 read-only CHx_EIM Channel Settings Bits for Exceptional Interrupt Measurement 0x8 32 read-write n 0x0 0x0 CHx_SEL Channel set for exceptional interrupt measurement (EIM) 0 2 read-write CH0_EN Channel 0 enable 0b000 CH1_EN Channel 1 enable 0b001 CH2_EN Channel 2 enable 0b010 CH3_EN Channel 3 enable 0b011 CH4_EN Channel 4 enable 0b100 CH5_EN Channel 5 enable 0b101 CH6_EN Channel 6 enable 0b110 rfu reserved for future use 0b111 EN Exceptional interrupt measurement (EIM) Trigger Event enable 11 read-write DISABLE start of EIM disabled 0b0 ENABLE start of IEM enabled 0b1 REP Repeat count for exceptional interrupt measurement (EIM) 8 2 read-write 1 Measurements 0b000 2 Measurements 0b001 4 Measurements 0b010 8 Measurements 0b011 16 Measurements 0b100 32 Measurements 0b101 64 Measurements 0b110 128 Measurements 0b111 SEL Exceptional interrupt measurement (EIM) Trigger select 12 read-write GPT12PISEL.T3_GPT12_SEL GPT12_PISEL triggers EIM 0b0 not supported None 0b1 CNT0_3_LOWER Lower Counter Trigger Level Channel 0 - 3 0x98 32 read-write n 0x0 0x0 CNT_LO_CH0 Lower timer trigger threshold channel 0 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH1 Lower timer trigger threshold channel 1 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH2 Lower timer trigger threshold channel 2 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH3 Lower timer trigger threshold channel 3 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 HYST_LO_CH0 Channel 0 lower hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH1 Channel 1 lower hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH2 Channel 2 lower hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH3 Channel 3 lower hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 CNT0_3_UPPER Upper Counter Trigger Level Channel 0 - 3 0xA4 32 read-write n 0x0 0x0 CNT_UP_CH0 Upper timer trigger threshold channel 0 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH1 Upper timer trigger threshold channel 1 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH2 Upper timer trigger threshold channel 2 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH3 Upper timer trigger threshold channel 3 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 HYST_UP_CH0 Channel 0 upper hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH1 Channel 1 upper hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH2 Channel 2 upper hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH3 Channel 3 upper hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 CNT4_7_LOWER Lower Counter Trigger Level Channel 4 to 7 0x9C 32 read-write n 0x0 0x0 CNT_LO_CH4 Lower timer trigger threshold channel 4 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH5 Lower timer trigger threshold channel 5 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH6 Lower timer trigger threshold channel 6 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_LO_CH7 Lower timer trigger threshold channel 6 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 HYST_LO_CH4 Channel 4 lower hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH5 Channel 5 lower hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH6 Channel 6 lower hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_LO_CH7 Channel 6 lower hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 CNT4_7_UPPER Upper Counter Trigger Level Channel 4 to 7 0xA8 32 read-write n 0x0 0x0 CNT_UP_CH4 Upper timer trigger threshold channel 4 0 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH5 Upper timer trigger threshold channel 5 8 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH6 Upper timer trigger threshold channel 6 16 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 CNT_UP_CH7 Upper timer trigger threshold channel 7 24 2 read-write value1 1 measurement 0x0 value2 2 measurements 0x1 value3 4 measurements 0x2 value4 8 measurements 0x3 value5 16 measurements 0x4 value6 32 measurements 0x5 value7 63 measurements 0x6 value8 63 measurements 0x7 HYST_UP_CH4 Channel 4 upper hysteresis 3 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH5 Channel 5 upper hysteresis 11 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH6 Channel 6 upper hysteresis 19 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 HYST_UP_CH7 Channel 7 upper hysteresis 27 1 read-write HYSTOFF hysteresis switched off 0x0 HYST4 hysteresis = 4 0x1 HYST8 hysteresis = 8 0x2 HYST16 hysteresis = 16 0x3 CTRL1 Measurement Unit Control Register 1 0x14 32 read-write n 0x0 0x0 CALIB_EN_6_0 Calibration Enable for Channels 6 to 0 0 6 read-only CH0_EN Channel 0 calibration enable 0b0000001 CH1_EN Channel 1 calibration enable 0b0000010 CH2_EN Channel 2 calibration enable 0b0000100 CH3_EN Channel 3 calibration enable 0b0001000 CH4_EN Channel 4 calibration enable 0b0010000 CH5_EN Channel 5 calibration enable 0b0100000 CH6_EN Channel 6 calibration enable 0b1000000 CTRL2 Measurement Unit Control Register 2 0x18 32 read-write n 0x0 0x0 MCM_PD_N Power Down Signal for MCM 0 read-only MCM Disabled Measurement Core Module disabled 0b0 MCM Enabled Measurement Core Module enabled 0b1 MCM_RDY Ready Signal for MCM after Power On or Reset 7 read-only MCM Not Ready Measurement Core Module in startup phase 0b0 MCM Ready Measurement Core Module start-up phase finished 0b1 SAMPLE_TIME_int Sample time of ADC2 8 3 read-write MICLK4 4 MI_CLK clock periods 0x0 MICLK6 6 MI_CLK clock periods 0x1 MICLK8 8 MI_CLK clock periods 0x2 MICLK10 10 MI_CLK clock periods 0x3 MICLK12 12 MI_CLK clock periods (default) 0x4 MICLK14 14 MI_CLK clock periods 0x5 MICLK16 16 MI_CLK clock periods 0x6 MICLK18 18 MI_CLK clock periods 0x7 MICLK20 20 MI_CLK clock periods 0x8 MICLK22 22 MI_CLK clock periods 0x9 CTRL4 Measurement Unit Control Register 4 0x1C 32 read-write n 0x0 0x0 FILT_OUT_SEL_6_0 Output Filter Selection for Channels 0 to 6 0 6 read-write ADC2 Unfiltered Data can be monitored in the corresponding ADC2_FILT_OUTx Registers . 0b0000000 Channel 0 IIR Data enabled for ADC2_FILT_OUT0 Register . 0b0000001 Channel 1 IIR Data enabled for ADC2_FILT_OUT1 Register . 0b0000010 Channel 2 IIR Data enabled for ADC2_FILT_OUT2 Register . 0b0000100 Channel 3 IIR Data enabled for ADC2_FILT_OUT3 Register . 0b0001000 Channel 4 IIR Data enabled for ADC2_FILT_OUT4 Register . 0b0010000 Channel 5 IIR Data enabled for ADC2_FILT_OUT5 Register . 0b0100000 Channel 6 IIR Data enabled for ADC2_FILT_OUT6 Register . 0b1000000 For Channels 6-0 IIR Data is enabled for ADC2_FILT_OUTx Registers . 0b1111111 CTRL_STS ADC2 Control and Status Register 0x0 32 read-write n 0x0 0x0 EOC ADC2 End of Conversion (software mode) 3 read-only Pending conversion still running 0b0 Finished conversion has finished 0b1 IN_MUX_SEL Channel for software mode 8 3 read-write CH0_EN Channel 0 enable 0b0000 CH1_EN Channel 1 enable 0b0001 CH2_EN Channel 2 enable 0b0010 CH3_EN Channel 3 enable 0b0011 CH4_EN Channel 4 enable 0b0100 CH5_EN Channel 5 enable 0b0101 CH6_EN Channel 6 enable 0b0110 rfu reserved for future use 0b0111 rfu reserved for future use 0b0111 SOS ADC2 Start of Sampling/Conversion (software mode) 2 read-write Disable no conversion is started 0b0 Enable conversion is started 0b1 FILTCOEFF0_7 Filter Coefficients ADC Channel 0-7 0x48 32 read-write n 0x0 0x0 A_CH0 Filter Coefficient A for ADC channel 0 0 1 read-only 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 A_CH1 Filter Coefficient A for ADC channel 1 2 1 read-only 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 A_CH2 Filter Coefficient A for ADC channel 2 4 1 read-only 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 A_CH3 Filter Coefficient A for ADC channel 3 6 1 read-only 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 A_CH4 Filter Coefficient A for ADC channel 4 8 1 read-only 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 A_CH5 Filter Coefficient A for ADC channel 5 10 1 read-only 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 A_CH6 Filter Coefficient A for ADC channel 6 12 1 read-only 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 A_CH7 Filter Coefficient A for ADC channel 7 14 1 read-only 1/2 weight of current sample 0b00 1/4 weight of current sample 0b01 1/8 weight of current sample 0b10 1/16 weight of current sample 0b11 FILT_LO_CTRL Lower Threshold Filter Enable 0x7C 32 read-write n 0x0 0x0 LOEN_Ch0 Lower threshold IIR filter enable ch 0 0 read-write value1 disable 0b0 value2 enable 0b1 LOEN_Ch1 Lower threshold IIR filter enable ch 1 1 read-write value1 disable 0b0 value2 enable 0b1 LOEN_Ch2 Lower threshold IIR filter enable ch 2 2 read-write value1 disable 0b0 value2 enable 0b1 LOEN_Ch3 Lower threshold IIR filter enable ch 3 3 read-write value1 disable 0b0 value2 enable 0b1 LOEN_Ch4 Lower threshold IIR filter enable ch 4 4 read-write value1 disable 0b0 value2 enable 0b1 LOEN_Ch5 Lower threshold IIR filter enable ch 5 5 read-write value1 disable 0b0 value2 enable 0b1 LOEN_Ch6 Lower threshold IIR filter enable ch 6 6 read-write value1 disable 0b0 value2 enable 0b1 FILT_OUT0 ADC or Filter Output Channel 0 0x50 32 read-write n 0x0 0x0 OUT_CH0 ADC or filter output value channel 0 0 9 read-only FILT_OUT1 ADC or Filter Output Channel 1 0x54 32 read-write n 0x0 0x0 OUT_CH1 ADC or filter output value channel 1 0 9 read-only FILT_OUT2 ADC or Filter Output Channel 2 0x58 32 read-write n 0x0 0x0 OUT_CH2 ADC or filter output value channel 2 0 9 read-only FILT_OUT3 ADC or Filter Output Channel 3 0x5C 32 read-write n 0x0 0x0 OUT_CH3 ADC or filter output value channel 3 0 9 read-only FILT_OUT4 ADC or Filter Output Channel 4 0x60 32 read-write n 0x0 0x0 OUT_CH4 ADC or filter output value channel 4 0 9 read-only FILT_OUT5 ADC or Filter Output Channel 5 0x64 32 read-write n 0x0 0x0 OUT_CH5 ADC or filter output value channel 5 0 9 read-only FILT_OUT6 ADC or Filter Output Channel 6 0x68 32 read-write n 0x0 0x0 OUT_CH6 ADC or filter output value channel 6 0 9 read-only FILT_UP_CTRL Upper Threshold Filter Enable 0x78 32 read-write n 0x0 0x0 UPEN_Ch0 Upper threshold IIR filter enable ch 0 0 read-write value1 disable 0b0 value2 enable 0b1 UPEN_Ch1 Upper threshold IIR filter enable ch 1 1 read-write value1 disable 0b0 value2 enable 0b1 UPEN_Ch2 Upper threshold IIR filter enable ch 2 2 read-write value1 disable 0b0 value2 enable 0b1 UPEN_Ch3 Upper threshold IIR filter enable ch 3 3 read-write value1 disable 0b0 value2 enable 0b1 UPEN_Ch4 Upper threshold IIR filter enable ch 4 4 read-write value1 disable 0b0 value2 enable 0b1 UPEN_Ch5 Upper threshold IIR filter enable ch 5 5 read-write value1 disable 0b0 value2 enable 0b1 UPEN_Ch6 Upper threshold IIR filter enable ch 6 6 read-write value1 disable 0b0 value2 enable 0b1 MAX_TIME Maximum Time for Software Mode 0x10 32 read-write n 0x0 0x0 MAX_TIME Maximum Time in Software Mode 0 7 read-write min Software mode is immediately left 0x00 max Software mode is active for 12.75 us 0xFF MMODE0_7 Measurement Mode of Ch 0-7 0xB0 32 read-write n 0x0 0x0 MSEL_Ch0 Measurement mode ch 0 0 1 read-only MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MSEL_Ch1 Measurement mode ch 1 2 1 read-only MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MSEL_Ch2 Measurement mode ch 2 4 1 read-only MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MSEL_Ch3 Measurement mode ch 3 6 1 read-only MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MSEL_Ch4 Measurement mode ch 4 8 1 read-only MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MSEL_Ch5 Measurement mode ch 5 10 1 read-only MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MSEL_Ch6 Measurement mode ch 6 12 1 read-only MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 MSEL_Ch7 Measurement mode ch 7 14 1 read-only MMODE0 upper and lower voltage/limit measurement 0b00 MMODEUV undervoltage/-limit measurement 0b01 MMODEOV overvoltage/-limit measurement 0b10 SQ1_4 Measurement Channel Enable Bits for Cycle 1-4 0x20 32 read-write n 0x0 0x0 SQ1 Sequence 1 channel enable 0 6 read-only CH0_EN Channel 0 enable 0b0000001 CH1_EN Channel 1 enable 0b0000010 CH2_EN Channel 2 enable 0b0000100 CH3_EN Channel 3 enable 0b0001000 CH4_EN Channel 4 enable 0b0010000 CH5_EN Channel 5 enable 0b0100000 CH6_EN Channel 6 enable 0b1000000 SQ2 Sequence 2 channel enable 8 6 read-only CH0_EN Channel 0 enable 0b0000001 CH1_EN Channel 1 enable 0b0000010 CH2_EN Channel 2 enable 0b0000100 CH3_EN Channel 3 enable 0b0001000 CH4_EN Channel 4 enable 0b0010000 CH5_EN Channel 5 enable 0b0100000 CH6_EN Channel 6 enable 0b1000000 SQ3 Sequence 3 channel enable 16 6 read-only CH0_EN Channel 0 enable 0b0000001 CH1_EN Channel 1 enable 0b0000010 CH2_EN Channel 2 enable 0b0000100 CH3_EN Channel 3 enable 0b0001000 CH4_EN Channel 4 enable 0b0010000 CH5_EN Channel 5 enable 0b0100000 CH6_EN Channel 6 enable 0b1000000 SQ4 Sequence 4 channel enable 24 6 read-only CH0_EN Channel 0 enable 0b0000001 CH1_EN Channel 1 enable 0b0000010 CH2_EN Channel 2 enable 0b0000100 CH3_EN Channel 3 enable 0b0001000 CH4_EN Channel 4 enable 0b0010000 CH5_EN Channel 5 enable 0b0100000 CH6_EN Channel 6 enable 0b1000000 SQ5_8 Measurement Channel Enable Bits for Cycle 5 - 8 0x24 32 read-write n 0x0 0x0 SQ5 Sequence 5 channel enable 0 6 read-only CH0_EN Channel 0 enable 0b0000001 CH1_EN Channel 1 enable 0b0000010 CH2_EN Channel 2 enable 0b0000100 CH3_EN Channel 3 enable 0b0001000 CH4_EN Channel 4 enable 0b0010000 CH5_EN Channel 5 enable 0b0100000 CH6_EN Channel 6 enable 0b1000000 SQ6 Sequence 6 channel enable 8 6 read-only CH0_EN Channel 0 enable 0b0000001 CH1_EN Channel 1 enable 0b0000010 CH2_EN Channel 2 enable 0b0000100 CH3_EN Channel 3 enable 0b0001000 CH4_EN Channel 4 enable 0b0010000 CH5_EN Channel 5 enable 0b0100000 CH6_EN Channel 6 enable 0b1000000 SQ7 Sequence 7 channel enable 16 6 read-only CH0_EN Channel 0 enable 0b0000001 CH1_EN Channel 1 enable 0b0000010 CH2_EN Channel 2 enable 0b0000100 CH3_EN Channel 3 enable 0b0001000 CH4_EN Channel 4 enable 0b0010000 CH5_EN Channel 5 enable 0b0100000 CH6_EN Channel 6 enable 0b1000000 SQ_FB Sequencer Feedback Register 0x4 32 read-write n 0x0 0x0 CHx_STS Current ADC2 Channel 16 3 read-only CH0 Channel 0 enable 0b0000 CH1 Channel 1 enable 0b0001 CH2 Channel 2 enable 0b0010 CH3 Channel 3 enable 0b0011 CH4 Channel 4 enable 0b0100 CH5 Channel 5 enable 0b0101 CH6 Channel 6 enable 0b0110 EIM_ACTIVE ADC2 EIM active 9 read-only not active EIM not active 0b0 active EIM active 0b1 SQx_STS Current Active ADC2 Sequence 11 2 read-only SQ1 Sequence 1 enable 0b000 SQ2 Sequence 2 enable 0b001 SQ3 Sequence 3 enable 0b010 SQ4 Sequence 4 enable 0b011 SQ5 Sequence 5 enable 0b100 SQ6 Sequence 6 enable 0b101 SQ7 Sequence 7 enable 0b110 SQ_FB Current Sequence that caused software mode 0 3 read-only SQ1 Sequence 1 0b0000 SQ2 Sequence 2 0b0001 SQ3 Sequence 3 0b0010 SQ4 Sequence 4 0b0011 SQ5 Sequence 5 0b0100 SQ6 Sequence 6 0b0101 SQ7 Sequence 7 0b0110 CH_MASK Channel Mask = 0 0b1011 SUSPEND Debug Suspend Mode 0b1100 SQ_STOP ADC2 Sequencer Stop Signal for DPP 8 read-only DPP Running Postprocessing Sequencer in running mode 0b0 DPP Stopped Postprocessing Sequencer stopped / Software Mode entered 0b1 STATUS ADC2 HV Status Register 0xBC 32 read-write n 0x0 0x0 READY HVADC Ready bit 1 read-only Not ready Module in power down or in init phase 0b0 Ready set automatically 5 ADC clock cycles after module is enabled 0b1 TH0_3_LOWER Lower Comparator Trigger Level Channel 0 -3 0x80 32 read-write n 0x0 0x0 THLO_CH0 Channel 0 lower trigger level 0 7 read-only value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF THLO_CH1 Channel 1 lower trigger level 8 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF THLO_CH2 Channel 2 lower trigger level 16 7 read-only value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF THLO_CH3 Channel 3 lower trigger level 24 7 read-only value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF TH0_3_UPPER Upper Comparator Trigger Level Channel 0-3 0x8C 32 read-write n 0x0 0x0 THUP_CH0 Channel 0 upper trigger level 0 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF THUP_CH1 Channel 1 upper trigger level 8 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF THUP_CH2 Channel 2 upper trigger level 16 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF THUP_CH3 Channel 3 upper trigger level 24 7 read-write value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF TH4_7_LOWER Lower Comparator Trigger Level Channel 4 to 7 0x84 32 read-write n 0x0 0x0 THLO_CH4 Channel 4 lower trigger level 0 7 read-only value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF THLO_CH5 Channel 5 lower trigger level 8 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF THLO_CH6 Channel 6 lower trigger level 16 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF THLO_CH7 Channel 7 lower trigger level 24 7 read-write value1 Min. threshold value 0x00 value2 Max. threshold value 0xFF TH4_7_UPPER Upper Comparator Trigger Level Channel 4 -7 0x90 32 read-write n 0x0 0x0 THUP_CH4 Channel 4 upper trigger level 0 7 read-only value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF THUP_CH5 Channel 5 upper trigger level 8 7 read-only value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF THUP_CH6 Channel 6 upper trigger level 16 7 read-only value1 min threshold value = 0 0x00 value2 max. threshold value = 255 0xFF THUP_CH7 Channel 7 upper trigger level 24 7 read-only value1 min. threshold value = 0 0x00 value2 max. threshold value = 255 0xFF CCU6 CCU6 CCU6 0x0 0x0 0x50 registers n CC60R Capture/Compare Register for Channel CC60 0x34 16 read-write n 0x0 0x0 CCV Channel 0 Capture/Compare Value 0 15 read-only CC60SR Capture/Compare Shadow Register for Channel CC60 0x14 16 read-write n 0x0 0x0 CCS Shadow Register for Channel 0 Capture/Compare Value 0 15 read-write CC61R Capture/Compare Register for Channel CC61 0x38 16 read-write n 0x0 0x0 CCV Channel 1 Capture/Compare Value 0 15 read-only CC61SR Capture/Compare Shadow Register for Channel CC61 0x18 16 read-write n 0x0 0x0 CCS Shadow Register for Channel 1 Capture/Compare Value 0 15 read-write CC62R Capture/Compare Register for Channel CC62 0x3C 16 read-write n 0x0 0x0 CCV Channel 2 Capture/Compare Value 0 15 read-only CC62SR Capture/Compare Shadow Register for Channel CC62 0x1C 16 read-write n 0x0 0x0 CCS Shadow Register for Channel 2 Capture/Compare Value 0 15 read-write CC63R Capture/Compare Register for Channel CC63 0x0 16 read-write n 0x0 0x0 CCV Channel CC63 Compare Value Low Byte 0 15 read-only CC63SR Capture/Compare Shadow Register for Channel CC63 0x20 16 read-write n 0x0 0x0 CCS Shadow Register for Channel CC63 Compare Value 0 15 read-write CMPMODIF Compare State Modification Register 0x10 16 read-write n 0x0 0x0 MCC60R Capture/Compare Status Modification Bit 0(Reset) 8 write-only Not changed Bit CC60ST is not changed. 0b0 Reset Bit CC60ST is reset. 0b1 MCC60S Capture/Compare Status Modification Bit 0 (Set) 0 write-only Not changed Bit CC60ST is not changed. 0b0 Set Bit CC60ST is set. 0b1 MCC61R Capture/Compare Status Modification Bit 1(Reset) 9 write-only Not changed Bit CC61ST is not changed. 0b0 Reset Bit CC61ST is reset. 0b1 MCC61S Capture/Compare Status Modification Bit 1 (Set) 1 write-only Not changed Bit CC61ST is not changed. 0b0 Set Bit CC61ST is set. 0b1 MCC62R Capture/Compare Status Modification Bit 2(Reset) 10 write-only Not changed Bit CC62ST is not changed. 0b0 Reset Bit CC62ST is reset. 0b1 MCC62S Capture/Compare Status Modification Bit 2 (Set) 2 write-only Not changed Bit CC62ST is not changed. 0b0 Set Bit CC62ST is set. 0b1 MCC63R Capture/Compare Status Modification Bits (Reset) 14 write-only Not changed Bit CC63ST is not changed. 0b0 Reset Bit CC63ST is reset. 0b1 MCC63S Capture/Compare Status Modification Bits (Set) 6 write-only Not changed Bit CC63ST is not changed. 0b0 Set Bit CC63ST is set. 0b1 CMPSTAT Compare State Register 0x80 16 read-write n 0x0 0x0 CC60PS Passive State Select for Compare Outputs 8 read-write Zero The corresponding compare output drives passive level while CC6xST is 0. 0b0 One The corresponding compare output drives passive level while CC6xST is 1. 0b1 CC60ST Capture/Compare State Bits 0 read-only Less In compare mode, the timer count is less than the compare value. In capture mode, the selected edge has not yet been detected since the bit has been reset by software the last time. 0b0 Greater In compare mode, the counter value is greater than or equal to the compare value. In capture mode, the selected edge has been detected. 0b1 CC61PS Passive State Select for Compare Outputs 10 read-write Zero The corresponding compare output drives passive level while CC6xST is 0. 0b0 One The corresponding compare output drives passive level while CC6xST is 1. 0b1 CC61ST Capture/Compare State Bits 1 read-only Less In compare mode, the timer count is less than the compare value. In capture mode, the selected edge has not yet been detected since the bit has been reset by software the last time. 0b0 Greater In compare mode, the counter value is greater than or equal to the compare value. In capture mode, the selected edge has been detected. 0b1 CC62PS Passive State Select for Compare Outputs 12 read-write Zero The corresponding compare output drives passive level while CC6xST is 0. 0b0 One The corresponding compare output drives passive level while CC6xST is 1. 0b1 CC62ST Capture/Compare State Bits 2 read-only Less In compare mode, the timer count is less than the compare value. In capture mode, the selected edge has not yet been detected since the bit has been reset by software the last time. 0b0 Greater In compare mode, the counter value is greater than or equal to the compare value. In capture mode, the selected edge has been detected. 0b1 CC63ST Capture/Compare State Bits 6 read-only Less In compare mode, the timer count is less than the compare value. In capture mode, the selected edge has not yet been detected since the bit has been reset by software the last time. 0b0 Greater In compare mode, the counter value is greater than or equal to the compare value. In capture mode, the selected edge has been detected. 0b1 CCPOS0 Sampled Hall Pattern Bit 0 3 read-only Zero The input CCPOS0 has been sampled as 0. 0b0 One The input CCPOS0 has been sampled as 1. 0b1 CCPOS1 Sampled Hall Pattern Bit 1 4 read-only Zero The input CCPOS1 has been sampled as 0. 0b0 One The input CCPOS1 has been sampled as 1. 0b1 CCPOS2 Sampled Hall Pattern Bit 2 5 read-only Zero The input CCPOS2 has been sampled as 0. 0b0 One The input CCPOS2 has been sampled as 1. 0b1 COUT60PS Passive State Select for Compare Outputs 9 read-write Zero The corresponding compare output drives passive level while CC6xST is 0. 0b0 One The corresponding compare output drives passive level while CC6xST is 1. 0b1 COUT61PS Passive State Select for Compare Outputs 11 read-write Zero The corresponding compare output drives passive level while CC6xST is 0. 0b0 One The corresponding compare output drives passive level while CC6xST is 1. 0b1 COUT62PS Passive State Select for Compare Outputs 13 read-write Zero The corresponding compare output drives passive level while CC6xST is 0. 0b0 One The corresponding compare output drives passive level while CC6xST is 1. 0b1 COUT63PS Passive State Select for Compare Outputs 14 read-write Zero The corresponding compare output drives passive level while CC6xST is 0. 0b0 One The corresponding compare output drives passive level while CC6xST is 1. 0b1 T13IM T13 Inverted Modulation 15 read-write Not inverted T13 output is not inverted. 0b0 Inverted T13 output is inverted for further modulation. 0b1 IEN Capture/Compare Interrupt Enable Register 0x44 16 read-write n 0x0 0x0 ENCC60F Capture, Compare-Match Falling Edge Interrupt Enable for Channel 0 1 read-write No interrupt No interrupt will be generated if the set condition for bit CC60F in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit CC60F in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC60. 0b1 ENCC60R Capture, Compare-Match Rising Edge Interrupt Enable for Channel 0 0 read-write No interrupt No interrupt will be generated if the set condition for bit CC60R in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit CC60R in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC60. 0b1 ENCC61F Capture, Compare-Match Falling Edge Interrupt Enable for Channel 1 3 read-write No interrupt No interrupt will be generated if the set condition for bit CC61F in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit CC61F in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC61. 0b1 ENCC61R Capture, Compare-Match Rising Edge Interrupt Enable for Channel 1 2 read-write No interrupt No interrupt will be generated if the set condition for bit CC61R in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit CC61R in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC61. 0b1 ENCC62F Capture, Compare-Match Falling Edge Interrupt Enable for Channel 2 5 read-write No interrupt No interrupt will be generated if the set condition for bit CC62F in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit CC62F in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC62. 0b1 ENCC62R Capture, Compare-Match Rising Edge Interrupt Enable for Channel 2 4 read-write No interrupt No interrupt will be generated if the set condition for bit CC62R in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit CC62R in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC62. 0b1 ENCHE Enable Interrupt for Correct Hall Event 12 read-write No interrupt No interrupt will be generated if the set condition for bit CHE in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit CHE in register IS occurs. The interrupt line that will be activated is selected by bit field INPCHE. 0b1 ENIDLE Enable Idle 14 read-write IDLE not set The bit IDLE is not automatically set when a wrong hall event is detected. 0b0 IDLE set The bit IDLE is automatically set when a wrong hall event is detected. 0b1 ENSTR Enable Multi-Channel Mode Shadow Transfer Interrupt 15 read-write No interrupt No interrupt will be generated if the set condition for bit STR in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit STR in register IS occurs. The interrupt line that will be activated is selected by bit field INPCHE. 0b1 ENT12OM Enable Interrupt for T12 One-Match 6 read-write No interrupt No interrupt will be generated if the set condition for bit T12OM in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit T12OM in register IS occurs. The interrupt line that will be activated is selected by bit field INPT12. 0b1 ENT12PM Enable Interrupt for T12 Period-Match 7 read-write No interrupt No interrupt will be generated if the set condition for bit T12PM in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit T12PM in register IS occurs. The interrupt line that will be activated is selected by bit field INPT12. 0b1 ENT13CM Enable Interrupt for T13 Compare-Match 8 read-write No interrupt No interrupt will be generated if the set condition for bit T13CM in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit T13CM in register IS occurs. The interrupt line that will be activated is selected by bit field INPT13. 0b1 ENT13PM Enable Interrupt for T13 Period-Match 9 read-write No interrupt No interrupt will be generated if the set condition for bit T13PM in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit T13PM in register IS occurs. The interrupt line that will be activated is selected by bit field INPT13. 0b1 ENTRPF Enable Interrupt for Trap Flag 10 read-write No interrupt No interrupt will be generated if the set condition for bit TRPF in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit TRPF in register IS occurs. The interrupt line that will be activated is selected by bit field INPERR. 0b1 ENWHE Enable Interrupt for Wrong Hall Event 13 read-write No interrupt No interrupt will be generated if the set condition for bit WHE in register IS occurs. 0b0 Interrupt An interrupt will be generated if the set condition for bit WHE in register IS occurs. The interrupt line that will be activated is selected by bit field INPERR. 0b1 INP Capture/Compare Interrupt Node Pointer Register 0x48 16 read-write n 0x0 0x0 INPCC60 Interrupt Node Pointer for Channel 0 Interrupts 0 1 read-write SR0 Interrupt output line SR0 is selected. 0b00 SR1 Interrupt output line SR1 is selected. 0b01 SR2 Interrupt output line SR2 is selected. 0b10 SR3 Interrupt output line SR3 is selected. 0b11 INPCC61 Interrupt Node Pointer for Channel 1 Interrupts 2 1 read-write SR0 Interrupt output line SR0 is selected. 0b00 SR1 Interrupt output line SR1 is selected. 0b01 SR2 Interrupt output line SR2 is selected. 0b10 SR3 Interrupt output line SR3 is selected. 0b11 INPCC62 Interrupt Node Pointer for Channel 2 Interrupts 4 1 read-write SR0 Interrupt output line SR0 is selected. 0b00 SR1 Interrupt output line SR1 is selected. 0b01 SR2 Interrupt output line SR2 is selected. 0b10 SR3 Interrupt output line SR3 is selected. 0b11 INPCHE Interrupt Node Pointer for the CHE Interrupt 6 1 read-write SR0 Interrupt output line SR0 is selected. 0b00 SR1 Interrupt output line SR1 is selected. 0b01 SR2 Interrupt output line SR2 is selected. 0b10 SR3 Interrupt output line SR3 is selected. 0b11 INPERR Interrupt Node Pointer for Error Interrupts 8 1 read-write SR0 Interrupt output line SR0 is selected. 0b00 SR1 Interrupt output line SR1 is selected. 0b01 SR2 Interrupt output line SR2 is selected. 0b10 SR3 Interrupt output line SR3 is selected. 0b11 INPT12 Interrupt Node Pointer for Timer T12 Interrupts 10 1 read-write SR0 Interrupt output line SR0 is selected. 0b00 SR1 Interrupt output line SR1 is selected. 0b01 SR2 Interrupt output line SR2 is selected. 0b10 SR3 Interrupt output line SR3 is selected. 0b11 INPT13 Interrupt Node Pointer for Timer T13 Interrupts 12 1 read-write SR0 Interrupt output line SR0 is selected. 0b00 SR1 Interrupt output line SR1 is selected. 0b01 SR2 Interrupt output line SR2 is selected. 0b10 SR3 Interrupt output line SR3 is selected. 0b11 IS Capture/Compare Interrupt Status Register 0x68 16 read-write n 0x0 0x0 CHE Correct Hall Event 12 read-only Not detected A transition to a correct (= expected) hall event has not yet been detected since this bit has been reset for the last time. 0b0 Detected A transition to a correct (= expected) hall event has been detected. 0b1 ICC60F Capture, Compare-Match Falling Edge Flag 1 read-only Not occurred The event has not yet occurred since this bit has been reset for the last time. 0b0 Detected The event described above has been detected. 0b1 ICC60R Capture, Compare-Match Rising Edge Flag 0 read-only Not occurred The event has not yet occurred since this bit has been reset for the last time. 0b0 Detected The event described above has been detected. 0b1 ICC61F Capture, Compare-Match Falling Edge Flag 3 read-only Not occurred The event has not yet occurred since this bit has been reset for the last time. 0b0 Detected The event described above has been detected. 0b1 ICC61R Capture, Compare-Match Rising Edge Flag 2 read-only Not occurred The event has not yet occurred since this bit has been reset for the last time. 0b0 Detected The event described above has been detected. 0b1 ICC62F Capture, Compare-Match Falling Edge Flag 5 read-only Not occurred The event has not yet occurred since this bit has been reset for the last time. 0b0 Detected The event described above has been detected. 0b1 ICC62R Capture, Compare-Match Rising Edge Flag 4 read-only Not occurred The event has not yet occurred since this bit has been reset for the last time. 0b0 Detected The event described above has been detected. 0b1 IDLE IDLE State 14 read-only No action None 0b0 Idle Bit field MCMP is cleared and held to 0, the selected outputs are set to passive state. 0b1 STR Multi-Channel Mode Shadow Transfer Request 15 read-only No The shadow transfer has not yet taken place. 0b0 Yes The shadow transfer has taken place. 0b1 T12OM Timer T12 One-Match Flag 6 read-only Not detected A timer T12 one-match (while counting down) has not yet been detected since this bit has been reset for the last time. 0b0 Detected A timer T12 one-match (while counting down) has been detected. 0b1 T12PM Timer T12 Period-Match Flag 7 read-only Not detected A timer T12 period-match (while counting up) has not yet been detected since this bit has been reset for the last time. 0b0 Detected A timer T12 period-match (while counting up) has been detected. 0b1 T13CM Timer T13 Compare-Match Flag 8 read-only Not detected A timer T13 compare-match has not yet been detected since this bit has been reset for the last time. 0b0 Detected A timer T13 compare-match has been detected. 0b1 T13PM Timer T13 Period-Match Flag 9 read-only Not detected A timer T13 period-match has not yet been detected since this bit has been reset for the last time. 0b0 Detected A timer T13 period-match has been detected. 0b1 TRPF Trap Flag 10 read-only Not detected The trap condition has not been detected. 0b0 Detected The trap condition has been detected (input CTRAP has been 0 or by software). 0b1 TRPS Trap State 11 read-only Not active The trap state is not active. 0b0 Active The trap state is active. Bit TRPS is set while bit TRPF = 1. It is reset according to the mode selected in register TRPCTR. 0b1 WHE Wrong Hall Event 13 read-only Not detected A transition to a wrong hall event (not the expected one) has not yet been detected since this bit has been reset for the last time. 0b0 Detected A transition to a wrong hall event (not the expected one) has been detected. 0b1 ISR Capture/Compare Interrupt Status Reset Register 0xC 16 read-write n 0x0 0x0 RCC60F Reset Capture, Compare-Match Falling Edge Flag 1 write-only No action None 0b0 Reset Bit CC60F in register IS will be reset. 0b1 RCC60R Reset Capture, Compare-Match Rising Edge Flag 0 write-only No action None 0b0 Reset Bit CC60R in register IS will be reset. 0b1 RCC61F Reset Capture, Compare-Match Falling Edge Flag 3 write-only No action None 0b0 Reset Bit CC61F in register IS will be reset. 0b1 RCC61R Reset Capture, Compare-Match Rising Edge Flag 2 write-only No action None 0b0 Reset Bit CC61R in register IS will be reset. 0b1 RCC62F Reset Capture, Compare-Match Falling Edge Flag 5 write-only No action None 0b0 Reset Bit CC62F in register IS will be reset. 0b1 RCC62R Reset Capture, Compare-Match Rising Edge Flag 4 write-only No action None 0b0 Reset Bit CC62R in register IS will be reset. 0b1 RCHE Reset Correct Hall Event Flag 12 write-only No action None 0b0 Reset Bit CHE in register IS will be reset. 0b1 RIDLE Reset IDLE Flag 14 write-only No action None 0b0 Reset Bit IDLE in register IS will be reset. 0b1 RSTR Reset STR Flag 15 write-only No action None 0b0 Reset Bit STR in register IS will be reset. 0b1 RT12OM Reset Timer T12 One-Match Flag 6 write-only No action None 0b0 Reset Bit T12OM in register IS will be reset. 0b1 RT12PM Reset Timer T12 Period-Match Flag 7 write-only No action None 0b0 Reset Bit T12PM in register IS will be reset. 0b1 RT13CM Reset Timer T13 Compare-Match Flag 8 write-only No action None 0b0 Reset Bit T13CM in register IS will be reset. 0b1 RT13PM Reset Timer T13 Period-Match Flag 9 write-only No action None 0b0 Reset Bit T13PM in register IS will be reset. 0b1 RTRPF Reset Trap Flag 10 write-only No action None 0b0 Reset Bit TRPF in register IS will be reset (not taken into account while input CTRAP = 0 and TRPPEN = 1. 0b1 RWHE Reset Wrong Hall Event Flag 13 write-only No action None 0b0 Reset Bit WHE in register IS will be reset. 0b1 ISS Capture/Compare Interrupt Status Set Register 0x4C 16 read-write n 0x0 0x0 SCC60F Set Capture, Compare-Match Falling Edge Flag 1 write-only No action None 0b0 Set Bit CC60F in register IS will be set. 0b1 SCC60R Set Capture, Compare-Match Rising Edge Flag 0 write-only No action None 0b0 Set Bit CC60R in register IS will be set. 0b1 SCC61F Set Capture, Compare-Match Falling Edge Flag 3 write-only No action None 0b0 Set Bit CC61F in register IS will be set. 0b1 SCC61R Set Capture, Compare-Match Rising Edge Flag 2 write-only No action None 0b0 Set Bit CC61R in register IS will be set. 0b1 SCC62F Set Capture, Compare-Match Falling Edge Flag 5 write-only No action None 0b0 Set Bit CC62F in register IS will be set. 0b1 SCC62R Set Capture, Compare-Match Rising Edge Flag 4 write-only No action None 0b0 Set Bit CC62R in register IS will be set. 0b1 SCHE Set Correct Hall Event Flag 12 write-only No action None 0b0 Set Bit CHE in register IS will be set. 0b1 SIDLE Set IDLE Flag 14 write-only No action None 0b0 Set Bit IDLE in register IS will be set. 0b1 SSTR Set STR Flag 15 write-only No action None 0b0 Set Bit STR in register IS will be set. 0b1 ST12OM Set Timer T12 One-Match Flag 6 write-only No action None 0b0 Set Bit T12OM in register IS will be set. 0b1 ST12PM Set Timer T12 Period-Match Flag 7 write-only No action None 0b0 Set Bit T12PM in register IS will be set. 0b1 ST13CM Set Timer T13 Compare-Match Flag 8 write-only No action None 0b0 Set Bit T13CM in register IS will be set. 0b1 ST13PM Set Timer T13 Period-Match Flag 9 write-only No action None 0b0 Set Bit T13PM in register IS will be set. 0b1 STRPF Set Trap Flag 10 write-only No action None 0b0 Set Bits TRPF and TRPS in register IS will be set. 0b1 SWHC Software Hall Compare 11 write-only No action None 0b0 Set The Hall compare action is triggered. 0b1 SWHE Set Wrong Hall Event Flag 13 write-only No action None 0b0 Set Bit WHE in register IS will be set. 0b1 MCMCTR Multi-Channel Mode Control Register 0x54 16 read-write n 0x0 0x0 STE12D Shadow Transfer Enable for T12 Downcounting 9 read-write No action None 0b0 Enabled The T12_ST shadow transfer mechanism is enabled if MCMEN = 1. 0b1 STE12U Shadow Transfer Enable for T12 Upcounting 8 read-write No action None 0b0 Enabled The T12_ST shadow transfer mechanism is enabled if MCMEN = 1. 0b1 STE13U Shadow Transfer Enable for T13 Upcounting 10 read-write No action None 0b0 Enabled The T13_ST shadow transfer mechanism is enabled if MCMEN = 1. 0b1 SWSEL Switching Selection 0 2 read-write No request no trigger request will be generated 0b000 Correct pattern correct hall pattern on CCPOSx detected 0b001 T13 period-match T13 period-match detected (while counting up) 0b010 T12 one-match T12 one-match (while counting down) 0b011 T12 channel1 compare-match T12 channel 1 compare-match detected (phase delay function) 0b100 T12 period-match T12 period match detected (while counting up) else reserved, no trigger request will be generated 0b101 SWSYN Switching Synchronization 4 1 read-write Direct the trigger event directly causes the shadow transfer 0b00 T13 zero-match T13 zero-match triggers the shadow transfer 0b01 T12 zero-match a T12 zero-match (while counting up) triggers the shadow transfer 0b10 MCMOUT Multi-Channel Mode Output Register 0x64 16 read-write n 0x0 0x0 CURH Current Hall Pattern 11 2 read-only EXPH Expected Hall Pattern 8 2 read-only MCMP Multi-Channel PWM Pattern 0 5 read-only Passive The output is set to the passive state. The PWM generated by T12 or T13 is not taken into account. 0b0 PWM The output can deliver the PWM generated by T12 or T13 (according to register MODCTR). 0b1 R Reminder Flag 6 read-only No shadow transfer Currently, no shadow transfer from MCMPS to MCMP is requested. 0b0 Shadow transfer A shadow transfer from MCMPS to MCMP has been requested by the selected trigger source, but it has not yet been executed, because the selected synchronization condition has not yet occurred. 0b1 MCMOUTS Multi-Channel Mode Output Shadow Register 0x8 16 read-write n 0x0 0x0 CURHS Current Hall Pattern Shadow 11 2 read-write EXPHS Expected Hall Pattern Shadow 8 2 read-write MCMPS Multi-Channel PWM Pattern Shadow 0 5 read-write STRHP Shadow Transfer Request for the Hall Pattern 15 write-only by Hardware The bit fields CURH and EXPH are updated according to the defined hardware action. The write access to bit fields CURHS and EXPHS does not modify the bit fields CURH and EXPH. 0b0 by Software The bit fields CURH and EXPH are updated by the value written to the bit fields CURHS and EXPHS. 0b1 STRMCM Shadow Transfer Request for MCMPS 7 write-only by Hardware Bit field MCMP is updated according to the defined hardware action. The write access to bit field MCMPS does not modify bit field MCMP. 0b0 by Software Bit field MCMP is updated by the value written to bit field MCMPS. 0b1 MODCTR Modulation Control Register 0x5C 16 read-write n 0x0 0x0 ECT13O Enable Compare Timer T13 Output 15 read-write Disabled The alternate output function COUT63 is disabled. 0b0 Enabled The alternate output function COUT63 is enabled for the PWM signal generated by T13. 0b1 MCMEN Multi-Channel Mode Enable 7 read-write Disabled The modulation of the corresponding output signal by a multi-channel pattern according to bit field MCMOUT is disabled. 0b0 Enabled The modulation of the corresponding output signal by a multi-channel pattern according to bit field MCMOUT is enabled. 0b1 T12MODEN T12 Modulation Enable 0 5 read-write Disabled The modulation of the corresponding output signal by a T12 PWM pattern is disabled. 0b0 Enabled The modulation of the corresponding output signal by a T12 PWM pattern is enabled. 0b1 T13MODEN T13 Modulation Enable 8 5 read-write Disabled The modulation of the corresponding output signal by a T13 PWM pattern is disabled. 0b0 Enabled The modulation of the corresponding output signal by a T13 PWM pattern is enabled. 0b1 PISEL0 Port Input Select Register 0 0x6C 16 read-write n 0x0 0x0 ISCC60 Input Select for CC60 0 1 read-write CC60_0 The input pin for CC60_0. 0b00 CC60_1 The input pin for CC60_1. 0b01 ISCC61 Input Select for CC61 2 1 read-write CC61_0 The input pin for CC61_0. 0b00 CC61_1 The input pin for CC61_1. 0b01 ISCC62 Input Select for CC62 4 1 read-write CC62_0 The input pin for CC62_0. 0b00 CC62_1 The input pin for CC62_1. 0b01 ISPOS0 Input Select for CCPOS0 8 1 read-write CCPOS0_0 The input pin for CCPOS0_0. 0b00 CCPOS0_1 The input pin for CCPOS0_1. 0b01 CCPOS0_2 The input pin for CCPOS0_2. 0b10 CCPOS0_3 The input pin for CCPOS0_3. 0b11 ISPOS1 Input Select for CCPOS1 10 1 read-write CCPOS1_0 The input pin for CCPOS1_0. 0b00 CCPOS1_1 The input pin for CCPOS1_1. 0b01 CCPOS1_2 The input pin for CCPOS1_2. 0b10 CCPOS1_3 The input pin for CCPOS1_3. 0b11 ISPOS2 Input Select for CCPOS2 12 1 read-write CCPOS2_0 The input pin for CCPOS2_0. 0b00 CCPOS2_1 The input pin for CCPOS2_1. 0b01 CCPOS2_2 The input pin for CCPOS2_2. 0b10 CCPOS2_3 The input pin for CCPOS2_3. 0b11 IST12HR Input Select for T12HR 14 1 read-write T12HRA Either signal T12HRA (if T12EXT = 0) or T12HRE (if T12EXT = 1) is selected. 0b00 T12HRB Either signal T12HRB (if T12EXT = 0) or T12HRF (if T12EXT = 1) is selected. 0b01 T12HRC Either signal T12HRC (if T12EXT = 0) or T12HRG (if T12EXT = 1) is selected. 0b10 T12HRD Either signal T12HRD (if T12EXT = 0) or T12HRH (if T12EXT = 1) is selected. 0b11 ISTRP Input Select for CTRAP 6 1 read-write CTRAP_0 The input pin for CTRAP_0. 0b00 CTRAP_1 The input pin for CTRAP_1. 0b01 CTRAP_2 The input pin for CTRAP_2. 0b10 CTRAP_3 signal from Differential Units. 0b11 PISEL2 Port Input Select Register 2 0x74 16 read-write n 0x0 0x0 ISCNT12 Input Select for T12 Counting Input 2 1 read-write T12 prescaler The T12 prescaler generates the counting events. Bit TCTR4.T12CNT is not taken into account. 0b00 TCTR4.T12CNT Bit TCTR4.T12CNT written with 1 is a counting event. The T12 prescaler is not taken into account. 0b01 Rising edge The timer T12 is counting each rising edge detected in the selected T12HR signal. 0b10 Falling edge The timer T12 is counting each falling edge detected in the selected T12HR signal. 0b11 ISCNT13 Input Select for T13 Counting Input 4 1 read-write T13 prescaler The T13 prescaler generates the counting events. Bit TCTR4.T13CNT is not taken into account. 0b00 TCTR4.T13CNT Bit TCTR4.T13CNT written with 1 is a counting event. The T13 prescaler is not taken into account. 0b01 Rising edge The timer T13 is counting each rising edge detected in the selected T13HR signal. 0b10 Falling Edge The timer T13 is counting each falling edge detected in the selected T13HR signal. 0b11 IST13HR Input Select for T13HR 0 1 read-write T13HRA Either signal T13HRA (if T13EXT = 0) or T13HRE (if T13EXT = 1) is selected. 0b00 T13HRB Either signal T13HRB (if T13EXT = 0) or T13HRF (if T13EXT = 1) is selected. 0b01 T13HRC Either signal T13HRC (if T13EXT = 0) or T13HRG (if T13EXT = 1) is selected. 0b10 T13HRD Either signal T13HRD (if T13EXT = 0) or T13HRH (if T13EXT = 1) is selected. 0b11 T12EXT Extension for T12HR Inputs 6 read-write T12HR[D:A] One of the signals T12HR[D:A] is selected. 0b0 T12HR[H:E] One of the signals T12HR[H:E] is selected. 0b1 T13EXT Extension for T13HR Inputs 7 read-write T13HR[D:A] One of the signals T13HR[D:A] is selected. 0b0 T13HR[H:E] One of the signals T13HR[H:E] is selected. 0b1 PSLR Passive State Level Register 0x50 16 read-write n 0x0 0x0 PSL Compare Outputs Passive State Level 0 5 read-write Level 0 The passive level is 0. 0b0 Level 1 The passive level is 1. 0b1 PSL63 Passive State Level of Output COUT63 7 read-write Level 0 The passive level is 0. 0b0 Level 1 The passive level is 1. 0b1 T12 Timer T12 Counter Register 0x78 16 read-write n 0x0 0x0 T12CV Timer T12 Counter Value 0 15 read-write T12DTC Dead-Time Control Register for Timer T12 Low 0x2C 16 read-write n 0x0 0x0 DTE0 Dead-Time Enable Bit 0 8 read-write Disabled Dead-time generation is disabled. The corresponding outputs switch from the passive state to the active state (according to the actual compare status) without any delay. 0b0 Enabled Dead-time generation is enabled. The corresponding outputs switch from the passive state to the active state (according to the compare status) with the delay programmed in bit field DTM. 0b1 DTE1 Dead-Time Enable Bit 1 9 read-write Disabled Dead-time generation is disabled. The corresponding outputs switch from the passive state to the active state (according to the actual compare status) without any delay. 0b0 Enabled Dead-time generation is enabled. The corresponding outputs switch from the passive state to the active state (according to the compare status) with the delay programmed in bit field DTM. 0b1 DTE2 Dead-Time Enable Bit 2 10 read-write Disabled Dead-time generation is disabled. The corresponding outputs switch from the passive state to the active state (according to the actual compare status) without any delay. 0b0 Enabled Dead-time generation is enabled. The corresponding outputs switch from the passive state to the active state (according to the compare status) with the delay programmed in bit field DTM. 0b1 DTM Dead-Time 0 7 read-write DTR0 Dead-Time Run Indication Bit 0 12 read-only Zero The value of the corresponding dead-time counter channel is 0. 0b0 Not Zero The value of the corresponding dead-time counter channel is not 0. 0b1 DTR1 Dead-Time Run Indication Bit 1 13 read-only Zero The value of the corresponding dead-time counter channel is 0. 0b0 Not Zero The value of the corresponding dead-time counter channel is not 0. 0b1 DTR2 Dead-Time Run Indication Bit 2 14 read-only Zero The value of the corresponding dead-time counter channel is 0. 0b0 Not Zero The value of the corresponding dead-time counter channel is not 0. 0b1 T12MSEL T12 Capture/Compare Mode Select Register 0x40 16 read-write n 0x0 0x0 DBYP Delay Bypass 15 read-write Not active The delay bypass is not active. The dead-time counter DTC0 is generating a delay after the source signal becomes active. 0b0 Active The delay bypass is active. The dead-time counter DTC0 is not used by the sampling of the Hall pattern. 0b1 HSYNC Hall Synchronization 12 2 read-write Any Any edge at one of the inputs CCPOSx (x = 0, 1, 2) triggers the sampling. 0b000 T13 compare-match A T13 compare-match triggers the sampling. 0b001 T13 period-match A T13 period-match triggers the sampling. 0b010 Hall The Hall sampling triggered by hardware sources is switched off. 0b011 T12 period-match A T12 period-match (while counting up) triggers the sampling. 0b100 T12 one-match A T12 one-match (while counting down) triggers the sampling. 0b101 T12 compare-match UP A T12 compare-match of channel 0 (while counting up) triggers the sampling. 0b110 T12 compare-match DOWN A T12 compare-match of channel 0 (while counting down) triggers the sampling. 0b111 MSEL60 Capture/Compare Mode Selection 0 3 read-write Compare outputs disabled Compare outputs disabled, pins CC6n and COUT6n can be used for I/O. No capture action. 0b0000 Pin CC6n, pin COUT6n Compare output on pin CC6n, pin COUT6n can be used for I/O. No capture action. 0b0001 Pin COUT6n, Pin CC6n Compare output on pin COUT6n, pin CC6n can be used for I/O. No capture action. 0b0010 Pins COUT6n and CC6n Compare output on pins COUT6n and CC6n. 0b0011 Double-Register Capture modes see . 0b01XX Hall Sensor mode see . In order to enable the hall edge detection, all three MSEL6x must be programmed to Hall Sensor mode. 0b1000 Hysteresis-like mode see . 0b1001 Multi-Input Capture modes see . 0b101X Multi-Input Capture modes see . 0b101X MSEL61 Capture/Compare Mode Selection 4 3 read-write Compare outputs disabled Compare outputs disabled, pins CC6n and COUT6n can be used for I/O. No capture action. 0b0000 Pin CC6n, pin COUT6n Compare output on pin CC6n, pin COUT6n can be used for I/O. No capture action. 0b0001 Pin COUT6n, Pin CC6n Compare output on pin COUT6n, pin CC6n can be used for I/O. No capture action. 0b0010 Pins COUT6n and CC6n Compare output on pins COUT6n and CC6n. 0b0011 Double-Register Capture modes see . 0b01XX Hall Sensor mode see . In order to enable the hall edge detection, all three MSEL6x must be programmed to Hall Sensor mode. 0b1000 Hysteresis-like mode see . 0b1001 Multi-Input Capture modes see . 0b101X Multi-Input Capture modes see . 0b101X MSEL62 Capture/Compare Mode Selection 8 3 read-write Compare outputs disabled Compare outputs disabled, pins CC6n and COUT6n can be used for I/O. No capture action. 0b0000 Pin CC6n, pin COUT6n Compare output on pin CC6n, pin COUT6n can be used for I/O. No capture action. 0b0001 Pin COUT6n, Pin CC6n Compare output on pin COUT6n, pin CC6n can be used for I/O. No capture action. 0b0010 Pins COUT6n and CC6n Compare output on pins COUT6n and CC6n. 0b0011 Double-Register Capture modes see . 0b01XX Hall Sensor mode see . In order to enable the hall edge detection, all three MSEL6x must be programmed to Hall Sensor mode. 0b1000 Hysteresis-like mode see . 0b1001 Multi-Input Capture modes see . 0b101X Multi-Input Capture modes see . 0b101X T12PR Timer T12 Period Register 0x24 16 read-write n 0x0 0x0 T12PV T12 Period Value 0 15 read-write T13 Timer T13 Counter Register 0x7C 16 read-write n 0x0 0x0 T13CV Timer T13 Counter Value 0 15 read-write T13PR Timer T13 Period Register 0x28 16 read-write n 0x0 0x0 T13PV T13 Period Value 0 15 read-write TCTR0 Timer Control Register 0 0x30 16 read-write n 0x0 0x0 CDIR Count Direction of Timer T12 6 read-only UP T12 counts up. 0b0 DOWN T12 counts down. 0b1 CTM T12 Operating Mode 7 read-write Edge-aligned Mode T12 always counts up and continues counting from zero after reaching the period value. 0b0 Center-aligned Mode T12 counts down after detecting a period-match and counts up after detecting a one-match. 0b1 STE12 Timer T12 Shadow Transfer Enable 5 read-only Disabled The shadow register transfer is disabled. 0b0 Enabled The shadow register transfer is enabled. 0b1 STE13 Timer T13 Shadow Transfer Enable 13 read-only Disabled The shadow register transfer is disabled. 0b0 Enabled The shadow register transfer is enabled. 0b1 T12CLK Timer T12 Input Clock Select 0 2 read-write 1 fT12 = fCCU 0b000 2 fT12 = fCCU / 2 0b001 4 fT12 = fCCU / 4 0b010 8 fT12 = fCCU / 8 0b011 16 fT12 = fCCU / 16 0b100 32 fT12 = fCCU / 32 0b101 64 fT12 = fCCU / 64 0b110 128 fT12 = fCCU / 128 0b111 T12PRE Timer T12 Prescaler Bit 3 read-write Disabled The additional prescaler for T12 is disabled. 0b0 Enabled The additional prescaler for T12 is enabled. 0b1 T12R Timer T12 Run Bit 4 read-only Stop Timer T12 is stopped. 0b0 Run Timer T12 is running. 0b1 T13CLK Timer T13 Input Clock Select 8 2 read-write 1 fT13 = fCCU 0b000 2 fT13 = fCCU / 2 0b001 4 fT13 = fCCU / 4 0b010 8 fT13 = fCCU / 8 0b011 16 fT13 = fCCU / 16 0b100 32 fT13 = fCCU / 32 0b101 64 fT13 = fCCU / 64 0b110 128 fT13 = fCCU / 128 0b111 T13PRE Timer T13 Prescaler Bit 11 read-write Disabled The additional prescaler for T13 is disabled. 0b0 Enabled The additional prescaler for T13 is enabled. 0b1 T13R Timer T13 Run Bit 12 read-only Stop Timer T13 is stopped. 0b0 Run Timer T13 is running. 0b1 TCTR2 Timer Control Register 2 0x58 16 read-write n 0x0 0x0 T12RSEL Timer T12 External Run Selection 8 1 read-write Disabled The external setting of T12R is disabled. 0b00 Rising edge Bit T12R is set if a rising edge of signal T12HR is detected. 0b01 Falling edge Bit T12R is set if a falling edge of signal T12HR is detected. 0b10 Edge Bit T12R is set if an edge of signal T12HR is detected. 0b11 T12SSC Timer T12 Single Shot Control 0 read-write Disabled The single-shot mode is disabled, no hardware action on T12R. 0b0 Enabled The single shot mode is enabled, the bit T12R is reset by hardware if: – T12 reaches its period value in edge-aligned mode – T12 reaches the value 1 while down counting in center-aligned mode. In parallel to the reset action of bit T12R, the bits CC6xST (x = 0, 1, 2) are reset. 0b1 T13RSEL Timer T13 External Run Selection 10 1 read-write Disabled The external setting of T13R is disabled. 0b00 Rising edge Bit T13R is set if a rising edge of signal T13HR is detected. 0b01 Falling edge Bit T13R is set if a falling edge of signal T13HR is detected. 0b10 Edge Bit T13R is set if an edge of signal T13HR is detected. 0b11 T13SSC Timer T13 Single Shot Control 1 read-write No action No hardware action on T13R 0b0 Enabled The single-shot mode is enabled, the bit T13R is reset by hardware if T13 reaches its period value. In parallel to the reset action of bit T13R, the bit CC63ST is reset. 0b1 T13TEC T13 Trigger Event Control 2 2 read-write No action None 0b000 Channel 0 set T13R on a T12 compare event on channel 0 0b001 Channel 1 set T13R on a T12 compare event on channel 1 0b010 Channel 2 set T13R on a T12 compare event on channel 2 0b011 Channel 0,1,2 set T13R on any T12 compare event on the channels 0, 1, or 2 0b100 Period-match set T13R upon a period-match of T12 0b101 Zero-match set T13R upon a zero-match of T12 (while counting up) 0b110 CCPOSx set T13R on any edge of inputs CCPOSx 0b111 T13TED Timer T13 Trigger Event Direction 5 1 read-write No action None 0b00 Up while T12 is counting up 0b01 Down while T12 is counting down 0b10 Independent independent on the count direction of T12 0b11 TCTR4 Timer Control Register 4 0x4 16 read-write n 0x0 0x0 DTRES Dead-Time Counter Reset 3 write-only No effect No effect on the dead-time counters. 0b0 Zero The three dead-time counter channels are reset to zero. 0b1 T12CNT Timer T12 Count Event 5 write-only No action None 0b0 Count If enabled (PISEL2), timer T12 counts one step. 0b1 T12RES Timer T12 Reset 2 write-only No effect No effect on T12. 0b0 Zero The T12 counter register is reset to zero. The switching of the output signals is according to the switching rules. Setting of T12RES has no impact on bit T12R. 0b1 T12RR Timer T12 Run Reset 0 write-only No influence T12R is not influenced. 0b0 T12R cleared T12R is cleared, T12 stops counting. 0b1 T12RS Timer T12 Run Set 1 write-only No influence T12R is not influenced. 0b0 T12R set T12R is set, T12 counts. 0b1 T12STD Timer T12 Shadow Transfer Disable 7 write-only No action None 0b0 STE12 reset STE12 is reset without triggering the shadow transfer. 0b1 T12STR Timer T12 Shadow Transfer Request 6 write-only No action None 0b0 STE12 set STE12 is set, enabling the shadow transfer. 0b1 T13CNT Timer T13 Count Event 13 write-only No action None 0b0 Count If enabled (PISEL2), timer T13 counts one step. 0b1 T13RES Timer T13 Reset 10 write-only No effect No effect on T13. 0b0 Zero The T13 counter register is reset to zero. The switching of the output signals is according to the switching rules. Setting of T13RES has no impact on bit T13R. 0b1 T13RR Timer T13 Run Reset 8 write-only No influence T13R is not influenced. 0b0 T13R cleared T13R is cleared, T13 stops counting. 0b1 T13RS Timer T13 Run Set 9 write-only No influence T13R is not influenced. 0b0 T13R set T13R is set, T13 counts. 0b1 T13STD Timer T13 Shadow Transfer Disable 15 write-only No action None 0b0 STE13 reset STE13 is reset without triggering the shadow transfer. 0b1 T13STR Timer T13 Shadow Transfer Request 14 write-only No action None 0b0 STE13 set STE13 is set, enabling the shadow transfer. 0b1 TRPCTR Trap Control Register 0x60 16 read-write n 0x0 0x0 TRPEN Trap Enable Control 8 5 read-write Disabled The trap functionality of the corresponding output signal is disabled. The output state is independent from bit TRPS. 0b0 Enabled The trap functionality of the corresponding output signal is enabled. The output is set to the passive state while TRPS = 1. 0b1 TRPEN13 Trap Enable Control for Timer T13 14 read-write Disabled The trap functionality for T13 is disabled. Timer T13 (if selected and enabled) provides PWM functionality even while TRPS = 1. 0b0 Enabled The trap functionality for T13 is enabled. The timer T13 PWM output signal is set to the passive state while TRPS = 1. 0b1 TRPM10 Trap Mode Control Bits 1, 0 0 1 read-write T12 zero-match The trap state is left (return to normal operation according to TRPM2) when a zero-match of T12 (while counting up) is detected (synchronization to T12). 0b00 T13 zero-match The trap state is left (return to normal operation according to TRPM2) when a zero-match of T13 is detected (synchronization to T13). 0b01 Immediately The trap state is left (return to normal operation according to TRPM2) immediately without any synchronization to T12 or T13. 0b11 TRPM2 Trap Mode Control Bit 2 2 read-write Hardware reset The trap state can be left (return to normal operation = bit TRPS = 0) as soon as the input CTRAP becomes inactive. Bit TRPF is automatically cleared by hardware if the input pin CTRAP becomes 1. Bit TRPS is automatically cleared by hardware if bit TRPF is 0 and if the synchronization condition (according to TRPM10) is detected. 0b0 Software reset The trap state can be left (return to normal operation = bit TRPS = 0) as soon as bit TRPF is reset by software after the input CTRAP becomes inactive (TRPF is not cleared by hardware). Bit TRPS is automatically cleared by hardware if bit TRPF = 0 and if the synchronization condition (according to TRPM10) is detected. 0b1 TRPPEN Trap Pin Enable 15 read-write Disabled The trap functionality based on the input pin CTRAP is disabled. A trap can only be generated by software by setting bit TRPF. 0b0 Enabled The trap functionality based on the input pin CTRAP is enabled. A trap can be generated by software by setting bit TRPF or by CTRAP = 0. 0b1 CPU CPU CPU 0x0 0x0 0x1000 registers n AIRCR Application Interrupt/Reset Control Register 0xD0C 32 read-write n 0x0 0x0 ENDIANNESS Data Endianness 15 read-only value1 little endian 0b0 value2 big endian 0b1 SYSRESETREQ System Reset Request 2 write-only value1 no effect 0b0 value2 request a system level reset 0b1 VECTCLRACTIVE VECTCLRACTIVE 1 write-only VECTKEY Vector Key 16 15 read-write CCR Configuration Control Register 0xD14 32 read-write n 0x0 0x0 STKALIGN STKALIGN 9 read-only UNALIGN_TRP UNALIGN_TRP 3 read-only CPUID CPU ID Base Register 0xD00 32 read-write n 0x0 0x0 CONSTANT Constant 16 3 read-only IMPLEMENTER Implementer Code 24 7 read-only PARTNO Part Number 4 11 read-only REVISION Revision Number 0 3 read-only VARIANT Variant Number 20 3 read-only ICSR Interrupt Control and State Register 0xD04 32 read-write n 0x0 0x0 ISRPENDING Interrupt Pending Flag 22 read-only value1 interrupt not pending 0b0 value2 interrupt is pending 0b1 NMIPENDSET NMI Set Pending 31 read-write value1 on writes, has no effect. On reads, NMI exception is not pending. 0b0 value2 on writes, changes the NMI exception state to pending. On reads, NMI exception is pending. 0b1 PENDSTCLR SysTick Exception Clear Pending 25 write-only value1 no effect 0b0 value2 removes the pending state from the SysTick exception 0b1 PENDSTSET SysTick Exception Set Pending 26 read-write value1 on writes, has no effect. On reads, SysTick exception is not pending. 0b0 value2 on writes, changes SysTick exception state to pending. On reads, SysTick exception is pending. 0b1 PENDSVCLR PENDSV Clear Pending 27 write-only value1 no effect 0b0 value2 remove pending state from the PENDSV exception 0b1 PENDSVSET PENDSV Set Pending 28 read-write value1 on writes, has no effect. On reads, PendSV exception is not pending. 0b0 value2 on writes, changes PendSV exception state to pending. On reads, PendSV is pending. 0b1 VECTACTIVE VECTACTIVE 0 5 read-only value1 Thread mode 0b0 VECTPENDING VECTPENDING 12 5 read-only value1 no pending exceptions 0b0 NVIC_ICER Interrupt Clear-Enable 0x180 32 read-write n 0x0 0x0 Int_ADC1 Interrupt Clear for ADC1 3 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_ADC2 Interrupt Clear for MU, ADC2 2 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_CCU6SR0 Interrupt Clear for CCU6 SR0 4 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_CCU6SR1 Interrupt Clear for CCU6 SR1 5 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_CCU6SR2 Interrupt Clear for CCU6 SR2 6 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_CCU6SR3 Interrupt Clear for CCU6 SR3 7 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_DU Interrupt Clear for Differential Unit 21 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_EXINT0 Interrupt Clear for External Int 0 12 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_EXINT1 Interrupt Clear for External Int 1 13 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_GPT1 Interrupt Clear for GPT1 0 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_GPT2 Interrupt Clear for GPT2 1 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_HS1 Interrupt Clear for HS1 19 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_HS2 Interrupt Clear for HS2 20 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_LS1 Interrupt Clear for LS1 17 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_LS2 Interrupt Clear for LS2 18 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_MON Interrupt Clear for MON 22 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_PORT2 Interrupt Clear for PORT2 23 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_SSC1 Interrupt Clear for SSC1 8 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_SSC2 Interrupt Clear for SSC2 9 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_UART1 Interrupt Clear for UART1 10 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_UART2 Interrupt Clear for UART2 11 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 Int_WAKEUP Interrupt Clear for WAKEUP 14 read-write DISABLE on reads the associated interrupt is disabled, no effect on write 0b0 ENABLE on reads the associated interrupt is enabled, on writes the associated interrupt is disabled 0b1 NVIC_ICPR Interrupt Clear-Pending 0x280 32 read-write n 0x0 0x0 Int_ADC1 Interrupt Clear Pending for ADC1 3 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_ADC2 Interrupt Clear Pending for MU, ADC2 2 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_CCU6SR0 Interrupt Clear Pending for CCU6 SR0 4 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_CCU6SR1 Interrupt Clear Pending for CCU6 SR1 5 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_CCU6SR2 Interrupt Clear Pending for CCU6 SR2 6 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_CCU6SR3 Interrupt Clear Pending for CCU6 SR3 7 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_DU Interrupt Clear Pending for Differential Unit 21 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_EXINT0 Interrupt Clear Pending for External Int 0 12 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_EXINT1 Interrupt Clear Pending for External Int 1 13 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_GPT1 Interrupt Clear Pending for GPT1 0 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_GPT2 Interrupt Clear Pending for GPT2 1 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_HS1 Interrupt Clear Pending for HS1 19 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_HS2 Interrupt Clear Pending for HS2 20 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_LS1 Interrupt Clear Pending for LS1 17 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_LS2 Interrupt Clear Pending for LS2 18 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_MON Interrupt Clear Pending for MON 22 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_PORT2 Interrupt Clear Pending for PORT2 23 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_SSC1 Interrupt Clear Pending for SSC1 8 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_SSC2 Interrupt Clear Pending for SSC2 9 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_UART1 Interrupt Clear Pending for UART1 10 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_UART2 Interrupt Clear Pending for UART2 11 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 Int_WAKEUP Interrupt Clear Pending for WAKEUP 14 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending on reads the associated interrupt is pending, on writes the status of the associated interrupt is changed to not pending 0b1 NVIC_IPR0 Interrupt Priority 0x400 32 read-write n 0x0 0x0 PRI_ADC1 Priority for ADC1 30 1 read-write PRI_ADC2 Priority for MU, ADC2 22 1 read-write PRI_GPT1 Priority for GPT1 6 1 read-write PRI_GPT2 Priority for GPT2 14 1 read-write NVIC_IPR1 Interrupt Priority 0x404 32 read-write n 0x0 0x0 PRI_CCU6SR0 Priority for CCU6 SR0 6 1 read-write PRI_CCU6SR1 Priority for CCU6 SR1 14 1 read-write PRI_CCU6SR2 Priority for CCU6 SR2 22 1 read-write PRI_CCU6SR3 Priority for CCU6 SR3 30 1 read-write NVIC_IPR2 Interrupt Priority 0x408 32 read-write n 0x0 0x0 PRI_SSC1 Priority for CCU6 SSC1 6 1 read-write PRI_SSC2 Priority for CCU6 SSC2 14 1 read-write PRI_UART1 Priority for CCU6 UART1 22 1 read-write PRI_UART2 Priority for CCU6 UART2 30 1 read-write NVIC_IPR3 Interrupt Priority 0x40C 32 read-write n 0x0 0x0 PRI_EXINT0 Priority for External Int 0 6 1 read-write PRI_EXINT1 Priority for External Int 1 14 1 read-write PRI_WAKEUP Priority for WAKEUP 22 1 read-write NVIC_IPR4 Interrupt Priority 0x410 32 read-write n 0x0 0x0 PRI_HS1 Priority for HS1 30 1 read-write PRI_LS1 Priority for LS1 14 1 read-write PRI_LS2 Priority for LS2 22 1 read-write NVIC_IPR5 Interrupt Priority 0x414 32 read-write n 0x0 0x0 PRI_DU Priority for Differential Unit 14 1 read-write PRI_HS2 Priority for HS2 6 1 read-write PRI_MON Priority for MON 22 1 read-write PRI_PORT2 Priority for PORT2 30 1 read-write NVIC_ISER Interrupt Set-Enable 0x100 32 read-write n 0x0 0x0 Int_ADC1 Interrupt Set for ADC1 3 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_ADC2 Interrupt Set for MU, ADC2 2 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_CCU6SR0 Interrupt Set for CCU6 SR0 4 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_CCU6SR1 Interrupt Set for CCU6 SR1 5 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_CCU6SR2 Interrupt Set for CCU6 SR2 6 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_CCU6SR3 Interrupt Set for CCU6 SR3 7 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_DU Interrupt Set for Differential Unit 21 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_EXINT0 Interrupt Set for External Int 0 12 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_EXINT1 Interrupt Set for External Int 1 13 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_GPT1 Interrupt Set for GPT1 0 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_GPT2 Interrupt Set for GPT2 1 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_HS1 Interrupt Set for HS1 19 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_HS2 Interrupt Set for HS2 20 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_LS1 Interrupt Set for LS1 17 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_LS2 Interrupt Set for LS2 18 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_MON Interrupt Set for MON 22 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_PORT2 Interrupt Set for PORT2 23 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_SSC1 Interrupt Set for SSC1 8 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_SSC2 Interrupt Set for SSC2 9 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_UART1 Interrupt Set for UART1 10 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_UART2 Interrupt Set for UART2 11 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 Int_WAKEUP Interrupt Set for WAKEUP 14 read-write DISABLED no effect on write 0b0 ENABLE enables the associated interrupt 0b1 NVIC_ISPR Interrupt Set-Pending 0x200 32 read-write n 0x0 0x0 Int_ADC1 Interrupt Set Pending for ADC1 3 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_ADC2 Interrupt Set Pending for MU, ADC2 2 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_CCU6SR0 Interrupt Set Pending for CCU6 SR0 4 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_CCU6SR1 Interrupt Set Pending for CCU6 SR1 5 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_CCU6SR2 Interrupt Set Pending for CCU6 SR2 6 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_CCU6SR3 Interrupt Set Pending for CCU6 SR3 7 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_DU Interrupt Set Pending for Differential Unit 21 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_EXINT0 Interrupt Set Pending for External Int 0 12 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_EXINT1 Interrupt Set Pending for External Int 1 13 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_GPT1 Interrupt Set Pending for GPT1 0 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_GPT2 Interrupt Set Pending for GPT2 1 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_HS1 Interrupt Set Pending for HS1 19 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_HS2 Interrupt Set Pending for HS2 20 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_LS1 Interrupt Set Pending for LS1 17 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_LS2 Interrupt Set Pending for LS2 18 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_MON Interrupt Set Pending for MON 22 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_PORT2 Interrupt Set Pending for PORT2 23 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_SSC1 Interrupt Set Pending for SSC1 8 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_SSC2 Interrupt Set Pending for SSC2 9 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_UART1 Interrupt Set Pending for UART1 10 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_UART2 Interrupt Set Pending for UART2 11 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 Int_WAKEUP Interrupt Set Pending for WAKEUP 14 read-write Not Pending on reads the associated interrupt is not pending, no effect on writes 0b0 Pending the associated interrupt is pending 0b1 SCR System Control Register 0xD10 32 read-write n 0x0 0x0 SEVONPEND SEVONPEND 4 read-write value1 only enabled interrupts or events can wake-up the processor, disabled interrupts are excluded 0b0 value2 enabled events and all interrupts, including disabled interrupts, can wake-up the processor 0b1 SLEEPDEEP Sleep Deep 2 read-write value1 sleep 0b0 value2 deep sleep 0b1 SLEEPONEXIT Sleep on Exit 1 read-write value1 do not sleep when returning to Thread mode 0b0 value2 enter sleep, or deep sleep, on return from an ISR to Thread mode 0b1 SHPR2 System Handler Priority Register 2 0xD1C 32 read-write n 0x0 0x0 PRI_11 Priority of System Handler 11, SVCall 30 1 read-write SHPR3 System Handler Priority Register 3 0xD20 32 read-write n 0x0 0x0 PRI_14 Priority of System Handler 14, PendSV 22 1 read-write PRI_15 Priority of System Handler 15, SysTick 30 1 read-write SYSTICK_CALIB SysTick Calibration Value Register 0x1C 32 read-write n 0x0 0x0 NOREF No Reference Clock 31 read-only SKEW Skew 30 read-only TENMS Tenms 0 23 read-only SYSTICK_CSR SysTick Control and Status Register 0x10 32 read-write n 0x0 0x0 CLKSOURCE CLK Source 2 read-write value1 external reference clock 0b0 value2 processor clock 0b1 COUNTFLAG Count Flag 16 read-only ENABLE Enable 0 read-write value1 counter disabled. 0b0 value2 counter enabled. 0b1 TICKINT TICKINT 1 read-write value1 counting down to 0 does not assert the SysTick exception request. 0b0 value2 counting down to 0 asserts the SysTick exception request. 0b1 SYSTICK_CVR SysTick Current Value Register 0x18 32 read-write n 0x0 0x0 CURRENT Current 0 23 read-write SYSTICK_RVR SysTick Reload Value Register 0x14 32 read-write n 0x0 0x0 RELOAD Reload 0 23 read-write GPT12E GPT12E GPT12E 0x0 0x0 0x50 registers n CAPREL Capture/Reload Register 0x1C 32 read-write n 0x0 0x0 CAPREL Current reload value or Captured value 0 15 read-write ID Module Identification Register 0x0 32 read-write n 0x0 0x0 MOD_REV Module Revision Number 0 7 read-only MOD_TYPE Module Identification Number 8 7 read-only PISEL Port Input Select Register 0x4 32 read-write n 0x0 0x0 ISCAPIN Input Select for CAPIN 14 1 read-write CAPINA Signal CAPINA is selected 0b00 CAPINB Signal CAPINB is selected 0b01 CAPINC Signal CAPINC (Read trigger from T3) is selected 0b10 CAPIND Signal CAPIND (Read trigger from T2 or T3 or T4) is selected 0b11 IST2EUD Input Select for T2EUD 1 read-write T2EUDA Signal T2EUDA is selected 0b0 T2EUDB Signal T2EUDB is selected 0b1 IST2IN Input Select for T2IN 0 read-write T2INA Signal T2INA is selected 0b0 T2INB Signal T2INB is selected 0b1 IST3EUD Input Select for T3EUD 4 1 read-write T3EUDA Signal T3EUDA is selected 0b00 T3EUDB Signal T3EUDB is selected 0b01 T3EUDC Signal T3EUDC is selected 0b10 T3EUDD Signal T3EUDD is selected 0b11 IST3IN Input Select for T3IN 2 1 read-write T3INA Signal T3INA is selected 0b00 T3INB Signal T3INB is selected 0b01 T3INC Signal T3INC is selected 0b10 T3IND Signal T3IND is selected 0b11 IST4EUD Input Select for TEUD 8 1 read-write T4EUDA Signal T4EUDA is selected 0b00 T4EUDB Signal T4EUDB is selected 0b01 T4EUDC Signal T4EUDC is selected 0b10 T4EUDD Signal T4EUDD is selected 0b11 IST4IN Input Select for T4IN 6 1 read-write T4INA Signal T4INA is selected 0b00 T4INB Signal T4INB is selected 0b01 T4INC Signal T4INC is selected 0b10 T4IND Signal T4IND is selected 0b11 IST5EUD Input Select for T5EUD 11 read-write T5EUDA Signal T5EUDA is selected 0b0 T5EUDB Signal T5EUDB is selected 0b1 IST5IN Input Select for T5IN 10 read-write T5INA Signal T5INA is selected 0b0 T5INB Signal T5INB is selected 0b1 IST6EUD Input Select for T6EUD 13 read-write T6EUDA Signal T6EUDA is selected 0b0 T6EUDB Signal T6EUDB is selected 0b1 IST6IN Input Select for T6IN 12 read-write T6INA Signal T6INA is selected 0b0 T6INB Signal T6INB is selected 0b1 T2 Timer T2 Count Register 0x20 32 read-write n 0x0 0x0 T2 Timer T2 Current Value 0 15 read-write T2CON Timer T2 Control Register 0x8 32 read-write n 0x0 0x0 T2CHDIR Timer T2 Count Direction Change 14 read-write No change No change of count direction was detected 0b0 Change A change of count direction was detected 0b1 T2DIR Timer T2 Rotation Direction 15 read-only Up Timer T2 counts up 0b0 Down Timer T2 counts down 0b1 T2EDGE Timer T2 Edge Detection 13 read-write No count No count edge was detected 0b0 Count A count edge was detected 0b1 T2I Timer T2 Input Parameter Selection 0 2 read-write T2IRIDIS Timer T2 Interrupt Disable 12 read-write Enabled Interrupt generation for T2CHDIR and T2EDGE interrupts in Incremental Interface Mode is enabled 0b0 Disabled Interrupt generation for T2CHDIR and T2EDGE interrupts in Incremental Interface Mode is disabled 0b1 T2M Timer T2 Input Mode Control 3 2 read-write Timer Mode None 0b000 Counter Mode None 0b001 Gated low Gated Timer Mode with gate active low 0b010 Gated high Gated Timer Mode with gate active high 0b011 Reload Mode None 0b100 Capture Mode None 0b101 Incremental Interface Mode - Rotation (Rotation Detection Mode) 0b110 Incremental Interface Mode - Edge (Edge Detection Mode) 0b111 T2R Timer T2 Input Run Bit 6 read-write Stop Timer T2 stops 0b0 Run Timer T2 runs 0b1 T2RC Timer T2 Remote Control 9 read-write T2R Timer T2 is controlled by its own run bit T2R 0b0 T3R Timer T2 is controlled by the run bit T3R of core timer T3, not by bit T2R 0b1 T2UD Timer T2 Up/Down Control 7 read-write Up Timer T2 counts up 0b0 Down Timer T2 counts down 0b1 T2UDE Timer T2 External Up/Down Enable 8 read-write T2UD Count direction is controlled by bit T2UD input T2EUD is disconnected 0b0 T2EUD Count direction is controlled by input T2EUD 0b1 T3 Timer T3 Count Register 0x24 32 read-write n 0x0 0x0 T3 Timer T3 Current Value 0 15 read-write T3CON Timer T3 Control Register 0xC 32 read-write n 0x0 0x0 BPS1 GPT1 Block Prescaler Control 11 1 read-write 8 fGPT/8 0b00 4 fGPT/4 0b01 32 fGPT/32 0b10 16 fGPT/16 0b11 T3CHDIR Timer T3 Count Direction Change Flag 14 read-write No change No change of count direction was detected 0b0 Change A change of count direction was detected 0b1 T3DIR Timer T3 Rotation Direction Flag 15 read-only Up Timer T3 counts up 0b0 Down Timer T3 counts down 0b1 T3EDGE Timer T3 Edge Detection Flag 13 read-write No count No count edge was detected 0b0 Count A count edge was detected 0b1 T3I Timer T3 Input Parameter Selection 0 2 read-write T3M Timer T3 Input Mode Control 3 2 read-write Timer Mode None 0b000 Counter Mode None 0b001 Gated low Gated Timer Mode with gate active low 0b010 Gated high Gated Timer Mode with gate active high 0b011 Incremental Interface Mode - Rotation (Rotation Detection Mode) 0b110 Incremental Interface Mode - Edge (Edge Detection Mode) 0b111 T3OE Overflow/Underflow Output Enable 9 read-write Disabled Alternate Output Function Disabled 0b0 T3OUT State of T3 toggle latch is output on pin T3OUT 0b1 T3OTL Timer T3 Overflow Toggle Latch 10 read-write T3R Timer T3 Input Run Bit 6 read-write Stop Timer T3 stops 0b0 Run Timer T3 runs 0b1 T3UD Timer T3 Up/Down Control 7 read-write Up Timer T3 counts up 0b0 Down Timer T3 counts down 0b1 T3UDE Timer T3 External Up/Down Enable 8 read-write T3UD Count direction is controlled by bit T3UD input T3EUD is disconnected 0b0 T3EUD Count direction is controlled by input T3EUD 0b1 T4 Timer T4 Count Register 0x28 32 read-write n 0x0 0x0 T4 Timer T4 Current Value 0 15 read-write T4CON Timer T4 Control Register 0x10 32 read-write n 0x0 0x0 CLRT2EN Clear Timer T2 Enable 10 read-write No effect No effect of T4EUD on timer T2 0b0 Clear A falling edge on T4EUD clears timer T2 0b1 CLRT3EN Clear Timer T3 Enable 11 read-write No effect No effect of T4IN on Timer T3 0b0 Clear A falling edge on T4In clears timer T3 0b1 T4CHDIR Timer T4 Count Direction Change 14 read-write No change No change in count direction was detected 0b0 Change A change in count direction was detected 0b1 T4EDGE Timer T4 Edge Direction 13 read-write No count No count edge was detected 0b0 Count A count edge was detected 0b1 T4I Timer T4 Input Parameter Selection 0 2 read-write T4IRDIS Timer T4 Interrupt Disable 12 read-write Enabled Interrupt generation for T4CHDIR and T4EDGE interrupts in Incremental Interface Mode is enabled 0b0 Disabled Interrupt generation for T4CHDIR and T4EDGE interrupts in Incremental Interface Mode is disabled 0b1 T4M Timer T4 Mode Control (Basic Operating Mode) 3 2 read-write Timer Mode None 0b000 Counter Mode None 0b001 Gated low Gated Timer Mode with gate active low 0b010 Gated high Gated Timer Mode with gate active high 0b011 Reload Mode None 0b100 Capture Mode None 0b101 Incremental Interface Mode - Rotation (Rotation Detection Mode) 0b110 Incremental Interface Mode - Edge (Edge Detection Mode) 0b111 T4R Timer T4 Input Run Bit 6 read-write Stop Timer T4 stops 0b0 Run Timer T4 runs 0b1 T4RC Timer T4 Remote Control 9 read-write T4R Timer T4 is controlled by its own run bit T4R 0b0 T3R Timer T4 is controlled by the run bit T3R of core timer T3, but not by bit T4R 0b1 T4RDIR Timer T4 Rotation Direction 15 read-only Up Timer T4 counts up 0b0 Down Timer T4 counts down 0b1 T4UD Timer T2 Up/Down Control 7 read-write Up Timer T2 counts up 0b0 Down Timer T2 counts down 0b1 T4UDE Timer T4 External Up/Down Enable 8 read-write T4UD Count direction is controlled by bit T4UD input T4EUD is disconnected 0b0 T4EUD Count direction is controlled by input T4EUD 0b1 T5 Timer 5 Count Register 0x2C 32 read-write n 0x0 0x0 T5 Timer T5 Current Value 0 15 read-write T5CON Timer T5 Control Register 0x14 32 read-write n 0x0 0x0 CI Register CAPREL Capture Trigger Selection 12 1 read-write Disabled Capture disabled 0b00 Positive Positive transition (rising edge) on CAPIN or any transition on T3IN 0b01 Negative Negative transition (falling edge) on CAPIN or any transition on T3EUD 0b10 Any Any transition (rising or falling edge) on CAPIN or any transition on T3IN or T3EUD 0b11 CT3 Timer T3 Capture Trigger Enable 10 read-write CAPIN Capture trigger from input line CAPIN 0b0 T3IN Capture trigger from T3 input lines T3IN and/or T3EUD 0b1 T5CLR Timer T5 Clear Enable Bit 14 read-write Not cleared Timer T5 is not cleared on a capture event 0b0 Cleared Timer T5 is cleared on a capture event 0b1 T5I Timer T5 Input Parameter Selection 0 2 read-write T5M Timer T5 Input Mode Control 3 1 read-write Timer Mode None 0b00 Counter Mode None 0b01 Gated low Gated Timer Mode with gate active low 0b10 Gated high Gated Timer Mode with gate active high 0b11 T5R Timer T5 Run Bit 6 read-write Stop Timer T5 stops 0b0 Run Timer T5 runs 0b1 T5RC Timer T5 Remote Control 9 read-write T5R Timer T5 is controlled by its own run bit T5R 0b0 T6R Timer T5 is controlled by the run bit T6R of core timer T6, not by bit T5R 0b1 T5SC Timer T5 Capture Mode Enable 15 read-write Disabled Capture into register CAPREL disabled 0b0 Enabled Capture into register CAPREL enabled 0b1 T5UD Timer T2 Up/Down Control 7 read-write Up Timer T5 counts up 0b0 Down Timer T5 counts down 0b1 T5UDE Timer T5 External Up/Down Enable 8 read-write T5UD Count direction is controlled by bit T5UD input T5EUD is disconnected 0b0 T5EUD Count direction is controlled by input T5EUD 0b1 T6 Timer 6 Count Register 0x30 32 read-write n 0x0 0x0 T6 Timer T6 Current Value 0 15 read-write T6CON Timer T6 Control Register 0x18 32 read-write n 0x0 0x0 BPS2 GPT2 Block Prescaler Control 11 1 read-write 4 fGPT/4 0b00 2 fGPT/2 0b01 16 fGPT/16 0b10 8 fGPT/8 0b11 T6CLR Timer T6 Clear Enable Bit 14 read-write Not cleared Timer T6 is not cleared on a capture event 0b0 Cleared Timer T6 is cleared on a capture event 0b1 T6I Timer T6 Input Parameter Selection 0 2 read-write T6M Timer T6 Mode Control 3 2 read-write Timer Mode None 0b000 Counter Mode None 0b001 Gated low Gated Timer Mode with gate active low 0b010 Gated high Gated Timer Mode with gate active high 0b011 T6OE Overflow/Underflow Output Enable 9 read-write Disabled Alternate Output Function Disabled 0b0 T6OUT State of T6 toggle latch is output on pin T6OUT 0b1 T6OTL Timer T6 Overflow Toggle Latch 10 read-write T6R Timer T6 Input Run Bit 6 read-write Stop Timer T3 stops 0b0 Run Timer T3 runs 0b1 T6SR Timer T6 Reload Mode Enable 15 read-write Disabled Reload from register CAPREL disabled 0b0 Enabled Reload from register CAPREL enabled 0b1 T6UD Timer T6 Up/Down Control 7 read-write Up Timer T3 counts up 0b0 Down Timer T3 counts down 0b1 T6UDE Timer T6 External Up/Down Enable 8 read-write T6UD Count direction is controlled by bit T6UD input T6EUD is disconnected 0b0 T6EUD Count direction is controlled by input T6EUD 0b1 HS HS HS 0x0 0x0 0x50 registers n CTRL High Side Driver Control 0x4 32 read-write n 0x0 0x0 HS1_CYC_ON_ACTIVE High Side 1 Cyclic ON Driver 7 read-write OFF Cyclic ON Driver OFF 0b0 ON Cyclic ON Driver ON 0b1 HS1_EN High Side 1 Enable 0 read-write DISABLE HS circuit power off 0b0 ENABLE HS circuit power on 0b1 HS1_OC_SEL High Side 1 Overcurrent Threshold Selection 12 1 read-write IOCTH0 25 mA min. 0x0 IOCTH1 50 mA min. 0x1 IOCTH2 100 mA min. 0x2 IOCTH3 150 mA min. 0x3 HS1_OL_EN High Side 1 Open Load Detection Enable 3 read-write DISABLE disable open load detection 0b0 ENABLE enable open load detection 0b1 HS1_ON High Side 1 On 2 read-write OFF HS driver off 0b0 ON HS driver on 0b1 HS1_PWM High Side 1 PWM Enable 1 read-write DISABLE disables control by PWM input 0b0 ENABLE enables control by PWM input 0b1 HS1_SRCTL_SEL High Side 1 Slew Rate Control select 8 read-write Slew Rate 1 Slew Rate 10V/us is enabled 0b0 Slew Rate 2 Slew Rate 30V/us is enabled 0b1 HS2_CYC_ON_ACTIVE High Side 2 Cyclic ON Driver 23 read-write OFF Cyclic ON Driver OFF 0b0 ON Cyclic ON Driver ON 0b1 HS2_EN High Side 2 Enable 16 read-write DISABLE HS circuit power off 0b0 ENABLE HS circuit power on 0b1 HS2_OC_SEL High Side 2 Overcurrent Threshold Selection 28 1 read-write IOCTH0 25 mA min. 0x0 IOCTH1 50 mA min. 0x1 IOCTH2 100 mA min. 0x2 IOCTH3 150 mA min. 0x3 HS2_OL_EN High Side 2 Open Load Detection Enable 19 read-write DISABLE disable open load detection 0b0 ENABLE enable open load detection 0b1 HS2_ON High Side 2 On 18 read-write OFF HS driver off 0b0 ON HS driver on 0b1 HS2_PWM High Side 2 PWM Enable 17 read-write DISABLE disables control by PWM input 0b0 ENABLE enables control by PWM input 0b1 HS2_SRCTL_SEL High Side 2 Slew Rate Control select 24 read-write Slew Rate 1 Slew Rate 10V/us is enabled 0b0 Slew Rate 2 Slew Rate 30V/us is enabled 0b1 HS1_TRIM High Side Driver 1 TRIM 0x1C 32 read-write n 0x0 0x0 HS1_OC_OT_BTFILT_SEL Blanking Time Filter Select for HS1 Overcurrent / Overtemperature Detection 8 1 read-write 4_us 4 us filter time 0b00 8_us 8 us filter time 0b01 16_us 16 us filter time 0b10 32_us 32 us filter time 0b11 HS1_OL_BTFILT_SEL Blanking Time Filter Select for HS1 Open Load Detection 0 1 read-write 2_us 4 us filter time 0b00 4_us 8 us filter time 0b01 8_us 16 us filter time 0b10 16_us 32 us filter time 0b11 HS2_TRIM High Side Driver 2 TRIM 0x20 32 read-write n 0x0 0x0 HS2_OC_OT_BTFILT_SEL Blanking Time Filter Select for HS2 Overcurrent / Overtemperature Detection 8 1 read-write 4_us 4 us filter time 0b00 8_us 8 us filter time 0b01 16_us 16 us filter time 0b10 32_us 32 us filter time 0b11 HS2_OL_BTFILT_SEL Blanking Time Filter Select for HS2 Open Load Detection 0 1 read-write 2_us 4 us filter time 0b00 4_us 8 us filter time 0b01 8_us 16 us filter time 0b10 16_us 32 us filter time 0b11 IRQCLR High Side Driver Interrupt Status Clear Register 0xC 32 read-write n 0x0 0x0 HS1_OC_ISC High Side 1 Overcurrent Interrupt Status Clear 7 write-only no Clear None 0b0 Clear None 0b1 HS1_OL_ISC High Side 1 Open Load Interrupt Status Clear 6 write-only no Clear None 0b0 Clear None 0b1 HS1_OL_SC High Side 1 Open Load Status Clear 14 write-only no Clear None 0b0 Clear None 0b1 HS1_OT_ISC High Side 1 Overtemperature Interrupt Status Clear 5 write-only no Clear None 0b0 Clear None 0b1 HS1_OT_SC High Side 1 Overtemperature Status Clear 13 write-only no Clear None 0b0 Clear None 0b1 HS2_OC_ISC High Side 2 Overcurrent Interrupt Status Clear 23 write-only no Clear None 0b0 Clear None 0b1 HS2_OL_ISC High Side 2 Open Load Interrupt Status Clear 22 write-only no Clear None 0b0 Clear None 0b1 HS2_OL_SC High Side 2 Open Load Status Clear 30 write-only no Clear None 0b0 Clear None 0b1 HS2_OT_ISC High Side 2 Overtemperature Interrupt Status Clear 21 write-only no Clear None 0b0 Clear None 0b1 HS2_OT_SC High Side 2 Overtemperature Status Clear 29 write-only no Clear None 0b0 Clear None 0b1 IRQEN High Side Driver Interrupt Enable Register 0x10 32 read-write n 0x0 0x0 HS1_OC_IEN High Side 1 Overcurrent interrupt enable 7 read-write disable None 0b0 enable None 0b1 HS1_OL_IEN High Side 1 Open Load interrupt enable 6 read-write disable None 0b0 enable None 0b1 HS1_OT_IEN High Side 1 Overtemperature interrupt enable 5 read-write disabled None 0b0 enable None 0b1 HS2_OC_IEN High Side 2 Overcurrent interrupt enable 23 read-write disable None 0b0 enable None 0b1 HS2_OL_IEN High Side 2 Open Load interrupt enable 22 read-write disable None 0b0 enable None 0b1 HS2_OT_IEN High Side 2 Overtemperature interrupt enable 21 read-write disabled None 0b0 enable None 0b1 IRQS High Side Driver Interrupt Status 0x8 32 read-write n 0x0 0x0 HS1_OC_IS High Side 1 Overcurrent Interrupt Status 7 read-write no Overcurrent no overcurrent Condition occurred. 0b0 Overcurrent overcurrent occurred switch is automatically shutdown. Write sets status. 0b1 HS1_OL_IS High Side 1 Open Load Interrupt Status 6 read-write NORMAL normal load 0b0 OPEN LOAD open load detected, write sets status 0b1 HS1_OL_STS High Side 1 Open Load Interrupt Status 14 read-write no Open Load no open load Condition occurred. 0b0 Open Load open load occurred switch is not automatically shutdown. Write sets status. 0b1 HS1_OT_IS High Side 1 Overtemperature Interrupt Status 5 read-write no Overtemperature no overtemperature occurred. 0b0 Overtemperature overtemperature occurred switch is automatically shutdown. Write sets status 0b1 HS1_OT_STS High Side 1 Overtemperature Status 13 read-write no Overtemperature no overtemperature occurred. 0b0 Overtemperature overtemperature occurred switch is automatically shutdown. Write sets status. 0b1 HS2_OC_IS High Side 2 Overcurrent Interrupt Status 23 read-write no Overcurrent no overcurrent Condition occurred. 0b0 Overcurrent overcurrent occurred switch is automatically shutdown. Write sets status. 0b1 HS2_OL_IS High Side 2 Open Load Interrupt Status 22 read-write NORMAL normal load 0b0 OPEN LOAD open load detected, write sets status 0b1 HS2_OL_STS High Side 2 Open Load Interrupt Status 30 read-write no Open Load no open load Condition occurred. 0b0 Open Load open load occurred switch is not automatically shutdown. Write sets status. 0b1 HS2_OT_IS High Side 2 Overtemperature Interrupt Status 21 read-write no Overtemperature no overtemperature occurred. 0b0 Overtemperature overtemperature occurred switch is automatically shutdown. Write sets status 0b1 HS2_OT_STS High Side 2 Overtemperature Status 29 read-write no Overtemperature no overtemperature occurred. 0b0 Overtemperature overtemperature occurred switch is automatically shutdown. Write sets status. 0b1 PWMSRCSEL High Side PWM Source Selection Register 0x24 32 read-write n 0x0 0x0 HS1_SRC_SEL HS1 PWM Source Selection 3 2 read-write CC60 PWM output of CCU6 0b0000 CC61 PWM output of CCU6 0b0001 CC62 PWM output of CCU6 0b0010 COUT60 PWM output of CCU6 0b0011 COUT61 PWM output of CCU6 0b0100 COUT62 PWM output of CCU6 0b0101 T3OUT PWM output of GPT12 0b0110 HS2_SRC_SEL HS2 PWM Source Selection 0 2 read-write CC60 PWM output of CCU6 0b0000 CC61 PWM output of CCU6 0b0001 CC62 PWM output of CCU6 0b0010 COUT60 PWM output of CCU6 0b0011 COUT61 PWM output of CCU6 0b0100 COUT62 PWM output of CCU6 0b0101 T3OUT PWM output of GPT12 0b0110 LIN LIN LIN 0x0 0x0 0x2000 registers n CTRL LIN Transceiver Control 0x0 32 read-write n 0x0 0x0 FB_SM1 Feedback Signal 1 for Slope Mode Setting 13 read-only FB_SM2 Feedback Signal 2 for Slope Mode Setting 14 read-only FB_SM3 Feedback Signal 3 for Slope Mode Setting 15 read-only HV_MODE LIN Transceiver High Voltage Input - Output Mode 21 read-write DISABLE High Voltage Mode Entry is disabled 0b0 ENABLE High Voltage Mode Entry is enabled 0b1 MODE LIN transceiver power mode control 1 1 read-write LIN Sleep Mode LIN module switched to LIN Sleep Mode 0b00 LIN Receive-Only Mode LIN module switched to LIN Receive Only Mode 0b01 LIN Normal Mode LIN module switched to LIN Normal Mode 0b11 MODE_FB Feedback Signals for LIN Transmitter Mode Settings 4 2 read-only RXD Output Signal of Receiver 10 read-only SM LIN Transmitter Slope mode control 11 1 read-write Normal Slope Mode for max. 20 kBaud 0b00 Fast Slope Mode for max. 40 kBaud 0b01 Low Slope Mode for max. 10.4 kBaud 0b10 Flash Mode for max. 150 kBaud# 0b11 TXD LIN Transmitter switch on (only used when LIN_HV_MODE is set) 9 read-write Pull Down LIN Line Transmitter is switched on 0b0 Pull Up Resistor is active Transmitter is switched off 0b1 IRQCLR LIN Transceiver Interrupt Status Register Clear 0x8 32 read-write n 0x0 0x0 M_SM_ERR_ISC LIN Transceiver Mode Error - Slope Mode Error Interrupt Status Clear 3 write-only NO_Clear overtemperature not cleared 0b0 Clear overtemperature cleared 0b1 M_SM_ERR_SC LIN Transceiver Mode Error - Slope Mode Error Status Clear 8 write-only NO_Clear overtemperature not cleared 0b0 Clear overtemperature cleared 0b1 OC_ISC LIN Receiver Overcurrent Interrupt Status Clear 5 write-only NO_Clear overcurrent status not cleared 0b0 Clear overcurrent status cleared 0b1 OT_ISC LIN Receiver Overtemperature Interrupt Status / Status Clear 4 write-only NO_Clear overtemperature not cleared 0b0 Clear overtemperature cleared 0b1 OT_SC LIN Receiver Overtemperature Status Clear 9 write-only NO_Clear overtemperature not cleared 0b0 Clear overtemperature cleared 0b1 TXD_TMOUT_ISC LIN TXD time-out Interrupt Status Clear 6 write-only NO_Clear no time-out cleared 0b0 Clear time-out cleared 0b1 TXD_TMOUT_SC LIN TXD time-out Status Clear 11 write-only NO_Clear no time-out cleared 0b0 Clear time-out cleared 0b1 IRQEN LIN Transceiver Interrupt Enable Register 0xC 32 read-write n 0x0 0x0 M_SM_ERR_IEN LIN Transceiver Mode - Slope Mode Error interrupt enable 3 read-write disable None 0b0 enable None 0b1 OC_IEN LIN Transceiver Overcurrent interrupt enable 5 read-write disable None 0b0 enable None 0b1 OT_IEN LIN Transceiver Overtemperature interrupt enable 4 read-write disable None 0b0 enable None 0b1 TXD_TMOUT_IEN LIN Transceiver TxD-Timeout interrupt enable 6 read-write disable None 0b0 enable None 0b1 IRQS LIN Transceiver Interrupt Status 0x4 32 read-write n 0x0 0x0 M_SM_ERR_IS LIN Transceiver Mode Error - Slope Mode Error Interrupt Status 3 read-only no Mode Error - Slope Mode status occurred 0b0 Mode Error status occurred 0b1 M_SM_ERR_STS LIN Transceiver Mode Error - Slope Mode Error Status 8 read-only no Mode Error - Slope Mode status occurred 0b0 Mode Error status occurred 0b1 OC_IS LIN Receiver Overcurrent Interrupt Status 5 read-only no Overcurrent overcurrent status occurred 0b0 Overcurrent overcurrent status occurred 0b1 OT_IS LIN Receiver Overtemperature Interrupt Status 4 read-only no Overtemperature overtemperature occurred 0b0 Overtemperature overtemperature occurred 0b1 OT_STS LIN Receiver Overtemperature Status 9 read-only no Overtemperature overtemperature occurred 0b0 Overtemperature overtemperature occurred 0b1 TXD_TMOUT_IS LIN TXD time-out Interrupt Status 6 read-only NO_TIMEOUT no time-out occurred 0b0 TIMEOUT time-out occurred 0b1 TXD_TMOUT_STS LIN TXD time-out Status 11 read-only NO_TIMEOUT no time-out occurred 0b0 TIMEOUT time-out occurred 0b1 LS LS LS 0x0 0x0 0x50 registers n CTRL Low Side Driver Control 0x4 32 read-write n 0x0 0x0 LS1_EN Low-Side switch 1 Enable 0 read-write DISABLE disables LS1 0b0 ENABLE enables LS1 0b1 LS1_OL_EN Open load Detection Enable 3 read-write DISABLE Open load detection 0b0 ENABLE Open load detection 0b1 LS1_ON Low-Side switch 1 On/Off 2 read-write OFF switches LS1 off 0b0 ON turns on LS1 0b1 LS1_PWM Low-Side switch 1 PWM Enable 1 read-write DISABLE normal mode controlled by LS1_ON 0b0 ENABLE enables LS1 for PWM mode 0b1 LS1_SRCTL_SEL Low-Side switch 1 Slew Rate selection 8 read-write Slow slow slew rate is selected 0b0 Fast fast slew rate is selected 0b1 LS2_EN Low-Side switch 2 Enable 16 read-write DISABLE disables LS2 0b0 ENABLE enables LS2 0b1 LS2_OL_EN Open load Detection Enable 19 read-write DISABLE Open load detection 0b0 ENABLE Open load detection 0b1 LS2_ON Low-Side switch 2 On/Off 18 read-write OFF switches LS2 off 0b0 ON turns on LS2 0b1 LS2_PWM Low-Side switch 2 PWM Enable 17 read-write DISABLE normal mode controlled by LS2_ON 0b0 ENABLE enables LS2 for PWM mode 0b1 LS2_SRCTL_SEL Low-Side switch 2 Slew Rate selection 24 read-write Slow slow slew rate is selected 0b0 Fast fast slew rate is selected 0b1 IRQCLR Low Side Driver Interrupt Status Register Clear 0xC 32 read-write n 0x0 0x0 LS1_OC_ISC Low-Side 1 Overcurrent interrupt status clear 7 write-only No Clear None 0x0 Clear None 0x1 LS1_OL_ISC Low-Side 1 Open Load interrupt status clear 6 write-only no Clear None 0b0 Clear None 0b1 LS1_OL_SC Low-Side 1 Open Load status clear 14 write-only no Clear None 0b0 Clear None 0b1 LS1_OT_ISC Low-Side 1 Overtemperature interrupt status clear 5 write-only No Clear None 0x0 Clear None 0x1 LS1_OT_PREWARN_ISC Low-Side 1 Overtemperature prewarn interrupt status clear 4 write-only No Clear None 0x0 Clear None 0x1 LS1_OT_PREWARN_SC Low-Side 1 Overtemperature prewarn status clear 12 write-only No Clear None 0x0 Clear None 0x1 LS1_OT_SC Low-Side 1 Overtemperature status clear 13 write-only No Clear None 0x0 Clear None 0x1 LS2_OC_ISC Low-Side 2 Overcurrent interrupt status clear 23 write-only No Clear None 0x0 Clear None 0x1 LS2_OL_ISC Low-Side 2 Open Load interrupt status clear 22 write-only no Clear None 0b0 Clear None 0b1 LS2_OL_SC Low-Side 2 Open Load status clear 30 write-only no Clear None 0b0 Clear None 0b1 LS2_OT_ISC Low-Side 2 Overtemperature interrupt status clear 21 write-only No Clear None 0x0 Clear None 0x1 LS2_OT_PREWARN_ISC Low-Side 2Overtemperature prewarn interrupt status clear 20 write-only No Clear None 0x0 Clear None 0x1 LS2_OT_PREWARN_SC Low-Side 2 Overtemperature prewarn status clear 28 write-only No Clear None 0x0 Clear None 0x1 LS2_OT_SC Low-Side switch 2 Overtemperature status Clear 29 write-only No Clear None 0x0 Clear None 0x1 IRQEN Low Side Driver Interrupt Enable Register 0x10 32 read-write n 0x0 0x0 LS1_OC_IEN Low-Side 1 Overcurrent interrupt enable 7 read-write disable None 0b0 enable None 0b1 LS1_OL_IEN Low-Side 1 Open Load interrupt enable 6 read-write disable None 0b0 enable None 0b1 LS1_OT_IEN Low-Side 1 Overtemperature interrupt enable 5 read-write disabled None 0b0 enable None 0b1 LS1_OT_PREWARN_IEN Low-Side 1 Overtemperature prewarn interrupt enable 4 read-write disabled None 0b0 enable None 0b1 LS2_OC_IEN Low-Side 2 Overcurrent interrupt enable 23 read-write disable None 0b0 enable None 0b1 LS2_OL_IEN Low-Side 2 Open Load interrupt enable 22 read-write disable None 0b0 enable None 0b1 LS2_OT_IEN Low-Side 2 Overtemperature interrupt enable 21 read-write disabled None 0b0 enable None 0b1 LS2_OT_PREWARN_IEN Low-Side 2 Overtemperature prewarn interrupt enable 20 read-write disabled None 0b0 enable None 0b1 IRQS Low Side Driver Interrupt Status 0x8 32 read-write n 0x0 0x0 LS1_OC_IS Low-Side 1 Overcurrent Interrupt Status 7 read-write no Overcurrent no overcurrent Condition occurred. 0b0 Overcurrent overcurrent occurred switch is automatically shutdown. Write sets status. 0b1 LS1_OL_IS Low-Side 1 Open Load Interrupt Status 6 read-write no Open Load no open load Condition occurred. 0b0 Open Load open load occurred switch is not automatically shutdown. Write sets status. 0b1 LS1_OL_STS Low-Side 1 Open Load Status 14 read-write no Open Load no open load Condition occurred. 0b0 Open Load open load occurred switch is not automatically shutdown. Write sets status. 0b1 LS1_OT_IS Low-Side 1 Overtemperature Interrupt Status 5 read-write no Overtemperature no overtemperature occurred. 0b0 Overtemperature overtemperature occurred switch is automatically shutdown. Write sets status 0b1 LS1_OT_PREWARN_IS Low-Side 1 Overtemperature Prewarning Interrupt Status 4 read-write no Overtemperature Prewarn no overtemperature prewarn occurred. 0b0 Overtemperature Prewarn overtemperature prewarn occurred. Write sets status 0b1 LS1_OT_PREWARN_STS Low-Side 1 Overtemperature Prewarning Status 12 read-write no Overtemperature Prewarn no overtemperature prewarn occurred. 0b0 Overtemperature overtemperature prewarn occurred Write sets status 0b1 LS1_OT_STS Low-Side 1 Overtemperature Status 13 read-write no Overtemperature no overtemperature occurred. 0b0 Overtemperature overtemperature occurred switch is automatically shutdown. Write sets status 0b1 LS2_OC_IS Low-Side 2 Overcurrent Interrupt Status 23 read-write no Overcurrent no overcurrent Condition occurred. 0b0 Overcurrent overcurrent occurred switch is automatically shutdown. Write sets status. 0b1 LS2_OL_IS Low-Side 2 Open Load Interrupt Status 22 read-write no Open Load no open load Condition occurred. 0b0 Open Load open load occurred switch is not automatically shutdown. Write sets status. 0b1 LS2_OL_STS Low-Side 2 Open Load Status 30 read-write no Open Load no open load Condition occurred. 0b0 Open Load open load occurred switch is not automatically shutdown. Write sets status. 0b1 LS2_OT_IS Low-Side 2 Overtemperature Interrupt Status 21 read-write no Overtemperature no overtemperature occurred. 0b0 Overtemperature overtemperature occurred switch is automatically shutdown. Write sets status 0b1 LS2_OT_PREWARN_IS Low-Side 2 Overtemperature Prewarning Interrupt Status 20 read-write no Overtemperature Prewarn no overtemperature prewarn occurred. 0b0 Overtemperature Prewarn overtemperature prewarn occurred. Write sets status 0b1 LS2_OT_PREWARN_STS Low-Side 2 Overtemperature Prewarning Status 28 read-write no Overtemperature Prewarn no overtemperature prewarn occurred. 0b0 Overtemperature overtemperature prewarn occurred Write sets status 0b1 LS2_OT_STS Low-Side 2 Overtemperature Status 29 read-write no Overtemperature no overtemperature occurred. 0b0 Overtemperature overtemperature occurred switch is automatically shutdown. Write sets status 0b1 LS1_TRIM Low Side Trimming Register 0x18 32 read-write n 0x0 0x0 LS1_OC_BTFILT_SEL Overcurrent BlankTime Select for LS1 8 1 read-write 4_us 4 us filter time 0b00 8_us 8 us filter time 0b01 16_us 16 us filter time 0b10 32_us 32 us filter time 0b11 LS1_OL_BTFILT_SEL Open load Blank Time Select for LS1 0 1 read-write 4_us 4 us filter time 0b00 8_us 8 us filter time 0b01 16_us 16 us filter time 0b10 32_us 32 us filter time 0b11 LS2_TRIM Low Side Trimming Register 0x20 32 read-write n 0x0 0x0 LS2_OC_BTFILT_SEL Overcurrent BlankTime Select for LS2 8 1 read-write 4_us 4 us filter time 0b00 8_us 8 us filter time 0b01 16_us 16 us filter time 0b10 32_us 32 us filter time 0b11 LS2_OL_BTFILT_SEL Open load Blank Time Select for LS2 0 1 read-write 4_us 4 us filter time 0b00 8_us 8 us filter time 0b01 16_us 16 us filter time 0b10 32_us 32 us filter time 0b11 PWMSRCSEL Low Side PWM Source Selection Register 0x1C 32 read-write n 0x0 0x0 LS1_SRC_SEL LS1 PWM Source Selection 3 2 read-write CC60 PWM output of CCU6 0b0000 CC61 PWM output of CCU6 0b0001 CC62 PWM output of CCU6 0b0010 COUT60 PWM output of CCU6 0b0011 COUT61 PWM output of CCU6 0b0100 COUT62 PWM output of CCU6 0b0101 T3OUT PWM output of GPT12 0b0110 LS2_SRC_SEL LS2 PWM Source Selection 0 2 read-write CC60 PWM output of CCU6 0b0000 CC61 PWM output of CCU6 0b0001 CC62 PWM output of CCU6 0b0010 COUT60 PWM output of CCU6 0b0011 COUT61 PWM output of CCU6 0b0100 COUT62 PWM output of CCU6 0b0101 T3OUT PWM output of GPT12 0b0110 MF MF MF 0x0 0x0 0x50 registers n REF1_STS Reference 1 Status Register 0x14 32 read-write n 0x0 0x0 REFBG_LOTHWARN_STS Status for Undervoltage Threshold Measurement of internal VAREF 4 read-only UPPER_TRIG_RESET write clears status 0b0 UPPER_TRIG_SET trigger status set 0b1 REFBG_UPTHWARN_STS Status for Overvoltage Threshold Measurement of internal VAREF 5 read-only UPPER_TRIG_RESET write clears status 0b0 UPPER_TRIG_SET trigger status set 0b1 TEMPSENSE_CTRL Temperature Sensor Control Register 0x10 32 read-write n 0x0 0x0 LS_OTWARN_STS Low Side Overtemperature Warning (MU) Status 4 read-only INACTIVE write clears status 0b0 ACTIVE interrupt status set 0b1 LS_OT_STS Low Side Overtemperature (MU) Status 5 read-only INACTIVE write clears status 0b0 ACTIVE interrupt status set 0b1 SYS_OTWARN_STS System Overtemperature Warning (MU) Status 6 read-only INACTIVE write clears status 0b0 ACTIVE interrupt status set 0b1 SYS_OT_STS System Overtemperature (MU) Status 7 read-only INACTIVE write clears status 0b0 ACTIVE interrupt status set 0b1 PMU PMU PMU 0x0 0x0 0x1000 registers n CNF_RST_TFB Reset Blind Time Register 0x6C 32 read-write n 0x0 0x0 RST_TFB Reset Pin Blind Time Selection Bits 0 1 read-write RST_TFB_0 0.5 us typ. 0b00 RST_TFB_1 1 us typ. 0b01 RST_TFB_2 5 us typ. 0b10 RST_TFB_3 31 us typ. 0b11 CNF_WAKE_FILTER PMU Wake-up Timing Register 0xAC 32 read-write n 0x0 0x0 CNF_GPIO_FT Wake-up Filter time for General Purpose IO 2 1 read-write 10_us 10 us filter time 0b00 20_us 20 us filter time 0b01 40_us 40 us filter time 0b10 5_us 5 us filter time 0b11 CNF_LIN_FT Wake-up Filter time for LIN WAKE 0 read-write 30_us 30 us filter time 0b0 50_us 50 us filter time 0b1 CNF_MON_FT Wake-up Filter time for Monitoring Inputs 1 read-write 20_us 20 us filter time 0b0 40_us 40 us filter time 0b1 GPIO_WAKE_STATUS GPIO Port wake status register 0x4 32 read-write n 0x0 0x0 GPIO1_STS_0 Wake GPIO1_0 8 read-only No wake-up detected None 0b0 wake-up detected None 0b1 GPIO1_STS_1 Wake GPIO1_1 9 read-only No wake-up detected None 0b0 wake-up detected None 0b1 GPIO1_STS_2 Wake GPIO1_2 10 read-only No wake-up detected None 0b0 wake-up detected None 0b1 GPIO1_STS_4 Wake GPIO1_4 12 read-only No wake-up detected None 0b0 wake-up detected None 0b1 GPUDATA0to3 General Purpose User DATA0to3 0xC0 32 read-write n 0x0 0x0 DATA0 DATA0 Storage Byte 0 7 read-write DATA1 DATA1 Storage Byte 8 7 read-write DATA2 DATA2 Storage Byte 16 7 read-write DATA3 DATA3 Storage Byte 24 7 read-write GPUDATA4to7 General Purpose User DATA4to7 0xC4 32 read-write n 0x0 0x0 DATA4 DATA4 Storage Byte 0 7 read-write DATA5 DATA5 Storage Byte 8 7 read-write DATA6 DATA6 Storage Byte 16 7 read-write DATA7 DATA7 Storage Byte 24 7 read-write GPUDATA8to11 General Purpose User DATA8to11 0xC8 32 read-write n 0x0 0x0 DATA10 DATA10 Storage Byte 16 7 read-write DATA11 DATA11 Storage Byte 24 7 read-write DATA8 DATA8 Storage Byte 0 7 read-write DATA9 DATA9 Storage Byte 8 7 read-write HIGHSIDE_CTRL High-side Control Register 0x5C 32 read-write n 0x0 0x0 HS1_CYC_EN High-side 1 switch enable for cyclic sense 2 read-write Disable None 0b0 Enable None 0b1 HS2_CYC_EN High-side 2 switch enable for cyclic sense 10 read-write Disable None 0b0 Enable None 0b1 LIN_WAKE_EN LIN Wake Enable 0x50 32 read-write n 0x0 0x0 LIN_EN Lin Wake enable 7 read-write Disable None 0b0 Enable None 0b1 MON_CNF1 Settings Monitor 1-4 0x34 32 read-write n 0x0 0x0 MON1_CYC MON1 for Cycle Sense Enable 3 read-write value1 Cycle Sense disabled 0b0 value2 Cycle Sense enabled 0b1 MON1_EN MON1 Enable 0 read-write value1 MON1 disabled 0b0 value2 MON1 enabled 0b1 MON1_FALL MON1 Wake-up on Falling Edge Enable 1 read-write value1 Wake-up disabled 0b0 value2 Wake-up enabled 0b1 MON1_PD Pull-Down Current Source for MON1 Input Enable 4 read-write value1 Pull-down source disabled 0b0 value2 Pull-down source enabled 0b1 MON1_PU Pull-Up Current Source for MON1 Input Enable 5 read-write value1 Pull-up source disabled 0b0 value2 Pull-up source enabled 0b1 MON1_RISE MON1 Wake-up on Rising Edge Enable 2 read-write value1 Wake-up disabled 0b0 value2 Wake-up enabled 0b1 MON1_STS MON1 Status Input 7 read-only value1 MON input has low status 0b0 value2 MON input has high status 0b1 MON2_CYC MON2 for Cycle Sense Enable 11 read-write value1 Cycle Sense disabled 0b0 value2 Cycle Sense enabled 0b1 MON2_EN MON2 Enable 8 read-write value1 MON2 disabled 0b0 value2 MON2 enabled 0b1 MON2_FALL MON2 Wake-up on Falling Edge Enable 9 read-write value1 Wake-up disabled 0b0 value2 Wake-up enabled 0b1 MON2_PD Pull-Down Current Source for MON2 Input Enable 12 read-write value1 Pull-down source disabled 0b0 value2 Pull-down source enabled 0b1 MON2_PU Pull-Up Current Source for MON2 Input Enable 13 read-write value1 Pull-up source disabled 0b0 value2 Pull-up source enabled 0b1 MON2_RISE MON2 Wake-up on Rising Edge Enable 10 read-write value1 Wake-up disabled 0b0 value2 Wake-up enabled 0b1 MON2_STS MON2 Status Input 15 read-only value1 MON input has low status 0b0 value2 MON input has high status 0b1 MON3_CYC MON3 for Cycle Sense Enable 19 read-write value1 Cycle Sense disabled 0b0 value2 Cycle Sense enabled 0b1 MON3_EN MON3 Enable 16 read-write value1 MON3 disabled 0b0 value2 MON3 enabled 0b1 MON3_FALL MON3 Wake-up on Falling Edge Enable 17 read-write value1 Wake-up disabled 0b0 value2 Wake-up enabled 0b1 MON3_PD Pull-Down Current Source for MON3 Input Enable 20 read-write value1 Pull-down source disabled 0b0 value2 Pull-down source enabled 0b1 MON3_PU Pull-Up Current Source for MON3 Input Enable 21 read-write value1 Pull-up source disabled 0b0 value2 Pull-up source enabled 0b1 MON3_RISE MON3 Wake-up on Rising Edge Enable 18 read-write value1 Wake-up disabled 0b0 value2 Wake-up enabled 0b1 MON3_STS MON3 Status Input 23 read-only value1 MON input has low status 0b0 value2 MON input has high status 0b1 MON4_CYC MON4 for Cycle Sense Enable 27 read-write value1 Cycle Sense disabled 0b0 value2 Cycle Sense enabled 0b1 MON4_EN MON4 Enable 24 read-write value1 MON4 disabled 0b0 value2 MON4 enabled 0b1 MON4_FALL MON4 Wake-up on Falling Edge Enable 25 read-write value1 Wake-up disabled 0b0 value2 Wake-up enabled 0b1 MON4_PD Pull-Down Current Source for MON4 Input Enable 28 read-write value1 Pull-down source disabled 0b0 value2 Pull-down source enabled 0b1 MON4_PU Pull-Up Current Source for MON4 Input Enable 29 read-write value1 Pull-up source disabled 0b0 value2 Pull-up source enabled 0b1 MON4_RISE MON4 Wake-up on Rising Edge Enable 26 read-write value1 Wake-up disabled 0b0 value2 Wake-up enabled 0b1 MON4_STS MON4 Status Input 31 read-only value1 MON input has low status 0b0 value2 MON input has high status 0b1 MON_CNF2 Settings Monitor 5 0x38 32 read-write n 0x0 0x0 MON5_CYC MON5 for Cycle Sense Enable 3 read-write value1 Cycle Sense disabled 0b0 value2 Cycle Sense enabled 0b1 MON5_EN MON5 Enable 0 read-write value1 MON5 disabled 0b0 value2 MON5 enabled 0b1 MON5_FALL MON5 Wake-up on Falling Edge Enable 1 read-write value1 Wake-up disabled 0b0 value2 Wake-up enabled 0b1 MON5_PD Pull-Down Current Source for MON5 Input Enable 4 read-write value1 Pull-down source disabled 0b0 value2 Pull-down source enabled 0b1 MON5_PU Pull-Up Current Source for MON5 Input Enable 5 read-write value1 Pull-up source disabled 0b0 value2 Pull-up source enabled 0b1 MON5_RISE MON5 Wake-up on Rising Edge Enable 2 read-write value1 Wake-up disabled 0b0 value2 Wake-up enabled 0b1 MON5_STS MON5 Status Input 7 read-only value1 MON input has low status 0b0 value2 MON input has high status 0b1 RESET_STS Reset Status Register 0x10 32 read-write n 0x0 0x0 LOCKUP Lockup-Reset Flag 10 read-write value1 No Lockup-Reset executed 0b0 value2 Lockup-Reset executed 0b1 PMU_ClkWDT Clock Watchdog (CLKWDT) Reset Flag 4 read-write value1 No Clock Watchdog reset executed 0b0 value2 Clock Watchdog reset executed 0b1 PMU_ExtWDT External Watchdog (WDT1) Reset Flag 5 read-write value1 No External Watchdog reset executed 0b0 value2 External Watchdog reset executed 0b1 PMU_LPR Low Priority Resets 3 read-write value1 Low Priority-Reset executed 0b0 value2 Low Priority executed 0b1 PMU_PIN PIN-Reset Flag 6 read-write value1 No PIN-Reset executed 0b0 value2 PIN-Reset executed 0b1 PMU_SleepEX Flag which indicates a reset caused by Sleep-Exit 2 read-write value1 No reset caused by Sleep-Exit executed 0b0 value2 Reset caused by Sleep-Exit executed 0b1 PMU_SOFT Soft-Reset Flag 9 read-write value1 No Soft-Reset executed 0b0 value2 Soft-Reset executed 0b1 PMU_VS_POR Power-On Reset Flag 7 read-write value1 No Power-On reset executed 0b0 value2 Power-On reset executed 0b1 PMU_WAKE Flag which indicates a reset caused by Stop-Exit 1 read-write value1 No reset caused by Stop-Exit executed 0b0 value2 Reset caused by Stop-Exit executed 0b1 SYS_FAIL Flag which indicates a reset caused by a System Fail reported in the corresponding Fail Register 0 read-write value1 No reset caused by System Fail executed 0b0 value2 Reset caused by System Fail executed 0b1 SLEEP PMU Sleep Behavior Register 0x20 32 read-write n 0x0 0x0 CYC_SENSE_E01 Exponent 12 1 read-write value1 Exponent value is 0 0b00 value2 Exponent value is 1 0b01 value3 Exponent value is 2 0b10 value4 Exponent value is 3 0b11 CYC_SENSE_EN Enabling Cyclic Sense 3 read-write value1 Cyclic Sense disabled 0b0 value2 Cyclic Sense enabled 0b1 CYC_SENSE_M03 Mantissa 8 3 read-write value1 Mantissa value is 1 0b0000 value2 Mantissa value is 16 0b1111 CYC_SENSE_S_DEL Sample Delay in Cyclic Sense Mode 24 2 read-write value1 is 10 us 0b000 value2 is 20 us 0b001 value3 is 30 us 0b010 value4 is 40 us 0b011 value5 is 60 us 0b100 value6 is 80 us 0b101 value7 is 100 us 0b110 value8 is 150 us 0b111 CYC_WAKE_E01 Exponent 20 1 read-write value1 Exponent value is 0 0b00 value2 Exponent value is 1 0b01 value3 Exponent value is 2 0b10 value4 Exponent value is 3 0b11 CYC_WAKE_EN Enabling Cyclic Wake 2 read-write value1 Cyclic Wake disabled 0b0 value2 Cyclic Wake enabled 0b1 CYC_WAKE_M03 Mantissa 16 3 read-write value1 Mantissa value is 1 0b0000 value2 Mantissa value is 16 0b1111 EN_0V9_N Enables the reduction of the VDDC regulator output to reduced voltage during Stop-Mode 1 read-write value1 Output voltage reduction enabled 0b0 value2 Output voltage reduction disabled 0b1 RFU Reserved for Future Use 4 read-write value1 writing a zero has no effect 0b0 value2 writing a one has no effect 0b1 WAKE_W_RST Wake-up with reset execution 0 read-write value1 Stop-Exit without reset execution 0b0 value2 Stop-Exit with reset execution 0b1 SUPPLY_STS Voltage Reg Status Register 0x8 32 read-write n 0x0 0x0 PMU_1V5_FAIL_EN Enabling of VDDC status information as interrupt source 2 read-write value1 No interrupts are generated 0b0 value2 Interrupts are generated 0b1 PMU_1V5_OVERLOAD Overload at VDDC regulator 1 read-only value1 No overload 0b0 value2 Overload 0b1 PMU_1V5_OVERVOLT Overvoltage at VDDC regulator 0 read-only value1 No overvoltage 0b0 value2 Overvoltage 0b1 PMU_5V_FAIL_EN Enabling of VDDP status information as interrupt source 6 read-write value1 No interrupts are generated 0b0 value2 Interrupts are generated 0b1 PMU_5V_OVERLOAD Overload at VDDP regulator 5 read-only value1 No overload 0b0 value2 Overload 0b1 PMU_5V_OVERVOLT Overvoltage at VDDP regulator 4 read-only value1 No overvoltage 0b0 value2 Overvoltage 0b1 VDDEXT_CTRL VDDEXT Control 0xC 32 read-write n 0x0 0x0 VDDEXT_CYC_EN VDDEXT Supply for Cyclic Sense Enable 1 read-write value1 VDDEXT for cyclic sense disable 0b0 value2 VDDEXT for cyclic sense enable 0b1 VDDEXT_ENABLE VDDEXT Supply Enable 0 read-write value1 VDDEXT Supply disabled 0b0 value2 VDDEXT supply enabled 0b1 VDDEXT_FAIL_EN Enabling of VDDEXT Supply status information as interrupt source 2 read-write value1 VDDEXT fail interrupts are disabled 0b0 value2 VDDEXT fail Interrupts are enabled 0b1 VDDEXT_OT VDDEXT Supply Overtemperature 6 read-only value1 VDDEXT not in overtemperature condition 0b0 value2 VDDEXT in overtemperature condition 0b1 VDDEXT_OT_IS VDDEXT Supply Overtemperature Interrupt Status 3 read-only value1 VDDEXT no overtemperature condition 0b0 value2 VDDEXT overtemperature condition 0b1 VDDEXT_OT_ISC VDDEXT Supply Overtemperature Interrupt Status clear 11 write-only value2 VDDEXT Overtemperature not cleared 0b0 value1 VDDEXT Overtemperature cleared 0b1 VDDEXT_OT_SC VDDEXT Supply Overtemperature Status clear 13 write-only value2 VDDEXT Overtemperature status not cleared 0b0 value1 VDDEXT Overtemperature status cleared 0b1 VDDEXT_OT_STS VDDEXT Supply Overtemperature Status 5 read-only value1 VDDEXT not in overtemperature condition 0b0 value2 VDDEXT in overtemperature condition 0b1 VDDEXT_STABLE VDDEXT Supply Stable 7 read-only value1 VDDEXT not in stable condition 0b0 value2 VDDEXT in stable condition 0b1 VDDEXT_UV_IS VDDEXT Supply Undervoltage Interrupt Status 4 read-only value1 VDDEXT not in undervoltage condition 0b0 value2 VDDEXT in undervoltage condition 0b1 VDDEXT_UV_ISC VDDEXT Supply Undervoltage Interrupt Status clear 12 write-only value2 VDDEXT Undervoltage not cleared 0b0 value1 VDDEXT Undervoltage cleared 0b1 WAKE_CNF_GPIO1 Wake Configuration GPIO Port 1 Register 0xCC 32 read-write n 0x0 0x0 CYC_0 GPIO1_0 input for cycle sense enable 16 read-write DISABLE input for cycle sense disabled 0b0 ENABLE input for cycle sense enabled 0b1 CYC_1 GPIO1_1 input for cycle sense enable 17 read-write DISABLE input for cycle sense disabled 0b0 ENABLE input for cycle sense enabled 0b1 CYC_2 GPIO1_2 input for cycle sense enable 18 read-write DISABLE input for cycle sense disabled 0b0 ENABLE input for cycle sense enabled 0b1 CYC_4 GPIO1_4 input for cycle sense enable 20 read-write DISABLE input for cycle sense disabled 0b0 ENABLE input for cycle sense enabled 0b1 FA_0 Port 1_0 Wake-up on Falling Edge enable 8 read-write DISABLE wake-up disabled 0b0 ENABLE wake-up enabled 0b1 FA_1 Port 1_1 Wake-up on Falling Edge enable 9 read-write DISABLE wake-up disabled 0b0 ENABLE wake-up enabled 0b1 FA_2 Port 1_2 Wake-up on Falling Edge enable 10 read-write DISABLE wake-up disabled 0b0 ENABLE wake-up enabled 0b1 FA_4 Port 1_4 Wake-up on Falling Edge enable 12 read-write DISABLE wake-up disabled 0b0 ENABLE wake-up enabled 0b1 RI_0 Port 1_0 Wake-up on Rising Edge enable 0 read-write DISABLE wake-up disabled 0b0 ENABLE wake-up enabled 0b1 RI_1 Port 1_1 Wake-up on Rising Edge enable 1 read-write DISABLE wake-up disabled 0b0 ENABLE wake-up enabled 0b1 RI_2 Port 1_2 Wake-up on Rising Edge enable 2 read-write DISABLE wake-up disabled 0b0 ENABLE wake-up enabled 0b1 RI_4 Port 1_4 Wake-up on Rising Edge enable 4 read-write DISABLE wake-up disabled 0b0 ENABLE wake-up enabled 0b1 WAKE_STATUS Main wake status register 0x0 32 read-write n 0x0 0x0 CYC_WAKE Wake-up caused by Cyclic Wake 4 read-only value1 No Wake-up occurred 0b0 value2 Wake-up occurred 0b1 FAIL Wake-up after VDDEXT Fail 5 read-only value1 No Wake-up occurred 0b0 value2 Wake-up occurred 0b1 GPIO1 Wake-up via GPIO1 which is a logical OR combination of all Wake_STS_GPIO1 bits 3 read-only value1 No Wake-up occurred 0b0 value2 Wake-up occurred 0b1 LIN_WAKE Wake-up via LIN- Message 0 read-only value1 No Wake-up occurred 0b0 value2 Wake-up occurred 0b1 MON Wake-up via MON which is a logical OR combination of all Wake_STS_MON bits 1 read-only value1 No Wake-up occurred 0b0 value2 Wake-up occurred 0b1 MON1_WAKE_STS Status of MON1 8 read-only No wake-up detected None 0b0 wake-up detected None 0b1 MON2_WAKE_STS Status of MON2 9 read-only No wake-up detected None 0b0 wake-up detected None 0b1 MON3_WAKE_STS Status of MON3 10 read-only No wake-up detected None 0b0 wake-up detected None 0b1 MON4_WAKE_STS Status of MON4 11 read-only No wake-up detected None 0b0 wake-up detected None 0b1 MON5_WAKE_STS Status of MON5 12 read-only No wake-up detected None 0b0 wake-up detected None 0b1 VDDEXT_OT Wake VDDEXT Overtemperature 17 read-only No wake-up detected None 0b0 wake-up detected None 0b1 VDDEXT_UV Wake VDDEXT Undervoltage 18 read-only No wake-up detected None 0b0 wake-up detected None 0b1 WFS WFS System Fail Register 0x70 32 read-write n 0x0 0x0 LP_CLKWD LP_CLKWD 7 read-only ok None 0b0 fail None 0b1 PMU_1V5_OVL VDDC Overload Flag 2 read-only No Overload VDDC ok 0b0 Overload Hall VDDC Overload 0b1 PMU_5V_OVL VDDP Overload Flag 3 read-only No Overload VDDP ok 0b0 Overload VDDP Overload 0b1 SUPP_SHORT Supply Short 0 read-only Main Supply ok VDDP or VDDC are in expected range 0b0 Main Supply short VDDP or VDDC do not have stable operating point 0b1 SUPP_TMOUT Supply Time Out 1 read-only Main Supply ok VDDP or VDDC are in expected range 0b0 Main Supply fail VDDP or VDDC do not have stable operating point 0b1 SYS_CLK_WDT System Clock (fsys)Watchdog Fail 4 read-only No System Clock Fail fsys ok 0b0 System Clock Fail fsys failed 0b1 SYS_OT System Overtemperature Indication Flag 5 read-only No Overtemperature System ok 0b0 Overtemperature System Overtemperature 0b1 WDT1_SEQ_FAIL External Watchdog (WDT1) Sequential Fail 6 read-only No Fail System working properly 0b0 Sequential Watchdog Fail 5 consecutive watchdog fails 0b1 PORT PORT PORT 0x0 0x0 0x2000 registers n P0_ALTSEL0 Port 0 Alternate Select Register 0 0x14 32 read-write n 0x0 0x0 PP0 See 0 read-write PP1 See 1 read-write PP2 See 2 read-write PP3 See 3 read-write PP4 See 4 read-write PP5 See 5 read-write P0_ALTSEL1 Port 0 Alternate Select Register 1 0x18 32 read-write n 0x0 0x0 PP0 See 0 read-write PP1 See 1 read-write PP2 See 2 read-write PP3 See 3 read-write PP4 See 4 read-write PP5 See 5 read-write P0_DATA Port 0 Data Register 0x0 32 read-write n 0x0 0x0 PP0 Port 0 Pin 0 Data Value 0 read-write 0 Port 0 pin 0 data value = 0 0b0 1 Port 0 pin 0 data value = 1 0b1 PP0_STS Port 0 Pin 0 Data Value (read back of Port Data when IO is configured as output) 16 read-only 0 Port 0 pin 0 data value = 0 0b0 1 Port 0 pin 0 data value = 1 0b1 PP1 Port 0 Pin 1 Data Value 1 read-write 0 Port 0 pin 1 data value = 0 0b0 1 Port 0 pin 1 data value = 1 0b1 PP1_STS Port 0 Pin 1 Data Value (read back of Port Data when IO is configured as output) 17 read-only 0 Port 0 pin 1 data value = 0 0b0 1 Port 0 pin 1 data value = 1 0b1 PP2 Port 0 Pin 2 Data Value 2 read-write 0 Port 0 pin 2 data value = 0 0b0 1 Port 0 pin 2 data value = 1 0b1 PP2_STS Port 0 Pin 2 Data Value (read back of Port Data when IO is configured as output) 18 read-only 0 Port 0 pin 2 data value = 0 0b0 1 Port 0 pin 2 data value = 1 0b1 PP3 Port 0 Pin 3 Data Value 3 read-write 0 Port 0 pin 3 data value = 0 0b0 1 Port 0 pin 3 data value = 1 0b1 PP3_STS Port 0 Pin 3 Data Value (read back of Port Data when IO is configured as output) 19 read-only 0 Port 0 pin 3 data value = 0 0b0 1 Port 0 pin 3 data value = 1 0b1 PP4 Port 0 Pin 4 Data Value 4 read-write 0 Port 0 pin 4 data value = 0 0b0 1 Port 0 pin 4 data value = 1 0b1 PP4_STS Port 0 Pin 4 Data Value (read back of Port Data when IO is configured as output) 20 read-only 0 Port 0 pin 4 data value = 0 0b0 1 Port 0 pin 4 data value = 1 0b1 PP5 Port 0 Pin 5 Data Value 5 read-write 0 Port 0 pin 5 data value = 0 0b0 1 Port 0 pin 5 data value = 1 0b1 PP5_STS Port 0 Pin 5 Data Value (read back of Port Data when IO is configured as output) 21 read-only 0 Port 0 pin 5 data value = 0 0b0 1 Port 0 pin 5 data value = 1 0b1 P0_DIR Port 0 Direction Register 0x4 32 read-write n 0x0 0x0 PP0 Port 0 Pin 0 Direction Control 0 read-write 0 Direction is set to input (default) 0b0 1 Direction is set to output 0b1 PP0_INEN Port 0 Pin 0 Input Schmitt Trigger enable (only valid if IO is configured as output) 16 read-write 0 Schmitt Trigger is disabled (default) 0b0 1 Schmitt Trigger is enabled 0b1 PP1 Port 0 Pin 1 Direction Control 1 read-write 0 Direction is set to input (default) 0b0 1 Direction is set to output 0b1 PP1_INEN Port 0 Pin 1 Input Schmitt Trigger enable (only valid if IO is configured as output) 17 read-write 0 Schmitt Trigger is disabled (default) 0b0 1 Schmitt Trigger is enabled 0b1 PP2 Port 0 Pin 2 Direction Control 2 read-write 0 Direction is set to input (default) 0b0 1 Direction is set to output 0b1 PP2_INEN Port 0 Pin 2 Input Schmitt Trigger enable (only valid if IO is configured as output) 18 read-write 0 Schmitt Trigger is disabled (default) 0b0 1 Schmitt Trigger is enabled 0b1 PP3 Port 0 Pin 3 Direction Control 3 read-write 0 Direction is set to input (default) 0b0 1 Direction is set to output 0b1 PP3_INEN Port 0 Pin 3 Input Schmitt Trigger enable (only valid if IO is configured as output) 19 read-write 0 Schmitt Trigger is disabled (default) 0b0 1 Schmitt Trigger is enabled 0b1 PP4 Port 0 Pin 4 Direction Control 4 read-write 0 Direction is set to input (default) 0b0 1 Direction is set to output 0b1 PP4_INEN Port 0 Pin 4 Input Schmitt Trigger enable (only valid if IO is configured as output) 20 read-write 0 Schmitt Trigger is disabled (default) 0b0 1 Schmitt Trigger is enabled 0b1 PP5 Port 0 Pin 5 Direction Control 5 read-write 0 Direction is set to input (default) 0b0 1 Direction is set to output 0b1 PP5_INEN Port 0 Pin 5 Input Schmitt Trigger enable (only valid if IO is configured as output) 21 read-write 0 Schmitt Trigger is disabled (default) 0b0 1 Schmitt Trigger is enabled 0b1 P0_OD Port 0 Open Drain Control Register 0x8 32 read-write n 0x0 0x0 PP0 Port 0 Pin 0 Open Drain Mode 0 read-write Normal Mode Output is actively driven for 0 and 1 state (default) 0b0 Open Drain Mode Output is actively driven only for 0 state 0b1 PP1 Port 0 Pin 1 Open Drain Mode 1 read-write Normal Mode Output is actively driven for 0 and 1 state (default) 0b0 Open Drain Mode Output is actively driven only for 0 state 0b1 PP2 Port 0 Pin 2 Open Drain Mode 2 read-write Normal Mode Output is actively driven for 0 and 1 state (default) 0b0 Open Drain Mode Output is actively driven only for 0 state 0b1 PP3 Port 0 Pin 3 Open Drain Mode 3 read-write Normal Mode Output is actively driven for 0 and 1 state (default) 0b0 Open Drain Mode Output is actively driven only for 0 state 0b1 PP4 Port 0 Pin 4 Open Drain Mode 4 read-write Normal Mode Output is actively driven for 0 and 1 state (default) 0b0 Open Drain Mode Output is actively driven only for 0 state 0b1 PP5 Port 0 Pin 5 Open Drain Mode 5 read-write Normal Mode Output is actively driven for 0 and 1 state (default) 0b0 Open Drain Mode Output is actively driven only for 0 state 0b1 P0_PUDEN Port 0 Pull-Up/Pull-Down Enable Register 0x10 32 read-write n 0x0 0x0 PP0 Pull-Up/Pull-Down Enable at Port 0 Bit 0 0 read-write Disabled Pull-up or Pull-down device is disabled 0b0 Enabled Pull-up or Pull-down device is enabled (default) 0b1 PP1 Pull-Up/Pull-Down Enable at Port 0 Bit 1 1 read-write Disabled Pull-up or Pull-down device is disabled 0b0 Enabled Pull-up or Pull-down device is enabled (default) 0b1 PP2 Pull-Up/Pull-Down Enable at Port 0 Bit 2 2 read-write Disabled Pull-up or Pull-down device is disabled 0b0 Enabled Pull-up or Pull-down device is enabled (default) 0b1 PP3 Pull-Up/Pull-Down Enable at Port 0 Bit 3 3 read-write Disabled Pull-up or Pull-down device is disabled 0b0 Enabled Pull-up or Pull-down device is enabled (default) 0b1 PP4 Pull-Up/Pull-Down Enable at Port 0 Bit 4 4 read-write Disabled Pull-up or Pull-down device is disabled 0b0 Enabled Pull-up or Pull-down device is enabled (default) 0b1 PP5 Pull-Up/Pull-Down Enable at Port 0 Bit 5 5 read-write Disabled Pull-up or Pull-down device is disabled 0b0 Enabled Pull-up or Pull-down device is enabled (default) 0b1 P0_PUDSEL Port 0 Pull-Up/Pull-Down Select Register 0xC 32 read-write n 0x0 0x0 PP0 Pull-Up/Pull-Down Select Port 0 Bit 0 0 read-write Pull-down Pull-down device is selected 0b0 Pull-up Pull-up device is selected (default) 0b1 PP1 Pull-Up/Pull-Down Select Port 0 Bit 1 1 read-write Pull-down Pull-down device is selected 0b0 Pull-up Pull-up device is selected (default) 0b1 PP2 Pull-Up/Pull-Down Select Port 0 Bit 2 2 read-write Pull-down Pull-down device is selected 0b0 Pull-up Pull-up device is selected (default) 0b1 PP3 Pull-Up/Pull-Down Select Port 0 Bit 3 3 read-write Pull-down Pull-down device is selected 0b0 Pull-up Pull-up device is selected (default) 0b1 PP4 Pull-Up/Pull-Down Select Port 0 Bit 4 4 read-write Pull-down Pull-down device is selected 0b0 Pull-up Pull-up device is selected (default) 0b1 PP5 Pull-Up/Pull-Down Select Port 0 Bit 5 5 read-write Pull-down Pull-down device is selected 0b0 Pull-up Pull-up device is selected (default) 0b1 P1_ALTSEL0 Port 1 Alternate Select Register 0 0x34 32 read-write n 0x0 0x0 PP0 See 0 read-write PP1 See 1 read-write PP2 See 2 read-write PP4 See 4 read-write P1_ALTSEL1 Port 1 Alternate Select Register 1 0x38 32 read-write n 0x0 0x0 PP0 See 0 read-write PP1 See 1 read-write PP2 See 2 read-write PP4 See 4 read-write P1_DATA Port 1 Data Register 0x20 32 read-write n 0x0 0x0 PP0 Port 1 Pin 0 Data Value 0 read-write 0 Port 1 pin 0 data value = 0 0b0 1 Port 1 pin 0 data value = 1 0b1 PP0_STS Port 1 Pin 0 Data Value (read back of Port Data when IO is configured as output) 16 read-write 0 Port 1 pin 0 data value = 0 0b0 1 Port 1 pin 0 data value = 1 0b1 PP1 Port 1 Pin 1 Data Value 1 read-write 0 Port 1 pin 1 data value = 0 0b0 1 Port 1 pin 1 data value = 1 0b1 PP1_STS Port 1 Pin 1 Data Value (read back of Port Data when IO is configured as output) 17 read-write 0 Port 1 pin 1 data value = 0 0b0 1 Port 1 pin 1 data value = 1 0b1 PP2 Port 1 Pin 2 Data Value 2 read-write 0 Port 1 pin 2 data value = 0 0b0 1 Port 1 pin 2 data value = 1 0b1 PP2_STS Port 1 Pin 2 Data Value (read back of Port Data when IO is configured as output) 18 read-write 0 Port 1 pin 2 data value = 0 0b0 1 Port 1 pin 2 data value = 1 0b1 PP4 Port 1 Pin 4 Data Value 4 read-write 0 Port 1 pin 4 data value = 0 0b0 1 Port 1 pin 4 data value = 1 0b1 PP4_STS Port 1 Pin 4 Data Value (read back of Port Data when IO is configured as output) 20 read-write 0 Port 1 pin 4 data value = 0 0b0 1 Port 1 pin 4 data value = 1 0b1 P1_DIR Port 1 Direction Register 0x24 32 read-write n 0x0 0x0 PP0 Port 1 Pin 0 Direction Control 0 read-write Input Direction is set to input (default) 0b0 Output Direction is set to output 0b1 PP0_INEN Port 1 Pin 0 Input Schmitt Trigger enable (only valid if IO is configured as output) 16 read-write 0 Schmitt Trigger is disabled (default) 0b0 1 Schmitt Trigger is enabled 0b1 PP1 Port 1 Pin 1 Direction Control 1 read-write Input Direction is set to input (default) 0b0 Output Direction is set to output 0b1 PP1_INEN Port 1 Pin 1 Input Schmitt Trigger enable (only valid if IO is configured as output) 17 read-write 0 Schmitt Trigger is disabled (default) 0b0 1 Schmitt Trigger is enabled 0b1 PP2 Port 1 Pin 2 Direction Control 2 read-write Input Direction is set to input (default) 0b0 Output Direction is set to output 0b1 PP2_INEN Port 1 Pin 2 Input Schmitt Trigger enable (only valid if IO is configured as output) 18 read-write 0 Schmitt Trigger is disabled (default) 0b0 1 Schmitt Trigger is enabled 0b1 PP4 Port 1 Pin 4 Direction Control 4 read-write Input Direction is set to input (default) 0b0 Output Direction is set to output 0b1 PP4_INEN Port 1 Pin 4 Input Schmitt Trigger enable (only valid if IO is configured as output) 20 read-write 0 Schmitt Trigger is disabled (default) 0b0 1 Schmitt Trigger is enabled 0b1 P1_OD Port 1 Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PP0 Port 1 Pin 0 Open Drain Mode 0 read-write Normal Mode Output is actively driven for 0 and 1 state (default) 0b0 Open Drain Mode Output is actively driven only for 0 state 0b1 PP1 Port 1 Pin 1 Open Drain Mode 1 read-write Normal Mode Output is actively driven for 0 and 1 state (default) 0b0 Open Drain Mode Output is actively driven only for 0 state 0b1 PP2 Port 1 Pin 2 Open Drain Mode 2 read-write Normal Mode Output is actively driven for 0 and 1 state (default) 0b0 Open Drain Mode Output is actively driven only for 0 state 0b1 PP4 Port 1 Pin 4 Open Drain Mode 4 read-write Normal Mode Output is actively driven for 0 and 1 state (default) 0b0 Open Drain Mode Output is actively driven only for 0 state 0b1 P1_PUDEN Port 1 Pull-Up/Pull-Down Enable Register 0x30 32 read-write n 0x0 0x0 PP0 Pull-Up/Pull-Down Enable at Port 1 Bit 0 0 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 PP1 Pull-Up/Pull-Down Enable at Port 1 Bit 1 1 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 PP2 Pull-Up/Pull-Down Enable at Port 1 Bit 2 2 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 PP4 Pull-Up/Pull-Down Enable at Port 1 Bit 4 4 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 P1_PUDSEL Port 1 Pull-Up/Pull-Down Select Register 0x2C 32 read-write n 0x0 0x0 PP0 Pull-Up/Pull-Down Select Port 1 Bit 0 0 read-write Pull-down Pull-down device is selected 0b0 Pull-up Pull-up device is selected (default) 0b1 PP1 Pull-Up/Pull-Down Select Port 1 Bit 1 1 read-write Pull-down Pull-down device is selected 0b0 Pull-up Pull-up device is selected (default) 0b1 PP2 Pull-Up/Pull-Down Select Port 1 Bit 2 2 read-write Pull-down Pull-down device is selected 0b0 Pull-up Pull-up device is selected (default) 0b1 PP4 Pull-Up/Pull-Down Select Port 1 Bit 4 4 read-write Pull-down Pull-down device is selected 0b0 Pull-up Pull-up device is selected (default) 0b1 P2_DATA Port 2 Data Register 0x40 32 read-write n 0x0 0x0 PP0 Port 2 Pin 0 Data Value 0 read-write 0 Port 2 pin 0 data value = 0 0b0 1 Port 2 pin 0 data value = 1 0b1 PP1 Port 2 Pin 1 Data Value 1 read-write 0 Port 2 pin 1 data value = 0 0b0 1 Port 2 pin 1 data value = 1 0b1 PP2 Port 2 Pin 2 Data Value 2 read-write 0 Port 2 pin 2 data value = 0 0b0 1 Port 2 pin 2 data value = 1 0b1 PP3 Port 2 Pin 3 Data Value 3 read-write 0 Port 2 pin 3 data value = 0 0b0 1 Port 2 pin 3 data value = 1 0b1 PP4 Port 2 Pin 4 Data Value 4 read-write 0 Port 2 pin 4 data value = 0 0b0 1 Port 2 pin 4 data value = 1 0b1 PP5 Port 2 Pin 5 Data Value 5 read-write 0 Port 2 pin 5 data value = 0 0b0 1 Port 2 pin 5 data value = 1 0b1 PP6 Port 2 Pin 6 Data Value 6 read-write 0 Port 2 pin 6 data value = 0 0b0 1 Port 2 pin 6 data value = 1 0b1 PP7 Port 2 Pin 7 Data Value 7 read-write 0 Port 2 pin 7 data value = 0 0b0 1 Port 2 pin 7 data value = 1 0b1 P2_DIR Port 2 Direction Register 0x44 32 read-write n 0x0 0x0 PP0 Port 2 Pin 0 Driver Control 0 read-write Enabled Input driver is enabled (default) 0b0 Disabled Input driver is disabled 0b1 PP1 Port 2 Pin 1 Driver Control 1 read-write Enabled Input driver is enabled (default) 0b0 Disabled Input driver is disabled 0b1 PP2 Port 2 Pin 2 Driver Control 2 read-write Enabled Input driver is enabled (default) 0b0 Disabled Input driver is disabled 0b1 PP3 Port 2 Pin 3 Driver Control 3 read-write Enabled Input driver is enabled (default) 0b0 Disabled Input driver is disabled 0b1 PP4 Port 2 Pin 4 Driver Control 4 read-write Enabled Input driver is enabled (default) 0b0 Disabled Input driver is disabled 0b1 PP5 Port 2 Pin 5 Driver Control 5 read-write Enabled Input driver is enabled (default) 0b0 Disabled Input driver is disabled 0b1 PP6 Port 2 Pin 6 Driver Control 6 read-write Enabled Input driver is enabled (default) 0b0 Disabled Input driver is disabled 0b1 PP7 Port 2 Pin 7 Driver Control 7 read-write Enabled Input driver is enabled (default) 0b0 Disabled Input driver is disabled 0b1 P2_PUDEN Port 2 Pull-Up/Pull-Down Enable Register 0x50 32 read-write n 0x0 0x0 PP0 Pull-Up/Pull-Down Enable at Port 2 Bit 0 0 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 PP1 Pull-Up/Pull-Down Enable at Port 2 Bit 1 1 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 PP2 Pull-Up/Pull-Down Enable at Port 2 Bit 2 2 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 PP3 Pull-Up/Pull-Down Enable at Port 2 Bit 3 3 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 PP4 Pull-Up/Pull-Down Enable at Port 2 Bit 4 4 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 PP5 Pull-Up/Pull-Down Enable at Port 2 Bit 5 5 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 PP6 Pull-Up/Pull-Down Enable at Port 2 Bit 6 6 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 PP7 Pull-Up/Pull-Down Enable at Port 2 Bit 7 7 read-write Disabled Pull-up or Pull-down device is disabled (default) 0b0 Enabled Pull-up or Pull-down device is enabled 0b1 P2_PUDSEL Port 2 Pull-Up/Pull-Down Select Register 0x4C 32 read-write n 0x0 0x0 PP0 Pull-Up/Pull-Down Select Port 2 Bit 0 0 read-write Pull-down Pull-down device is selected (default) 0b0 Pull-up Pull-up device is selected 0b1 PP1 Pull-Up/Pull-Down Select Port 2 Bit 1 1 read-write Pull-down Pull-down device is selected (default) 0b0 Pull-up Pull-up device is selected 0b1 PP2 Pull-Up/Pull-Down Select Port 2 Bit 2 2 read-write Pull-down Pull-down device is selected (default) 0b0 Pull-up Pull-up device is selected 0b1 PP3 Pull-Up/Pull-Down Select Port 2 Bit 3 3 read-write Pull-down Pull-down device is selected (default) 0b0 Pull-up Pull-up device is selected 0b1 PP4 Pull-Up/Pull-Down Select Port 2 Bit 4 4 read-write Pull-down Pull-down device is selected (default) 0b0 Pull-up Pull-up device is selected 0b1 PP5 Pull-Up/Pull-Down Select Port 2 Bit 5 5 read-write Pull-down Pull-down device is selected (default) 0b0 Pull-up Pull-up device is selected 0b1 PP6 Pull-Up/Pull-Down Select Port 2 Bit 6 6 read-write Pull-down Pull-down device is selected (default) 0b0 Pull-up Pull-up device is selected 0b1 PP7 Pull-Up/Pull-Down Select Port 2 Bit 7 7 read-write Pull-down Pull-down device is selected (default) 0b0 Pull-up Pull-up device is selected 0b1 SCU SCU SCU 0x0 0x0 0x1000 registers n ADC1_CLK ADC1 Peripheral Clock Register 0x6C 32 read-write n 0x0 0x0 ADC1_CLK_DIV ADC1 Clock divider 0 3 read-write value1 Divide by 1 0b0000 value2 Divide by 2 0b0001 value3 Divide by 3 0b0010 value4 Divide by 4 0b0011 value5 Divide by 5 0b0100 value6 Divide by 16 0b1111 DPP1_CLK_DIV ADC1 Post processing clock divider 8 1 read-write value1 Divide by 1 0b00 value2 Divide by 2 0b01 value3 Divide by 3 0b10 value4 Divide by 4 0b11 APCLK Analog Peripheral Clock Register 0x58 32 read-write n 0x0 0x0 APCLK1FAC Analog Module Clock Factor 0 1 read-write value1 Divide by 1 0b00 value2 Divide by 2 0b01 value3 Divide by 3 0b10 value4 Divide by 4 0b11 APCLK2FAC Slow Down Clock Divider for TFILT_CLK Generation 8 4 read-write value1 fsys 0b00000 value2 fsys/2 0b00001 value3 fsys/3 0b00010 value4 fsys/4 0b00011 value5 fsys/5 0b00100 value6 fsys/6 0b00101 value7 fsys/7 0b00110 value8 fsys/8 0b00111 value9 fsys/9 0b01000 value10 fsys/10 0b01001 value11 fsys/11 0b01010 value12 fsys/12 0b01011 value13 fsys/24 0b11110 value14 fsys/32 0b11111 BGCLK_DIV Bandgap Clock Divider 25 read-write value1 divide by 2 0b0 value2 divide by 1 0b1 BGCLK_SEL Bandgap Clock Selection 24 read-write value1 LP_CLK is selected 0b0 value2 fsys is selected 0b1 APCLK_CTRL Analog Peripheral Clock Control Register 0x54 32 read-write n 0x0 0x0 APCLK_SET Set and Overtake Flag for Clock Settings 0 read-write value1 Clock Settings are ignored (previous values are held) 0b0 value2 Clock Settings are overtaken 0b1 CLKWDT_IE Clock Watchdog Interrupt Enable 8 read-write value1 Interrupt disabled 0b0 value2 Interrupt enabled 0b1 APCLK_SCLR Analog Peripheral Clock Status Clear Register 0x64 32 read-write n 0x0 0x0 APCLK1SCLR Analog Peripherals Clock Status Clear 0 write-only APCLK2SCLR Analog Peripherals Clock Status Clear 8 write-only APCLK3SCLR Analog Peripherals Clock 3 Status Clear 16 write-only PLL_LOCK_SCLR PLL Lock Status Clear 24 write-only APCLK_STS Analog Peripheral Clock Status Register 0x5C 32 read-write n 0x0 0x0 APCLK1STS Analog Peripherals Clock Status 0 1 read-only value1 The MI_CLK clock is in the required range 0b00 value2 The MI_CLK clock exceeds the higher limit 0b01 value3 The MI_CLK clock exceeds the lower limit 0b10 value4 The MI_CLK clock is not inside the specified limit. 0b11 APCLK2STS Analog Peripherals Clock Status 8 1 read-only value1 The TFILT_CLK clock is in the required range 0b00 value2 The TFILT_CLK clock exceeds the higher limit 0b01 value3 The TFILT_CLK clock exceeds the lower limit 0b10 value4 The TFILT_CLK clock is not inside the specified limit. 0b11 APCLK3STS Loss of Clock Status 16 read-only value1 No loss of clock 0b0 value2 Loss of Lock occurred 0b1 PLL_LOCK PLL LOCK Status 24 read-only value1 PLL has not locked 0b0 value2 PLL has locked 0b1 BCON1 Baud Rate Control Register 1 0x88 32 read-write n 0x0 0x0 BR1_PRE Prescaler Bit 1 2 read-write value1 fDIV = fPCLK 0b000 value2 fDIV = fPCLK/2 0b001 value3 fDIV = fPCLK/4 0b010 value4 fDIV = fPCLK/8 0b011 value5 fDIV = fPCLK/16 0b100 value6 fDIV = fPCLK/32 0b101 BR1_R Baud Rate Generator Run Control Bit 0 read-write value1 Baud-rate generator disabled. 0b0 value2 Baud-rate generator enabled. 0b1 BCON2 Baud Rate Control Register 2 0x98 32 read-write n 0x0 0x0 BR2_PRE Prescaler Bit 1 2 read-write value1 fDIV = fPCLK 0b000 value2 fDIV = fPCLK/2 0b001 value3 fDIV = fPCLK/4 0b010 value4 fDIV = fPCLK/8 0b011 value5 fDIV = fPCLK/16 0b100 value6 fDIV = fPCLK/32 0b101 BR2_R Baud Rate Generator Run Control Bit 0 read-write value1 Baud-rate generator disabled. 0b0 value2 Baud-rate generator enabled. 0b1 BG1 Baud Rate Timer/Reload Register 0x90 32 read-write n 0x0 0x0 BG1_BR_VALUE Baud Rate Timer/Reload Value UART1 0 10 read-write value1 Baud-rate timer is bypassed. 0x000 value2 1 0x001 value3 2 0x002 value4 2046 0x7FE value5 2047 0x7FF BG2 Baud Rate Timer/Reload Register 0xA0 32 read-write n 0x0 0x0 BG2_BR_VALUE Baud Rate Timer/Reload Value UART2 0 10 read-write value1 Baud-rate timer is bypassed. 0x000 value2 1 0x001 value3 2 0x002 value4 2046 0x7FE value5 2047 0x7FF BGL1 Baud Rate Timer/Reload Register, Low Byte 1 0x8C 32 read-write n 0x0 0x0 BG1_FD_SEL Fractional Divider Selection 0 4 read-write BGL2 Baud Rate Timer/Reload Register, Low Byte 2 0x9C 32 read-write n 0x0 0x0 BG2_FD_SEL Fractional Divider Selection 0 4 read-write CMCON1 Clock Control Register 1 0x48 32 read-write n 0x0 0x0 CLKREL Slow Down Clock Divider for fCCLK Generation 0 3 read-write value1 fsys 0b0000 value2 fsys/2 0b0001 value3 fsys/3 0b0010 value4 fsys/4 0b0011 value5 fsys/8 0b0100 value6 fsys/16 0b0101 value7 fsys/24 0b0110 value8 fsys/32 0b0111 value9 fsys/48 0b1000 value10 fsys/64 0b1001 value11 fsys/96 0b1010 value12 fsys/128 0b1011 value13 fsys/192 0b1100 value14 fsys/256 0b1101 value15 fsys/384 0b1110 value16 fsys/512 0b1111 K1DIV PLL K1-Divider 6 read-write value1 K1 = 2 0b0 value2 K1 = 1 0b1 K2DIV PLL K2-Divider 4 1 read-write value1 K2 = 2 0b00 value2 K2 = 3 0b01 value3 K2 = 4 0b10 value4 K2 = 5 0b11 PDIV PLL PDIV-Divider 8 1 read-write CMCON2 Clock Control Register 2 0x4C 32 read-write n 0x0 0x0 PBA0CLKREL PBA0 Clock Divider 0 read-write value1 divide by 1 0b0 value2 divide by 2 0b1 COCON Clock Output Control Register 0xB4 32 read-write n 0x0 0x0 COREL Clock Output Divider 0 3 read-write value1 fsys 0b0000 value2 fsys/2 0b0001 value3 fsys/3 0b0010 value4 fsys/4 0b0011 value5 fsys/6 0b0100 value6 fsys/8 0b0101 value7 fsys/10 0b0110 value8 fsys/12 0b0111 value9 fsys/14 0b1000 value10 fsys/16 0b1001 value11 fsys/18 0b1010 value12 fsys/20 0b1011 value13 fsys/24 0b1100 value14 fsys/32 0b1101 value15 fsys/36 0b1110 value16 fsys/40 0b1111 COUTS0 Clock Out Source Select Bit 0 4 read-write value1 Oscillator output frequency is selected. 0b0 value2 Clock output frequency is chosen by the bit field COREL. 0b1 COUTS1 Clock Out Source Select Bit 1 6 read-write value1 fCCLK is selected. 0b0 value2 Based on setting of COUTS0. 0b1 EN CLKOUT Enable 7 read-write value1 No external clock signal is provided 0b0 value2 The configured external clock signal is provided 0b1 TLEN Toggle Latch Enable 5 read-write value1 Toggle Latch is disabled. Clock output frequency is chosen by the bit field COREL. 0b0 value2 Toggle Latch is enabled. Clock output frequency is half of the frequency that is chosen by the bit field COREL. The resulting output frequency has 50% duty cycle. 0b1 EDCCON Error Detection and Correction Control Register 0xD4 32 read-write n 0x0 0x0 NVMIE NVM Double Bit ECC Error Interrupt Enable 2 read-write value1 No NMI is generated when a double bit ECC error occurs reading NVM. 0b0 value2 An NMI is generated when a double bit ECC error occurs reading NVM. 0b1 RIE RAM Double Bit ECC Error Interrupt Enable 0 read-write value1 No NMI is generated when a double bit ECC error occurs reading RAM. 0b0 value2 An NMI is generated when a double bit ECC error occurs reading RAM. 0b1 EDCSCLR Error Detection and Correction Status Clear Register 0x10C 32 read-write n 0x0 0x0 NVMDBEC NVM Double Bit Error Clear 2 write-only value1 A double bit error on NVM is not cleared. 0b0 value2 A double bit error on NVM is cleared. 0b1 RDBEC RAM Double Bit Error Clear 0 write-only value1 A double bit error on RAM is not cleared. 0b0 value2 A double bit error on RAM is cleared. 0b1 RSBEC RAM Single Bit Error Clear 4 write-only value1 A single bit error on RAM is not cleared. 0b0 value2 A single bit error on RAM is cleared. 0b1 EDCSTAT Error Detection and Correction Status Register 0xD8 32 read-write n 0x0 0x0 NVMDBE NVM Double Bit Error 2 read-only value1 No double bit error on NVM has occurred. 0b0 value2 A double bit error on NVM has occurred. 0b1 RDBE RAM Double Bit Error 0 read-only value1 No double bit error on RAM has occurred. 0b0 value2 A double bit error on RAM has occurred. 0b1 RSBE RAM Single Bit Error 4 read-only value1 No single bit error on RAM has occurred. 0b0 value2 A single bit error on RAM has occurred. 0b1 EMOP Emergency and Program Operation Status Register 0xCC 32 read-write n 0x0 0x0 EMPROP Emergency Program Operation Status Bit 1 read-write value1 No emergency program operation is started 0b0 value2 Emergency program operation is started 0b1 NVMPROP NVM Program Operation Status Bit 0 read-write value1 No NVM program operation is started 0b0 value2 NVM program operation is started. 0b1 EXICON0 External Interrupt Control Register 0 0x28 32 read-write n 0x0 0x0 EXINT0 External Interrupt 0 Trigger Select 0 1 read-write value1 Interrupt disabled 0b00 value2 Interrupt on rising edge 0b01 value3 Interrupt on falling edge 0b10 value4 Interrupt on both rising and falling edge 0b11 EXINT1 External Interrupt 1 Trigger Select 2 1 read-write value1 Interrupt disabled 0b00 value2 Interrupt on rising edge 0b01 value3 Interrupt on falling edge 0b10 value4 Interrupt on both rising and falling edge 0b11 EXINT2 External Interrupt 2 Trigger Select 4 1 read-write value1 Interrupt disabled 0b00 value2 Interrupt on rising edge 0b01 value3 Interrupt on falling edge 0b10 value4 Interrupt on both rising and falling edge 0b11 EXICON1 External Interrupt Control Register 1 0x2C 32 read-write n 0x0 0x0 MON1 MON1 Input Trigger Select 0 1 read-write value1 external interrupt MON is disabled. 0b00 value2 Interrupt on rising edge. 0b01 value3 Interrupt on falling edge. 0b10 value4 Interrupt on both rising and falling edge. 0b11 MON2 MON2 Input Trigger Select 2 1 read-write value1 external interrupt MON is disabled. 0b00 value2 Interrupt on rising edge. 0b01 value3 Interrupt on falling edge. 0b10 value4 Interrupt on both rising and falling edge. 0b11 MON3 MON3 Input Trigger Select 4 1 read-write value1 external interrupt MON is disabled. 0b00 value2 Interrupt on rising edge. 0b01 value3 Interrupt on falling edge. 0b10 value4 Interrupt on both rising and falling edge. 0b11 MON4 MON4 Input Trigger Select 6 1 read-write value1 external interrupt MON is disabled. 0b00 value2 Interrupt on rising edge. 0b01 value3 Interrupt on falling edge. 0b10 value4 Interrupt on both rising and falling edge. 0b11 MON5 MON5 Input Trigger Select 8 1 read-write value1 external interrupt MON is disabled. 0b00 value2 Interrupt on rising edge. 0b01 value3 Interrupt on falling edge. 0b10 value4 Interrupt on both rising and falling edge. 0b11 GPT12ICLR Timer and Counter Control/Status Clear Register 0x180 32 read-write n 0x0 0x0 GPT12CRC GPT Module 1 Capture Reload Interrupt Status 5 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 GPT1T2C GPT Module 1 Timer 2 Interrupt Status 0 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 GPT1T3C GPT Module 1 Timer3 Interrupt Status 1 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 GPT1T4C GPT Module 1 Timer4 Interrupt Status 2 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 GPT2T5C GPT Module 2 Timer5 Interrupt Status 3 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 GPT2T6C GPT Module 2 Timer6 Interrupt Status 4 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 GPT12IEN General Purpose Timer 12 Interrupt Enable Register 0x15C 32 read-write n 0x0 0x0 CRIE GPT12 Capture and Reload Interrupt Enable 5 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 T2IE GPT12 T2 Interrupt Enable 0 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 T3IE GPT12 T3 Interrupt Enable 1 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 T4IE GPT12 T4 Interrupt Enable 2 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 T5IE GPT12 T5 Interrupt Enable 3 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 T6IE GPT12 T6 Interrupt Enable 4 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 GPT12IRC Timer and Counter Control/Status Register 0x160 32 read-write n 0x0 0x0 GPT12CR GPT 12 Capture Reload Interrupt Status 5 read-only value1 No Capture Reload Interrupt has occurred. 0b0 value2 Capture Reload Interrupt has occurred. 0b1 GPT1T2 GPT Module 1 Timer 2 Interrupt Status 0 read-only value1 No Timer 2 Interrupt has occurred. 0b0 value2 Timer 2 Interrupt has occurred. 0b1 GPT1T3 GPT Module 1 Timer3 Interrupt Status 1 read-only value1 No Timer 3 Interrupt has occurred. 0b0 value2 Timer 3 Interrupt has occurred. 0b1 GPT1T4 GPT Module 1 Timer4 Interrupt Status 2 read-only value1 No Timer 4 Interrupt has occurred. 0b0 value2 Timer 4 Interrupt has occurred. 0b1 GPT2T5 GPT Module 2 Timer5 Interrupt Status 3 read-only value1 No Timer 5 Interrupt has occurred. 0b0 value2 Timer 5 Interrupt has occurred. 0b1 GPT2T6 GPT Module 2Timer6 Interrupt Status 4 read-only value1 No Timer 6 Interrupt has occurred. 0b0 value2 Timer 6 Interrupt has occurred. 0b1 GPT12PISEL GPT12 Peripheral Input Select Register 0xD0 32 read-write n 0x0 0x0 GPT12 GPT12 TIN3B / TIN4D Input Select 0 3 read-write value1 CC60 0b0000 value2 CC61 0b0001 value3 CC62 0b0010 value4 T12 ZM 0b0011 value5 T12 PM 0b0100 value6 T12 CM0 0b0101 value7 T12 CM1 0b0110 value8 T12 CM2 0b0111 value9 T13 PM 0b1000 value10 T13 ZM 0b1001 value11 T13 CM 0b1010 value12 any pos or neg edge on CC60/61/62 0b1011 GPT12_SEL CCU6 Trigger Configuration. 5 read-write value1 CCU6_INT is triggered by Timer21 0b0 value2 CCU6_INT is triggered by GPT12PISEL.GPT12 0b1 TRIG_CONF CCU6 Trigger Configuration. 4 read-write value1 Trigger is just for one measurement (default) 0b0 value2 Trigger is present until next input edge (selected by GPT12) - continuous measurement. 0b1 ID Identity Register 0xA8 32 read-write n 0x0 0x0 PRODID Product ID 3 4 read-only VERID Version ID 0 2 read-only IEN0 Interrupt Enable Register 0 0x1C 32 read-write n 0x0 0x0 EA Global Interrupt Mask 31 read-write value1 All pending interrupt requests (except NMI) are blocked from the core. 0b0 value2 Pending interrupt requests are not blocked from the core. 0b1 IRCON0 Interrupt Request Register 0 0x4 32 read-write n 0x0 0x0 EXINT0F Interrupt Flag for External Interrupt 0x on falling edge 1 read-only value1 Interrupt on falling edge event has not occurred. 0b0 value2 Interrupt on falling edge event has occurred. 0b1 EXINT0R Interrupt Flag for External Interrupt 0x on rising edge 0 read-only value1 Interrupt on rising edge event has not occurred. 0b0 value2 Interrupt on rising edge event has occurred. 0b1 EXINT1F Interrupt Flag for External Interrupt 1x on falling edge 3 read-only value1 Interrupt on falling edge event has not occurred. 0b0 value2 Interrupt on falling edge event has occurred. 0b1 EXINT1R Interrupt Flag for External Interrupt 1x on rising edge 2 read-only value1 Interrupt on rising edge event has not occurred. 0b0 value2 Interrupt on rising edge event has occurred. 0b1 EXINT2F Interrupt Flag for External Interrupt 2x on falling edge 5 read-only value1 Interrupt on falling edge event has not occurred. 0b0 value2 Interrupt on falling edge event has occurred. 0b1 EXINT2R Interrupt Flag for External Interrupt 2x on rising edge 4 read-only value1 Interrupt on rising edge event has not occurred. 0b0 value2 Interrupt on rising edge event has occurred. 0b1 IRCON0CLR Interrupt Request 0 Clear Register 0x178 32 read-write n 0x0 0x0 EXINT0FC Interrupt Flag for External Interrupt 0x on falling edge 1 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 EXINT0RC Interrupt Flag for External Interrupt 0x on rising edge 0 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 EXINT1FC Interrupt Flag for External Interrupt 1x on falling edge 3 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 EXINT1RC Interrupt Flag for External Interrupt 1x on rising edge 2 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 EXINT2FC Interrupt Flag for External Interrupt 2x on falling edge 5 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 EXINT2RC Interrupt Flag for External Interrupt 2x on rising edge 4 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 IRCON1 Interrupt Request Register 1 0x8 32 read-write n 0x0 0x0 MON1F Interrupt Flag for MON1x on falling edge 1 read-only value1 Interrupt on falling edge event has not occurred. 0b0 value2 Interrupt on falling edge event has occurred. 0b1 MON1R Interrupt Flag for MON1x on rising edge 0 read-only value1 Interrupt on rising edge event has not occurred. 0b0 value2 Interrupt on rising edge event has occurred. 0b1 MON2F Interrupt Flag for MON2x on falling edge 3 read-only value1 Interrupt on falling edge event has not occurred. 0b0 value2 Interrupt on falling edge event has occurred. 0b1 MON2R Interrupt Flag for MON2x on rising edge 2 read-only value1 Interrupt on rising edge event has not occurred. 0b0 value2 Interrupt on rising edge event has occurred. 0b1 MON3F Interrupt Flag for MON3x on falling edge 5 read-only value1 Interrupt on falling edge event has not occurred. 0b0 value2 Interrupt on falling edge event has occurred. 0b1 MON3R Interrupt Flag for MON3x on rising edge 4 read-only value1 Interrupt on rising edge event has not occurred. 0b0 value2 Interrupt on rising edge event has occurred. 0b1 MON4F Interrupt Flag for MON4x on falling edge 7 read-only value1 Interrupt on falling edge event has not occurred. 0b0 value2 Interrupt on falling edge event has occurred. 0b1 MON4R Interrupt Flag for MON4x on rising edge 6 read-only value1 Interrupt on rising edge event has not occurred. 0b0 value2 Interrupt on rising edge event has occurred. 0b1 MON5F Interrupt Flag for MON5x on falling edge 9 read-only value1 Interrupt on falling edge event has not occurred. 0b0 value2 Interrupt on falling edge event has occurred. 0b1 MON5R Interrupt Flag for MON5x on rising edge 8 read-only value1 Interrupt on rising edge event has not occurred. 0b0 value2 Interrupt on rising edge event has occurred. 0b1 IRCON1CLR Interrupt Request 1 Clear Register 0x17C 32 read-write n 0x0 0x0 MON1FC Interrupt Flag for MON1x on falling edge 1 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 MON1RC Interrupt Flag for MON1x on rising edge 0 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 MON2FC Interrupt Flag for MON2x on falling edge 3 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 MON2RC Interrupt Flag for MON2x on rising edge 2 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 MON3FC Interrupt Flag for MON3x on falling edge 5 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 MON3RC Interrupt Flag for MON3x on rising edge 4 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 MON4FC Interrupt Flag for MON4x on falling edge 7 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 MON4RC Interrupt Flag for MON4x on rising edge 6 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared. 0b1 MON5FC Interrupt Flag for MON5x on falling edge 9 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared 0b1 MON5RC Interrupt Flag for MON5x on rising edge 8 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared. 0b1 IRCON2 Interrupt Request Register 2 0xC 32 read-write n 0x0 0x0 EIR1 Error Interrupt Flag for SSC1 0 read-only value1 Interrupt event has not occurred. 0b0 value2 Interrupt event has occurred. 0b1 RIR1 Receive Interrupt Flag for SSC1 2 read-only value1 Interrupt event has not occurred. 0b0 value2 Interrupt event has occurred. 0b1 TIR1 Transmit Interrupt Flag for SSC1 1 read-only value1 Interrupt event has not occurred. 0b0 value2 Interrupt event has occurred. 0b1 IRCON2CLR Interrupt Request 2 Clear Register 0x190 32 read-write n 0x0 0x0 EIR1C Error Interrupt Flag for SSC1 0 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared. 0b1 RIR1C Receive Interrupt Flag for SSC1 2 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared. 0b1 TIR1C Transmit Interrupt Flag for SSC1 1 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared. 0b1 IRCON3 Interrupt Request Register 3 0x10 32 read-write n 0x0 0x0 EIR2 Error Interrupt Flag for SSC2 0 read-only value1 Interrupt event has not occurred. 0b0 value2 Interrupt event has occurred. 0b1 RIR2 Receive Interrupt Flag for SSC2 2 read-only value1 Interrupt event has not occurred. 0b0 value2 Interrupt event has occurred. 0b1 TIR2 Transmit Interrupt Flag for SSC2 1 read-only value1 Interrupt event has not occurred. 0b0 value2 Interrupt event has occurred. 0b1 IRCON3CLR Interrupt Request 3 Clear Register 0x194 32 read-write n 0x0 0x0 EIR2C Error Interrupt Flag for SSC2 0 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared. 0b1 RIR2C Receive Interrupt Flag for SSC2 2 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared. 0b1 TIR2C Transmit Interrupt Flag for SSC2 1 write-only value1 Interrupt event is not cleared. 0b0 value2 Interrupt event is cleared. 0b1 IRCON4 Interrupt Request Register 4 0x14 32 read-write n 0x0 0x0 CCU6SR0 Interrupt Flag 0 for CCU6 0 read-only value1 Interrupt event has not occurred. 0b0 value2 Interrupt event has occurred. 0b1 CCU6SR1 Interrupt Flag 1 for CCU6 4 read-only value1 Interrupt event has not occurred. 0b0 value2 Interrupt event has occurred. 0b1 CCU6SR2 Interrupt Flag 2 for CCU6 16 read-only value1 Interrupt event has not occurred. 0b0 value2 Interrupt event has occurred. 0b1 CCU6SR3 Interrupt Flag 3 for CCU6 20 read-only value1 Interrupt event has not occurred. 0b0 value2 Interrupt event has occurred. 0b1 IRCON4CLR Interrupt Request 4 Clear Register 0x198 32 read-write n 0x0 0x0 CCU6SR0C Interrupt Flag 0 for CCU6 0 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 CCU6SR1C Interrupt Flag 1 for CCU6 4 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 CCU6SR2C Interrupt Flag 2 for CCU6 16 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 CCU6SR3C Interrupt Flag 3 for CCU6 20 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 IRCON5 Interrupt Request Register 5 0x7C 32 read-write n 0x0 0x0 WAKEUP Interrupt Flag for Wakeup 0 read-only value1 Interrupt event has not occurred. 0b0 value2 Interrupt event has occurred. 0b1 IRCON5CLR Interrupt Request 5 Clear Register 0x19C 32 read-write n 0x0 0x0 WAKEUPC Clear Flag for Wakeup Interrupt 0 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 LINSCLR LIN Status Clear Register 0xA4 32 read-write n 0x0 0x0 BRKC Break Field Flag Clear 3 write-only value1 Break Field is not cleared. 0b0 value2 Break Field is cleared. 0b1 EOFSYNC End of SYN Byte Interrupt Flag Clear 4 write-only value1 End of SYN Byte is not cleared. 0b0 value2 End of SYN Byte is cleared. 0b1 ERRSYNC SYN Byte Error Interrupt Flag 5 write-only value1 Error in SYN Byte not cleared. 0b0 value2 Error in SYN Byte cleared. 0b1 LINST LIN Status Register 0x94 32 read-write n 0x0 0x0 BGSEL Baud Rate Select for Detection 1 1 read-write BRDIS Baud Rate Detection Disable 0 read-write value1 Break/Synch detection is enabled. 0b0 value2 Break/Synch detection is disabled. 0b1 BRK Break Field Flag 3 read-only value1 Break Field is not detected. 0b0 value2 Break Field is detected. 0b1 EOFSYN End of SYN Byte Interrupt Flag 4 read-only value1 End of SYN Byte is not detected. 0b0 value2 End of SYN Byte is detected. 0b1 ERRSYN SYN Byte Error Interrupt Flag 5 read-only value1 Error is not detected in SYN Byte. 0b0 value2 Error is detected in SYN Byte. 0b1 SYNEN End of SYN Byte and SYN Byte Error Interrupts Enable 6 read-write value1 End of SYN Byte and SYN Byte Error Interrupts are not enabled. 0b0 value2 End of SYN Byte and SYN Byte Error Interrupts are enabled. 0b1 MEMSTAT Memory Status Register 0xDC 32 read-write n 0x0 0x0 SASTATUS Service Algorithm Status 6 1 read-write value1 Depending on SECTORINFO, there are two possible outcomes: For SECTORINFO = 00H, NVM initialization is successful and no SA is executed. For SECTORINFO = values other than 00H, SA execution is successful and only one map error is fixed. 0b00 value2 SA execution is successful. More than one mapping error is fixed. 0b01 value3 SA execution is not successful. Map error exists in the mapped sector. 0b1x SECTORINFO Sector Information 0 5 read-write MEM_ACC_STS Memory Access Status Register 0xE4 32 read-write n 0x0 0x0 NVM_ADDR_ERR NVM Address Protection 1 read-only value1 No Protection error 0b0 value2 Protection error 0b1 NVM_PROT_ERR NVM Access Protection 0 read-only value1 No Protection error 0b0 value2 Protection error 0b1 NVM_SFR_ADDR_ERR NVM SFR Address Protection 3 read-only value1 No Protection error 0b0 value2 Protection error 0b1 NVM_SFR_PROT_ERR NVM SFR Access Protection 2 read-only value1 No Protection error 0b0 value2 Protection error 0b1 ROM_PROT_ERR ROM Access Protection 4 read-only value1 No Protection error 0b0 value2 Protection error 0b1 MODIEN1 Peripheral Interrupt Enable Register 1 0x30 32 read-write n 0x0 0x0 EIREN1 SSC 1 Error Interrupt Enable 0 read-write value1 Error interrupt is disabled 0b0 value2 Error interrupt is enabled 0b1 EIREN2 SSC 2 Error Interrupt Enable 8 read-write value1 Error interrupt is disabled 0b0 value2 Error interrupt is enabled 0b1 RIREN1 SSC 1 Receive Interrupt Enable 2 read-write value1 Receive interrupt is disabled 0b0 value2 Receive interrupt is enabled 0b1 RIREN2 SSC 2 Receive Interrupt Enable 10 read-write value1 Receive interrupt is disabled 0b0 value2 Receive interrupt is enabled 0b1 TIREN1 SSC 1 Transmit Interrupt Enable 1 read-write value1 Transmit interrupt is disabled 0b0 value2 Transmit interrupt is enabled 0b1 TIREN2 SSC 2 Transmit Interrupt Enable 9 read-write value1 Transmit interrupt is disabled 0b0 value2 Transmit interrupt is enabled 0b1 MODIEN2 Peripheral Interrupt Enable Register 2 0x34 32 read-write n 0x0 0x0 EXINT2_EN External Interrupt 2 Enable 5 read-write value1 External interrupt is disabled 0b0 value2 External interrupt is enabled 0b1 RIEN1 UART 1 Receive Interrupt Enable 0 read-write value1 Receive interrupt is disabled 0b0 value2 Receive interrupt is enabled 0b1 RIEN2 UART 2 Receive Interrupt Enable 6 read-write value1 Receive interrupt is disabled 0b0 value2 Receive interrupt is enabled 0b1 TIEN1 UART 1 Transmit Interrupt Enable 1 read-write value1 Transmit interrupt is disabled 0b0 value2 Transmit interrupt is enabled 0b1 TIEN2 UART 2 Transmit Interrupt Enable 7 read-write value1 Transmit interrupt is disabled 0b0 value2 Transmit interrupt is enabled 0b1 MODIEN3 Peripheral Interrupt Enable Register 3 0x38 32 read-write n 0x0 0x0 IE0 External Interrupt Enable 0 read-write value1 disabled 0b0 value2 enabled 0b1 MODIEN4 Peripheral Interrupt Enable Register 4 0x3C 32 read-write n 0x0 0x0 IE1 External Interrupt Enable 0 read-write value1 disabled 0b0 value2 enabled 0b1 MODPISEL Peripheral Input Select Register 0xB8 32 read-write n 0x0 0x0 EXINT0IS External Interrupt 0 Input Select 0 1 read-write value1 External Interrupt Input EXINT0_0 is selected. 0b00 value2 External Interrupt Input EXINT0_1 is selected. 0b01 value3 External Interrupt Input EXINT0_2 is selected. 0b10 value4 External Interrupt Input EXINT0_3 is selected. 0b11 EXINT1IS External Interrupt 1 Input Select 2 1 read-write value1 External Interrupt Input EXINT1_0 is selected. 0b00 value2 External Interrupt Input EXINT1_1 is selected. 0b01 value3 External Interrupt Input EXINT1_2 is selected. 0b10 value4 External Interrupt Input EXINT1_3 is selected. 0b11 EXINT2IS External Interrupt 2 Input Select 4 1 read-write value1 External Interrupt Input EXINT2_0 is selected. 0b00 value2 External Interrupt Input EXINT2_1 is selected. 0b01 value3 External Interrupt Input EXINT2_2 is selected. 0b10 value4 External Interrupt Input EXINT2_3 is selected. 0b11 SSC12_M_MTSR_OUTSEL Output selection for SSC12_M_MTSR 17 read-write value1 SSC1_M_MTSR 0b0 value2 SSC2_M_MTSR 0b1 SSC12_M_SCK_OUTSEL Output selection for SSC12_M_SCK 16 read-write value1 SSC1_M_SCK 0b0 value2 SSC2_M_SCK 0b1 SSC12_S_MRST_OUTSEL Output selection for SSC12_S_MRST 18 read-write value1 SSC1_S_MRST 0b0 value2 SSC2_S_MRST 0b1 URIOS1 UART1 Input/Output Select 6 read-write value1 UART1 Receiver Input RXD1_0 (Connection to LIN is available). 0b0 value2 UART1 Receiver Input RXD1_1 (Connection to LIN is not available). 0b1 U_TX_CONDIS UART1 TxD Connection Disable 7 read-write value1 UART1-TX-Output -LIN Transmitter TX Input Connection available. 0b0 value2 UART1-TX-Output -LIN Transmitter TX Input Connection not available (can be stimulated by external port pin). 0b1 MODPISEL1 Peripheral Input Select Register 1 0xBC 32 read-write n 0x0 0x0 T21EXCON Timer 21 External Input Control 7 read-write value1 Timer 21 Input T21EX is selected by bit field SCU_MODPISEL2.T21EXIS. 0b0 value2 Timer 21 Input T21EX is connected to signal from CCU6 (Output >cc6_ch0). 0b1 T2EXCON Timer 2 External Input Control 6 read-write value1 Timer 2 Input T2EX is selected by bit field SCU_MODPISEL2.T2EXIS. 0b0 value2 Timer 2 Input T2EX is connected to signal from CCU6 (Output >cc6_cout60). 0b1 XTAL12EN Pins XTAL1/2 Enable Bit 0 read-write value1 Pins XTAL1/2 is not available. This setting overrides the OSC_CON.XPD setting. 0b0 value2 Pins XTAL1/2 is available. 0b1 MODPISEL2 Peripheral Input Select Register 2 0xC0 32 read-write n 0x0 0x0 T21EXIS Timer 21 External Input Select 6 1 read-write value1 Timer 21 Input T21EX_0 is selected. 0b00 value2 Timer 21 Input T21EX_1 is selected. 0b01 value3 Timer 21 Input T21EX_2 is selected. 0b10 value4 Timer 21 Input T21EX_3 is selected. 0b11 T21IS Timer 21 Input Select 2 1 read-write value1 Timer 21 Input T21_0 is selected. 0b00 value2 Timer 21 Input T21_1 is selected. 0b01 value3 Timer 21 Input T21_2 is selected. 0b10 value4 Reserved. 0b11 T2EXIS Timer 2 External Input Select 4 1 read-write value1 Timer 2 Input T2EX_0 is selected. 0b00 value2 Timer 2 Input T2EX_1 is selected. 0b01 value3 Timer 2 Input T2EX_2 is selected. 0b10 value4 Timer 2 Input T2EX_3 is selected. 0b11 T2IS Timer 2 Input Select 0 1 read-write value1 Timer 2 Input T2_0 is selected. 0b00 value2 Timer 2 Input T2_1 is selected. 0b01 value3 Timer 2 Input T2_2 is selected. 0b10 value4 Reserved. 0b11 MODPISEL3 Peripheral Input Select Register 3 0xC4 32 read-write n 0x0 0x0 URIOS2 UART2 Input/Output Select 6 read-write value1 UART2 Receiver Input RXD2 is selected. 0b0 value2 UART2 Receiver Input RXD2 is selected (same as 0-setting). 0b1 MODPISEL4 Peripheral Input Select Register 4 0xFC 32 read-write n 0x0 0x0 DU1TRIGGEN Differential Unit Trigger Enable 0 2 read-write value1 CC60 is selected. 0b000 value2 CC61 is selected. 0b001 value3 CC62 is selected. 0b010 value4 COUT60 is selected. 0b011 value5 COUT61 is selected. 0b100 value6 COUT62 is selected. 0b101 value7 T3OUT is selected. 0b110 value8 COUT63 is selected. 0b111 DU2TRIGGEN Differential Unit Trigger Enable 8 2 read-write value1 CC60 is selected. 0b000 value2 CC61 is selected. 0b001 value3 CC62 is selected. 0b010 value4 COUT60 is selected. 0b011 value5 COUT61 is selected. 0b100 value6 COUT62 is selected. 0b101 value7 T3OUT is selected. 0b110 value8 COUT63 is selected. 0b111 DU3TRIGGEN Differential Unit Trigger Enable 16 2 read-write value1 CC60 is selected. 0b000 value2 CC61 is selected. 0b001 value3 CC62 is selected. 0b010 value4 COUT60 is selected. 0b011 value5 COUT61 is selected. 0b100 value6 COUT62 is selected. 0b101 value7 T3OUT is selected. 0b110 value8 COUT63 is selected. 0b111 DU4TRIGGEN Differential Unit Trigger Enable 24 2 read-write value1 CC60 is selected. 0b000 value2 CC61 is selected. 0b001 value3 CC62 is selected. 0b010 value4 COUT60 is selected. 0b011 value5 COUT61 is selected. 0b100 value6 COUT62 is selected. 0b101 value7 T3OUT is selected. 0b110 value8 COUT63 is selected. 0b111 MODSUSP Module Suspend Control Register 0xC8 32 read-write n 0x0 0x0 ADC1_SUSP ADC1 Unit Debug Suspend Bit 10 read-write value1 ADC1 will not be suspended. 0b0 value2 ADC1 will be suspended. 0b1 GPT12_SUSP GPT12 Debug Suspend Bit 4 read-write value1 GPT12 will not be suspended. 0b0 value2 GPT12 will be suspended. 0b1 MU_SUSP Measurement Unit Debug Suspend Bit 9 read-write value1 MU will not be suspended. 0b0 value2 MU will be suspended. 0b1 T12SUSP Timer 12 Debug Suspend Bit 1 read-write value1 Timer 12 in Capture/Compare Unit will not be suspended. 0b0 value2 Timer 12 in Capture/Compare Unit will be suspended. 0b1 T13SUSP Timer 13 Debug Suspend Bit 2 read-write value1 Timer 13 in Capture/Compare Unit will not be suspended. 0b0 value2 Timer 13 in Capture/Compare Unit will be suspended. 0b1 T21_SUSP Timer21 Debug Suspend Bit 6 read-write value1 Timer21 will not be suspended. 0b0 value2 Timer21 will be suspended. 0b1 T2_SUSP Timer2 Debug Suspend Bit 3 read-write value1 Timer2 will not be suspended. 0b0 value2 Timer2 will be suspended. 0b1 WDT1SUSP Watchdog Timer 1 Debug Suspend Bit 7 read-write value1 WDT1 will not be suspended. 0b0 value2 WDT1 will be suspended. 0b1 MONIEN Monitoring Input Interrupt Enable Register 0x18C 32 read-write n 0x0 0x0 MON1IE MON1 Interrupt Enable 0 read-write value1 disabled 0b0 value2 enabled 0b1 MON2IE MON2 Interrupt Enable 1 read-write value1 disabled 0b0 value2 enabled 0b1 MON3IE MON3 Interrupt Enable 2 read-write value1 disabled 0b0 value2 enabled 0b1 MON4IE MON4 Interrupt Enable 3 read-write value1 disabled 0b0 value2 enabled 0b1 MON5IE MON5 Interrupt Enable 4 read-write value1 disabled 0b0 value2 enabled 0b1 NMICON NMI Control Register 0x24 32 read-write n 0x0 0x0 NMIECC ECC Error NMI Enable 6 read-write value1 ECC Error NMI is disabled. 0b0 value2 ECC Error NMI is enabled. 0b1 NMIMAP NVM Map Error NMI Enable 5 read-write value1 NVM Map Error NMI is disabled. 0b0 value2 NVM Map Error NMI is enabled. 0b1 NMINVM NVM Operation Complete NMI Enable 2 read-write value1 NVM operation complete NMI is disabled. 0b0 value2 NVM operation complete NMI is enabled. 0b1 NMIOT NMI OT Enable 3 read-write value1 NMI OT is disabled. 0b0 value2 NMI OT is enabled. 0b1 NMIOWD Oscillator Watchdog NMI Enable 4 read-write value1 Oscillator watchdog NMI is disabled. 0b0 value2 Oscillator watchdog NMI is enabled. 0b1 NMIPLL PLL Loss of Lock NMI Enable 1 read-write value1 PLL Loss of Lock NMI is disabled. 0b0 value2 PLL Loss of Lock NMI is enabled. 0b1 NMISUP Supply Prewarning NMI Enable 7 read-write value1 Supply NMI is disabled. 0b0 value2 Supply NMI is enabled. 0b1 NMISR NMI Status Register 0x18 32 read-write n 0x0 0x0 FNMIECC ECC Error NMI Flag 6 read-only value1 No uncorrectable ECC error has occurred on NVM, XRAM. 0b0 value2 Uncorrectable ECC error has occurred on NVM, RAM. 0b1 FNMIMAP NVM Map Error NMI Flag 5 read-only value1 No NVM Map Error NMI has occurred. 0b0 value2 NVM Map Error has occurred. 0b1 FNMINVM NVM Operation Complete NMI Flag 2 read-only value1 No NVM NMI has occurred. 0b0 value2 NVM operation complete event has occurred. 0b1 FNMIOT Overtemperature NMI Flag 3 read-only value1 No OT NMI has occurred. 0b0 value2 OT NMI event has occurred. 0b1 FNMIOWD Oscillator Watchdog NMI Flag 4 read-only value1 No oscillator watchdog NMI has occurred. 0b0 value2 Oscillator watchdog event has occurred. 0b1 FNMIPLL PLL NMI Flag 1 read-only value1 No PLL NMI has occurred. 0b0 value2 PLL loss-of-lock to the external crystal has occurred. 0b1 FNMISUP Supply Prewarning NMI Flag 7 read-only value1 No supply prewarning NMI has occurred. 0b0 value2 Supply prewarning has occurred. 0b1 NMISRCLR NMI Status Clear Register 0x0 32 read-write n 0x0 0x0 FNMIECCC ECC Error NMI Flag 6 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 FNMIMAPC NVM Map Error NMI Flag 5 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 FNMINVMC NVM Operation Complete NMI Flag 2 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 FNMIOTC Overtemperature NMI Flag 3 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 FNMIOWDC Oscillator Watchdog NMI Flag 4 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 FNMIPLLC PLL NMI Flag 1 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 FNMISUPC Supply Prewarning NMI Flag 7 write-only value1 Interrupt event is not cleared 0b0 value2 Interrupt event is cleared 0b1 NVM_PROT_STS NVM Protection Status Register 0xE0 32 read-write n 0x0 0x0 CBSL_PW Status of CBSL Region Password / Protection 13 read-only value1 CBSL Region Password is not installed CBSL region is not protected. 0b0 value2 CBSL Region Password is installed CBSL region is protected. 0b1 DIS_RDUS Configuration of NVM Read Protection for Sector 1...n with EN_RD_* = 0 9 read-only value1 only active when nvm_read_unsafe_i = 1 and not for nvm_read_unsafe_i = 0 0b0 value2 independent from nvm_read_unsafe_i Also write accesess to Sector 1...n are prevented 0b1 DIS_RDUS_S0 Configuration of NVM Read Protection for Sector 0 with EN_RD_S0 = 0 10 read-only value1 only active when nvm_read_S0_unsafe_i = 1 and not for nvm_read_S0_unsafe_i = 0 0b0 value2 independent from nvm_read_S0_unsafe_i Also write accesess to Sector 0 are prevented 0b1 EN_PRG_CBSL NVM Protection of Data in CBSL Region 2 read-only value1 The data in region defined by NVMBSL can not be changed 0b0 value2 The data in region defined by NVMBSL can be changed (erased or written) 0b1 EN_PRG_LIN NVM Protection of Data in Linear Sectors 1 read-only value1 The data in sectors of the linearly mapped area can not be changed 0b0 value2 The data in sectors of the linearly mapped area can be changed (erased or written) 0b1 EN_PRG_NL NVM Protection of Data in Non-Linear Sectors 0 read-only value1 The data in sectors of the non-linearly mapped area can not be changed 0b0 value2 The data in sectors of the non-linearly mapped area can be changed (erased or written) 0b1 EN_RD_CBSL NVM Read Protection of Data in CBSL Region 5 read-only value1 The data in region defined by NVMBSL can not be read 0b0 value2 The data in region defined by NVMBSL sectors of can be read 0b1 EN_RD_LIN NVM Read Protection of Data in Linear Sectors 4 read-only value1 The data in sectors of the linearly mapped area can not be read 0b0 value2 The data in sectors of the linearly mapped area can be read 0b1 EN_RD_NL NVM Read Protection of Data in Non-Linear Sectors 3 read-only value1 The data in sectors of the non-linearly mapped area can not be read 0b0 value2 The data in sectors of the non-linearly mapped area can be read 0b1 EN_RD_S0 NVM Read Protection for Sector 0 8 read-only value1 The data in sector 0 can not be read over AHB-Lite Interface 0b0 value2 The data in sector 0 can be read over AHB-Lite Interface 0b1 LIN_PW Status of Linear Region Password / Protection 12 read-only value1 Linear Region Password is not installed Linear region is not protected. 0b0 value2 Linear Region Password is installed Linear region is protected. 0b1 NL_PW Status of Non-Linear Region Password / Protection 11 read-only value1 Non-Linear Region Password is not installed Linear region is not protected. 0b0 value2 Non-Linear Region Password is installed Linear region is protected. 0b1 NVMBSL CBSL Region Size Definition 14 1 read-only value1 CBSL Size is 4K 0b00 value2 CBSL Size is 8K 0b01 value3 CBSL Size is 12K 0b10 value4 CBSL Size is 16K 0b11 OSC_CON OSC Control Register 0xB0 32 read-write n 0x0 0x0 OSC2L OSC-Too-Low Condition Flag 3 read-only value1 fOSC is above threshold. 0b0 value2 fOSC is below threshold. 0b1 OSCSS Oscillator Source Select 0 1 read-write value1 PLL internal oscillator OSC_PLL (fINT) is selected synchronously as fR. 0b00 value2 XTAL (fOSC from OSC_HP) is selected synchronously as fR. 0b01 value3 PLL internal oscillator OSC_PLL (fINT) is selected asynchronously as fR. 0b1x OSCWDTRST Oscillator Watchdog Reset 2 read-write value1 No effect. 0b0 value2 Reset OSC2L flag and restart the oscillator watchdog of the PLL. 0b1 XPD XTAL (OSC_HP) Power Down Control 4 read-write value1 XTAL (OSC_HP) is not powered down. 0b0 value2 XTAL (OSC_HP) is powered down. 0b1 P0_POCON0 Port Output Control Register 0xE8 32 read-write n 0x0 0x0 P0_PDM0 P0.0 Port Driver Mode 0 2 read-write value1 Medium driver 0b000 value2 Not used 0b001 value3 Not used 0b010 value4 Weak driver 0b011 value5 Medium driver 0b100 value6 Medium driver 0b101 value7 Medium driver 0b110 value8 Weak driver 0b111 P0_PDM1 P0.1 Port Driver Mode 4 2 read-write value1 Medium driver 0b000 value2 Not used 0b001 value3 Not used 0b010 value4 Weak driver 0b011 value5 Medium driver 0b100 value6 Medium driver 0b101 value7 Medium driver 0b110 value8 Weak driver 0b111 P0_PDM2 P0.2 Port Driver Mode 8 2 read-write value1 Strong driver and sharp edge mode 0b000 value2 Strong driver and medium edge mode 0b001 value3 Strong driver and soft edge mode 0b010 value4 Weak driver 0b011 value5 Medium driver 0b100 value6 Medium driver 0b101 value7 Medium driver 0b110 value8 Weak driver 0b111 P0_PDM3 P0.3 Port Driver Mode 12 2 read-write value1 Strong driver and sharp edge mode 0b000 value2 Strong driver and medium edge mode 0b001 value3 Strong driver and soft edge mode 0b010 value4 Weak driver 0b011 value5 Medium driver 0b100 value6 Medium driver 0b101 value7 Medium driver 0b110 value8 Weak driver 0b111 P0_PDM4 P0.4 Port Driver Mode 16 2 read-write value1 Strong driver and sharp edge mode 0b000 value2 Strong driver and medium edge mode 0b001 value3 Strong driver and soft edge mode 0b010 value4 Weak driver 0b011 value5 Medium driver 0b100 value6 Medium driver 0b101 value7 Medium driver 0b110 value8 Weak driver 0b111 P0_PDM5 P0.5 Port Driver Mode 20 2 read-write value1 Strong driver and sharp edge mode 0b000 value2 Strong driver and medium edge mode 0b001 value3 Strong driver and soft edge mode 0b010 value4 Weak driver 0b011 value5 Medium driver 0b100 value6 Medium driver 0b101 value7 Medium driver 0b110 value8 Weak driver 0b111 P1_POCON0 Port Output Control Register 0xF8 32 read-write n 0x0 0x0 P1_PDM0 P1.0 Port Driver Mode 0 2 read-write value1 Medium driver 0b000 value2 Not used 0b001 value3 Not used 0b010 value4 Weak driver 0b011 value5 Medium driver 0b100 value6 Medium driver 0b101 value7 Medium driver 0b110 value8 Weak driver 0b111 P1_PDM1 P1.1 Port Driver Mode 4 2 read-write value1 Medium driver 0b000 value2 Not used 0b001 value3 Not used 0b010 value4 Weak driver 0b011 value5 Medium driver 0b100 value6 Medium driver 0b101 value7 Medium driver 0b110 value8 Weak driver 0b111 P1_PDM2 P1.2 Port Driver Mode 8 2 read-write value1 Medium driver 0b000 value2 Not used 0b001 value3 Not used 0b010 value4 Weak driver 0b011 value5 Medium driver 0b100 value6 Medium driver 0b101 value7 Medium driver 0b110 value8 Weak driver 0b111 P1_PDM4 P1.4 Port Driver Mode 16 2 read-write value1 Strong driver and sharp edge mode 0b000 value2 Strong driver and medium edge mode 0b001 value3 Strong driver and soft edge mode 0b010 value4 Weak driver 0b011 value5 Medium driver 0b100 value6 Medium driver 0b101 value7 Medium driver 0b110 value8 Weak driver 0b111 PASSWD Password Register 0xAC 32 read-write n 0x0 0x0 PASS Password Bits 3 4 read-write value2 Opens access to writing of all protected bits. 0b10011 value3 Closes access to writing of all protected bits. 0b10101 value1 Enables writing of the bit field MODE. 0b11000 PROTECT_S Bit-Protection Signal Status Bit 2 read-only value1 Software is able to write to all protected bits. 0b0 value2 Software is unable to write to any protected bits. 0b1 PW_MODE Bit-Protection Scheme Control Bit 0 1 read-write value1 Scheme Disabled 0b00 value2 Scheme Enabled (default) 0b11 PLL_CON PLL Control Register 0x44 32 read-write n 0x0 0x0 LOCK PLL Lock Status Flag 0 read-only value1 The frequency difference of fREF and fDIV is greater than allowed. The VCO part of the PLL can not lock on a target frequency. 0b0 value2 The frequency difference of fREF and fDIV is small enough to enable a stable VCO operation. 0b1 NDIV PLL N-Divider 4 3 read-write value1 N = 48 0b0000 value2 N = 50 0b0001 value3 N = 51 0b0010 value4 N = 52 0b0011 value5 N = 54 0b0100 value6 N = 60 0b0101 value7 N = 67 0b0110 value8 N = 72 0b0111 value9 N = 75 0b1000 value10 N = 78 0b1001 value11 N = 80 0b1010 value12 N = 88 0b1011 value13 N = 90 0b1100 value14 N = 94 0b1101 value15 N = 100 0b1110 value16 N = 160 0b1111 OSCDISC Oscillator Disconnect 2 read-write value1 Oscillator is connected to the PLL 0b0 value2 Oscillator is disconnected to the PLL. 0b1 RESLD Restart Lock Detection 1 read-write value1 No effect. 0b0 value2 Reset lock flag and restart lock detection. 0b1 UNPROT_OSCDISC Unprotect write access of OSC_DISC 10 write-only UNPROT_VCOBYP Unprotect write access of VCO_BYP 11 write-only VCOBYP PLL VCO Bypass Mode Select 3 read-write value1 Normal (or freerunning) operation (default) 0b0 value2 Prescaler Mode VCO is bypassed (PLL output clock is derived from input clock divided by K1-divider) 0b1 PMCON Peripheral Management Control Register 0x60 32 read-write n 0x0 0x0 ADC1_DIS ADC1 Disable Request. Active high. 0 read-write value1 ADC1 is in normal operation. (default) 0b0 value2 Request to disable the ADC. 0b1 CCU_DIS CCU Disable Request. Active high. 2 read-write value1 CCU is in normal operation. (default) 0b0 value2 Request to disable the CCU. 0b1 GPT12_DIS General Purpose Timer 12 Disable Request. Active high. 4 read-write value1 GPT12 is in normal operation. (default) 0b0 value2 Request to disable the GPT12. 0b1 SSC1_DIS SSC1 Disable Request. Active high. 1 read-write value1 SSC is in normal operation. (default) 0b0 value2 Request to disable the SSC. 0b1 SSC2_DIS SSC2 Disable Request. Active high. 8 read-write value1 SSC is in normal operation. (default) 0b0 value2 Request to disable the SSC. 0b1 T21_DIS T21 Disable Request. Active high. 10 read-write value1 T21 is in normal operation. (default) 0b0 value2 Request to disable the T21. 0b1 T2_DIS T2 Disable Request. Active high. 3 read-write value1 T2 is in normal operation. (default) 0b0 value2 Request to disable the T2. 0b1 PMCON0 Power Mode Control Register 0 0x40 32 read-write n 0x0 0x0 PD Power Down Mode (Stop mode) Enable. Active High. 2 read-write SD Slow Down Mode Enable. Active High. 3 read-write SL Sleep Mode Enable. Active High. 1 read-write XTAL_ON OSC_HP Operation in Power Down Mode 0 read-write value1 OSC_HP (XTAL) will be put to Power Down mode by hardware in power save mode. 0b0 value2 OSC_HP (XTAL) continues to operate in Power Down mode, if enabled by SCU_OSC_CON.XPD. 0b1 RSTCON Reset Control Register 0x68 32 read-write n 0x0 0x0 LOCKUP Lockup Flag 0 read-write value1 Lockup Status not active. 0b0 value2 Lockup Status active. 0b1 LOCKUP_EN Lockup Reset Enable Flag 7 read-write value1 Lockup is disabled. 0b0 value2 Lockup is enabled. 0b1 SYSCON0 System Control Register 0 0x70 32 read-write n 0x0 0x0 NVMCLKFAC NVM Access Clock Factor 4 1 read-only value1 Divide by 1 0b00 value2 Divide by 2 0b01 value3 Divide by 3 0b10 value4 Divide by 4 0b11 SYSCLKSEL System Clock Select 6 1 read-write value1 The PLL clock output signal fPLL is used 0b00 value2 The direct clock input from fOSC is used 0b01 value3 The direct low-precision clock input from fLP_CLK is used. 0b10 value4 The direct input from internal oscillator fINTOSC is used 0b11 SYS_STRTUP_STS System Startup Status Register 0x74 32 read-write n 0x0 0x0 INIT_FAIL Initialization at startup failed 0 read-only MRAMINITSTS Map RAM Initialisation Status 1 read-only PG100TP_CHKS_ERR 100 TP Page Checksum Error 2 read-only TCCR Temperature Compensation Control Register 0xF4 32 read-write n 0x0 0x0 TCC Temperature Compensation Control 0 1 read-write value1 TJ: -40 °C to 0 °C 0b00 value2 TJ: 0 °C to 40 °C 0b01 value3 TJ: 40 °C to 80 °C 0b10 value4 TJ: 80 °C to 150 °C 0b11 VTOR Vector Table Reallocation Register 0x20 32 read-write n 0x0 0x0 VTOR_BYP Vector Table Bypass Mode 0 1 read-write value1 VTOR is not remapped (ROM) (Start Address: 0x0000000000) 0b00 value2 VTOR is remapped to RAM (Start Address: 0x1800000000) 0b01 value3 VTOR is remapped to NVM (Start Address: 0x1100000000, begin of Customer BSL Region) 0b10 value4 VTOR is remapped to NVM (Start Address: Begin of NVM Linear region after customer BSL region) 0b11 WAKECON Wakeup Interrupt Control Register 0x78 32 read-write n 0x0 0x0 WAKEUPEN Wakeup Interrupt Enable 0 read-write value1 wakeup interrupt is disabled. 0b0 value2 wakeup interrupt is enabled. 0b1 SCUPM SCUPM SCUPM 0x0 0x0 0x1000 registers n AMCLK_CTRL Analog Module Clock Control Register 0x4 32 read-write n 0x0 0x0 CLKWDT_PD_N Clock Watchdog Powerdown 0 read-write DISABLE Clock Watchdog disabled 0b0 ENABLE Clock Watchdog enabled 0b1 AMCLK_FREQ_STS Analog Module Clock Frequency Status Register 0x0 32 read-write n 0x0 0x0 AMCLK1_FREQ Current frequency of Analog Module Clock System Clock (MI_CLK) 0 5 read-only AMCLK2_FREQ Current frequency of Analog Module Clock 2 (TFILT_CLK) 8 5 read-only AMCLK_TH_HYS Analog Module Clock Limit Register 0xC 32 read-write n 0x0 0x0 AMCLK1_LOW_HYS Analog Module Clock 1 (MI_CLK) Lower Hysteresis 14 1 read-write AMCLK1_LOW_TH Analog Module Clock 1 (MI_CLK) Lower Limit Threshold 8 5 read-write AMCLK1_UP_HYS Analog Module Clock 1 (MI_CLK) Upper Hysteresis 6 1 read-write AMCLK1_UP_TH Analog Module Clock 1 (MI_CLK) Upper Limit Threshold 0 5 read-write AMCLK2_LOW_HYS Analog Module Clock 2 (TFILT_CLK) Lower Hysteresis 30 1 read-write AMCLK2_LOW_TH Analog Module Clock 2 (TFILT_CLK) Lower Limit Threshold 24 5 read-write AMCLK2_UP_HYS Analog Module Clock 2 (TFILT_CLK) Upper Hysteresis 22 1 read-write AMCLK2_UP_TH Analog Module Clock 2 (TFILT_CLK) Upper Limit Threshold 16 5 read-write PCU_CTRL_STS Power Control Unit Control Status Register 0x30 32 read-write n 0x0 0x0 CLKWDT_SD_DIS Power Modules Clock Watchdog Shutdown Disable 1 read-write Shutdown Enable Power Devices will be switched off when Clock Watchdog occurs 0b0 Shutdown Disable Power Devices will not be shutdown when Clock Watchdog occurs 0b1 LIN_VS_UV_SD_DIS LIN Module VS Undervoltage Transmitter Shutdown 8 read-write Enable Automatic Shutdown for Power modules in case of VS Undervoltage enabled 0b0 Disable Automatic Shutdown for Power modules in case of VS Undervoltage disabled 0b1 STCALIB System Tick Calibration Register 0x6C 32 read-write n 0x0 0x0 STCALIB System Tick Calibration 0 25 read-write SYS_IRQ_CTRL System Interrupt Control Register 0x28 32 read-write n 0x0 0x0 REFBG_LOTHWARN_IE Reference Voltage Undervoltage Interrupt Enable 10 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 REFBG_UPTHWARN_IE Reference Voltage Overvoltage Interrupt Enable 11 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 SYS_OTWARN_IE System Overtemperature Warning Interrupt Enable 8 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 SYS_OT_IE System Overtemperature Shutdown Interrupt Enable (leads to shutdown of System) 9 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 SYS_IS System Interrupt Status Register 0x18 32 read-write n 0x0 0x0 HS1_FAIL_IS High Side Driver 1 Fail Interrupt Status 2 read-only INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 HS1_FAIL_STS High Side Driver 1 Fail Status 18 read-only INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 HS2_FAIL_IS High Side Driver 2 Fail Interrupt Status 3 read-only INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 HS2_FAIL_STS High Side Driver 2 Fail Status 19 read-only INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 LIN_FAIL_IS LIN Fail Interrupt Status 6 read-only INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 LIN_FAIL_STS LIN Fail Status 22 read-only INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 LS1_FAIL_IS Low Side Driver 1 Fail Interrupt Status 0 read-only INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 LS1_FAIL_STS Low Side Driver 1 Fail Status 16 read-only INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 LS2_FAIL_IS Low Side Driver 2 Fail Interrupt Status 1 read-only INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 LS2_FAIL_STS Low Side Driver 2 Fail Status 17 read-only INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 REFBG_LOTHWARN_IS 8-Bit ADC2 Reference Undervoltage (ADC2, Channel 3) interrupt status 10 read-write INACTIVE no interrupt status set 0b0 ACTIVE at least one interrupt status set 0b1 REFBG_UPTHWARN_IS 8-Bit ADC2 Reference Overvoltage (ADC2, Channel 3) interrupt status 11 read-write INACTIVE no interrupt status set 0b0 ACTIVE at least one interrupt status set 0b1 SYS_OTWARN_IS System Overtemperature Prewarning (ADC2, Channel 6) interrupt status 8 read-write INACTIVE no interrupt status set 0b0 ACTIVE at least one interrupt status set 0b1 SYS_OTWARN_STS System Overtemperature Prewarning (ADC2, Channel 6) status 24 read-write INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 SYS_OT_IS System Overtemperature Shutdown (ADC2, Channel 6) interrupt status 9 read-write INACTIVE no interrupt status set 0b0 ACTIVE at least one interrupt status set 0b1 SYS_OT_STS System Overtemperature Shutdown (ADC2, Channel 6) status 25 read-write INACTIVE no status set 0b0 ACTIVE at least one status set 0b1 SYS_ISCLR System Interrupt Status Clear Register 0x14 32 read-write n 0x0 0x0 REFBG_LOTHWARN_ISC 8-Bit ADC2 Reference Undervoltage interrupt status clear 10 write-only No Clear None 0b0 Clear None 0b1 REFBG_UPTHWARN_ISC 8-Bit ADC2 Reference Overvoltage interrupt status clear 11 write-only No Clear None 0b0 Clear None 0b1 SYS_OTWARN_ISC System Overtemperature Prewarning status clear 8 write-only No Clear None 0b0 Clear None 0b1 SYS_OTWARN_SC System Overtemperature Prewarning status clear 24 write-only No CLear None 0b0 Clear None 0b1 SYS_OT_ISC System Overtemperature Shutdown status clear 9 write-only No Clear None 0b0 Clear None 0b1 SYS_OT_SC System Overtemperature Shutdown status clear 25 write-only No Clear None 0b0 Clear None 0b1 SYS_SUPPLY_IRQ_CLR System Supply Interrupt Status Clear Register 0x24 32 read-write n 0x0 0x0 VBAT_OV_ISC VBAT Overvoltage Interrupt Status clear 5 write-only No Clear None 0b0 Clear None 0b1 VBAT_OV_SC VBAT Overvoltage Status clear 21 write-only No Clear None 0b0 Clear None 0b1 VBAT_UV_ISC VBAT Undervoltage Interrupt Status clear 0 write-only No Clear None 0b0 Clear None 0b1 VBAT_UV_SC VBAT Undervoltage Status clear 16 write-only No Clear None 0b0 Clear None 0b1 VDD1V5_OV_ISC VDDC Overvoltage Interrupt Status clear 8 write-only No Clear None 0b0 Clear None 0b1 VDD1V5_OV_SC VDDC Overvoltage Status clear 24 write-only No Clear None 0b0 Clear None 0b1 VDD1V5_UV_ISC VDDC Undervoltage Interrupt Status clear 3 write-only No Clear None 0b0 Clear None 0b1 VDD1V5_UV_SC VDDC Undervoltage Status clear 19 write-only No Clear None 0b0 Clear None 0b1 VDD5V_OV_ISC VDDP Overvoltage Interrupt Status clear 7 write-only No Clear None 0b0 Clear None 0b1 VDD5V_OV_SC VDDP Overvoltage Status clear 23 write-only No Clear None 0b0 Clear None 0b1 VDD5V_UV_ISC VDDP Undervoltage Interrupt Status clear 2 write-only No Clear None 0b0 Clear None 0b1 VDD5V_UV_SC VDDP Undervoltage Status clear 18 write-only No Clear None 0b0 Clear None 0b1 VDDEXT_OV_ISC VDDEXT Overvoltage Interrupt Status clear 9 write-only No Clear None 0b0 Clear None 0b1 VDDEXT_OV_SC VDDEXT Overvoltage Status clear 25 write-only No Clear None 0b0 Clear None 0b1 VDDEXT_UV_ISC VDDEXT Undervoltage Interrupt Status clear 4 write-only No Clear None 0b0 Clear None 0b1 VDDEXT_UV_SC VDDEXT Undervoltage Status clear 20 write-only No Clear None 0b0 Clear None 0b1 VS_OV_ISC VS Overvoltage Interrupt Status clear 6 write-only No Clear None 0b0 Clear None 0b1 VS_OV_SC VS Overvoltage Status clear 22 write-only No Clear None 0b0 Clear None 0b1 VS_UV_ISC VS Undervoltage Interrupt Status clear 1 write-only No Clear None 0b0 Clear None 0b1 VS_UV_SC VS Undervoltage Status clear 17 write-only No Clear None 0b0 Clear None 0b1 SYS_SUPPLY_IRQ_CTRL System Supply Interrupt Control Register 0x20 32 read-write n 0x0 0x0 VBAT_OV_IE VBAT Overvoltage Interrupt Enable 5 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 VBAT_UV_IE VBAT Undervoltage Interrupt Enable 0 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 VDD1V5_OV_IE VDDC Overvoltage Interrupt Enable 8 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 VDD1V5_UV_IE VDDC Undervoltage Interrupt Enable 3 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 VDD5V_OV_IE VDDP Overvoltage Interrupt Enable 7 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 VDD5V_UV_IE VDDP Undervoltage Interrupt Enable 2 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 VDDEXT_OV_IE VDDEXT Overvoltage Interrupt Enable 9 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 VDDEXT_UV_IE VDDEXT Undervoltage Interrupt Enable 4 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 VS_OV_IE VS Overvoltage Interrupt Enable 6 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 VS_UV_IE VS Undervoltage Interrupt Enable 1 read-write value1 Interrupt is disabled 0b0 value2 Interrupt is enabled 0b1 SYS_SUPPLY_IRQ_STS System Supply Interrupt Status Register 0x1C 32 read-write n 0x0 0x0 VBAT_OV_IS VBAT Overvoltage Interrupt Status 5 read-write No Overvoltage Interrupt occurred 0b0 Overvoltage Interrupt occurred 0b1 VBAT_OV_STS VBAT Overvoltage Status 21 read-write No Overvoltage occurred 0b0 Overvoltage occurred 0b1 VBAT_UV_IS VBAT Undervoltage Interrupt Status 0 read-write No Undervoltage Interrupt occurred 0b0 Undervoltage Interrupt occurred 0b1 VBAT_UV_STS VBAT Undervoltage Status 16 read-write No Undervoltage occurred 0b0 Undervoltage occurred 0b1 VDD1V5_OV_IS VDDC Overvoltage Interrupt Status 8 read-write No Overvoltage Interrupt occurred 0b0 Overvoltage Interrupt occurred 0b1 VDD1V5_OV_STS VDDC Overvoltage Status 24 read-write No Overvoltage occurred 0b0 Overvoltage occurred 0b1 VDD1V5_UV_IS VDDC Undervoltage Interrupt Status 3 read-write No Undervoltage Interrupt occurred 0b0 Undervoltage Interrupt occurred 0b1 VDD1V5_UV_STS VDDC Undervoltage Status 19 read-write No Undervoltage occurred 0b0 Undervoltage occurred 0b1 VDD5V_OV_IS VDDP Overvoltage Interrupt Status 7 read-write No Overvoltage Interrupt occurred 0b0 Overvoltage Interrupt occurred 0b1 VDD5V_OV_STS VDDP Overvoltage Status 23 read-write No Overvoltage occurred 0b0 Overvoltage occurred 0b1 VDD5V_UV_IS VDDP Undervoltage Interrupt Status 2 read-write No Undervoltage Interrupt occurred 0b0 Undervoltage Interrupt occurred 0b1 VDD5V_UV_STS VDDP Undervoltage Status 18 read-write No Undervoltage occurred 0b0 Undervoltage occurred 0b1 VDDEXT_OV_IS VDDEXT Overvoltage Interrupt Status 9 read-write No Overvoltage Interrupt occurred 0b0 Overvoltage Interrupt occurred 0b1 VDDEXT_OV_STS VDDEXT Overvoltage Status 25 read-write No Overvoltage occurred 0b0 Overvoltage occurred 0b1 VDDEXT_UV_IS VDDEXT Undervoltage Interrupt Status 4 read-write No Undervoltage Interrupt occurred 0b0 Undervoltage Interrupt occurred 0b1 VDDEXT_UV_STS VDDEXT Undervoltage Status 20 read-write No Undervoltage occurred 0b0 Undervoltage occurred 0b1 VS_OV_IS VS Overvoltage Interrupt Status 6 read-write No Overvoltage Interrupt occurred 0b0 Overvoltage Interrupt occurred 0b1 VS_OV_STS VS Overvoltage Status 22 read-write No Overvoltage occurred 0b0 Overvoltage occurred 0b1 VS_UV_IS VS Undervoltage Interrupt Status 1 read-write No Undervoltage Interrupt occurred 0b0 Undervoltage Interrupt occurred 0b1 VS_UV_STS VS Undervoltage Status 17 read-write No Undervoltage occurred 0b0 Undervoltage occurred 0b1 WDT1_TRIG WDT1 Watchdog Control 0x34 32 read-write n 0x0 0x0 SOWCONF Short Open Window Configuration 6 1 read-write DIS Short Open Windows disabled 0x0 SOW1 one successive Short Open Window allowed 0x1 SOW2 two successive Short Open Windows allowed 0x2 SOW3 three successive Short Open Windows allowed 0x3 WDP_SEL Watchdog Period Selection and trigger 0 5 read-write SOW_TRIG trigger short open window 0x00 WP_1 Watchdog period 16 ms 0x01 WP_2 Watchdog period 32 ms 0x02 WP_3 Watchdog period 48 ms 0x03 WP_63 Watchdog period 1008 ms 0x3F SSC1 SSC1 SSC1 0x0 0x0 0x2000 registers n BR Baud Rate Timer Reload Register 0x10 32 read-write n 0x0 0x0 BR_VALUE Baud Rate Timer/Reload Register Value 0 15 read-write CON Control Register 0x4 32 read-write n 0x0 0x0 AREN Automatic Reset Enable 12 read-write N/A No additional action upon a baud rate error. 0b0 RESET The SSC is automatically reset upon a baud rate error. 0b1 BC Bit Count Field 16 3 read-only BE Baud Rate Error Flag 27 read-only NO error. 0b0 ERROR More than factor 2 or 0.5 between slave's actual and expected baud rate. 0b1 BEN Baud Rate Error Enable 11 read-write IGNORE baud rate errors. 0b0 CHECK baud rate errors. 0b1 BM Data Width Selection 0 3 read-write value1 Reserved. Do not use this combination. 0b0000 value2 - 0b0001 value3 Transfer Data Width is 2 … 16 bits (BM+1). 0b1111 BSY Busy Flag 28 read-only EN Enable Bit 15 read-write Programming Mode Transmission and reception disabled. Access to control bits. 0b0 Operating Mode Transmission and reception enabled. Access to status flags and M/S control. 0b1 HB Heading Control 4 read-write LSB Transmit/Receive LSB First. 0b0 MSB Transmit/Receive MSB First. 0b1 LB Loop Back Control 7 read-write NORMAL output. 0b0 LB Receive input is connected with transmit output (half-duplex mode). 0b1 MS Master Select 14 read-write SLAVE Mode. Operate on shift clock received via SCLK. 0b0 MASTER Mode. Generate shift clock and output it via SCLK. 0b1 PE Phase Error Flag 26 read-only NO error. 0b0 ERROR Received data changes around sampling clock edge. 0b1 PEN Phase Error Enable 10 read-write IGNORE phase errors. 0b0 CHECK phase errors. 0b1 PH Clock Phase Control 5 read-write SHIFT transmit data on the leading clock edge, latch on trailing edge. 0b0 LATCH receive data on leading clock edge, shift on trailing edge. 0b1 PO Clock Polarity Control 6 read-write LOW Idle clock line is low, leading clock edge is low-to-high transition. 0b0 HIGH Idle clock line is high, leading clock edge is high-to-low transition. 0b1 RE Receive Error Flag 25 read-only NO error. 0b0 ERROR Reception completed before the receive buffer was read. 0b1 REN Receive Error Enable 9 read-write IGNORE receive errors. 0b0 CHECK receive errors. 0b1 TE Transmit Error Flag 24 read-only NO error. 0b0 ERROR Transfer starts with the slave's transmit buffer not being updated. 0b1 TEN Transmit Error Enable 8 read-write IGNORE transmit errors. 0b0 CHECK transmit errors. 0b1 ISRCLR Interrupt Status Register Clear 0x14 32 read-write n 0x0 0x0 BECLR Baud Rate Error Flag Clear 11 write-only NO No error clear. 0b0 CLEAR Error clear. 0b1 PECLR Phase Error Flag Clear 10 write-only NO No error clear. 0b0 CLEAR Error clear. 0b1 RECLR Receive Error Flag Clear 9 write-only NO No error clear. 0b0 CLEAR Error clear. 0b1 TECLR Transmit Error Flag Clear 8 write-only NO No error clear. 0b0 CLEAR Error clear. 0b1 PISEL Port Input Select Register 0x0 32 read-write n 0x0 0x0 CIS Clock Input Select (Slave Mode only) 2 read-write SSCx_S_SCK (x = 1 or 2, dependant form current SSC), see . 0b0 SSC12_S_SCK for both SSCs. See . 0b1 MIS_0 Master Mode Input Select Bit 0 (Master Mode only) 0 read-write SSCx_M_MRST (x = 1 or 2, dependant form current SSC), see . 0b0 SSC12_M_MRST for both SSCs. See . 0b1 MIS_1 Master Mode Input Select Bit 1 (Master Mode only) 3 read-write Default Inputs selected according to MIS_0. 0b0 Do not use Connects to unused pins. 0b1 SIS Slave Mode Input Select (Slave Mode only) 1 read-write SSCx_S_MTSR (x = 1 or 2, dependant form current SSC), see . 0b0 SSC12_S_MTSR for both SSCs. See . 0b1 RB Receiver Buffer Register 0xC 32 read-write n 0x0 0x0 RB_VALUE Receive Data Register Value 0 15 read-only TB Transmitter Buffer Register 0x8 32 read-write n 0x0 0x0 TB_VALUE Transmit Data Register Value 0 15 read-write SSC2 SSC2 SSC2 0x0 0x0 0x2000 registers n BR Baud Rate Timer Reload Register 0x10 32 read-write n 0x0 0x0 BR_VALUE Baud Rate Timer/Reload Register Value 0 15 read-write CON Control Register 0x4 32 read-write n 0x0 0x0 AREN Automatic Reset Enable 12 read-write N/A No additional action upon a baud rate error. 0b0 RESET The SSC is automatically reset upon a baud rate error. 0b1 BC Bit Count Field 16 3 read-only BE Baud Rate Error Flag 27 read-only NO error. 0b0 ERROR More than factor 2 or 0.5 between slave's actual and expected baud rate. 0b1 BEN Baud Rate Error Enable 11 read-write IGNORE baud rate errors. 0b0 CHECK baud rate errors. 0b1 BM Data Width Selection 0 3 read-write value1 Reserved. Do not use this combination. 0b0000 value2 - 0b0001 value3 Transfer Data Width is 2 … 16 bits (BM+1). 0b1111 BSY Busy Flag 28 read-only EN Enable Bit 15 read-write Programming Mode Transmission and reception disabled. Access to control bits. 0b0 Operating Mode Transmission and reception enabled. Access to status flags and M/S control. 0b1 HB Heading Control 4 read-write LSB Transmit/Receive LSB First. 0b0 MSB Transmit/Receive MSB First. 0b1 LB Loop Back Control 7 read-write NORMAL output. 0b0 LB Receive input is connected with transmit output (half-duplex mode). 0b1 MS Master Select 14 read-write SLAVE Mode. Operate on shift clock received via SCLK. 0b0 MASTER Mode. Generate shift clock and output it via SCLK. 0b1 PE Phase Error Flag 26 read-only NO error. 0b0 ERROR Received data changes around sampling clock edge. 0b1 PEN Phase Error Enable 10 read-write IGNORE phase errors. 0b0 CHECK phase errors. 0b1 PH Clock Phase Control 5 read-write SHIFT transmit data on the leading clock edge, latch on trailing edge. 0b0 LATCH receive data on leading clock edge, shift on trailing edge. 0b1 PO Clock Polarity Control 6 read-write LOW Idle clock line is low, leading clock edge is low-to-high transition. 0b0 HIGH Idle clock line is high, leading clock edge is high-to-low transition. 0b1 RE Receive Error Flag 25 read-only NO error. 0b0 ERROR Reception completed before the receive buffer was read. 0b1 REN Receive Error Enable 9 read-write IGNORE receive errors. 0b0 CHECK receive errors. 0b1 TE Transmit Error Flag 24 read-only NO error. 0b0 ERROR Transfer starts with the slave's transmit buffer not being updated. 0b1 TEN Transmit Error Enable 8 read-write IGNORE transmit errors. 0b0 CHECK transmit errors. 0b1 ISRCLR Interrupt Status Register Clear 0x14 32 read-write n 0x0 0x0 BECLR Baud Rate Error Flag Clear 11 write-only NO No error clear. 0b0 CLEAR Error clear. 0b1 PECLR Phase Error Flag Clear 10 write-only NO No error clear. 0b0 CLEAR Error clear. 0b1 RECLR Receive Error Flag Clear 9 write-only NO No error clear. 0b0 CLEAR Error clear. 0b1 TECLR Transmit Error Flag Clear 8 write-only NO No error clear. 0b0 CLEAR Error clear. 0b1 PISEL Port Input Select Register 0x0 32 read-write n 0x0 0x0 CIS Clock Input Select (Slave Mode only) 2 read-write SSCx_S_SCK (x = 1 or 2, dependant form current SSC), see . 0b0 SSC12_S_SCK for both SSCs. See . 0b1 MIS_0 Master Mode Input Select Bit 0 (Master Mode only) 0 read-write SSCx_M_MRST (x = 1 or 2, dependant form current SSC), see . 0b0 SSC12_M_MRST for both SSCs. See . 0b1 MIS_1 Master Mode Input Select Bit 1 (Master Mode only) 3 read-write Default Inputs selected according to MIS_0. 0b0 Do not use Connects to unused pins. 0b1 SIS Slave Mode Input Select (Slave Mode only) 1 read-write SSCx_S_MTSR (x = 1 or 2, dependant form current SSC), see . 0b0 SSC12_S_MTSR for both SSCs. See . 0b1 RB Receiver Buffer Register 0xC 32 read-write n 0x0 0x0 RB_VALUE Receive Data Register Value 0 15 read-only TB Transmitter Buffer Register 0x8 32 read-write n 0x0 0x0 TB_VALUE Transmit Data Register Value 0 15 read-write TIMER2 TIMER2 TIMER2 0x0 0x0 0x1000 registers n CNT Timer 2 Count Register 0x10 32 read-write n 0x0 0x0 T2H Timer 2 Value 8 7 read-write T2L Timer 2 Value 0 7 read-write CON Timer 2 Control Register 0x0 32 read-write n 0x0 0x0 CP_RL2 Capture/Reload Select 0 read-write Reload upon overflow or upon negative/positive transition at pin T2EX (when EXEN2 = 1). 0b0 Capture Timer 2 data register contents on the negative/positive transition at pin T2EX, provided EXEN2 = 1.The negative or positive transition at Pin T2EX is selected by bit EDGESEL. 0b1 C_T2 Timer or Counter Select 1 read-write Timer function selected. 0b0 Count upon negative edge at pin T2. 0b1 EXEN2 Timer 2 External Enable Control 3 read-write DISABLED External events are disabled. 0b0 ENABLED External events are enabled in Capture/Reload Mode. 0b1 EXF2 Timer 2 External Flag 6 read-only TF2 Timer 2 Overflow/Underflow Flag 7 read-only TR2 Timer 2 Start/Stop Control 2 read-write STOP Timer 2. 0b0 START Timer 2. 0b1 CON1 Timer 2 Control Register 1 0x1C 32 read-write n 0x0 0x0 EXF2EN External Interrupt Enable 0 read-write DISABLE External interrupt. 0b0 ENABLE External interrupt 0b1 TF2EN Overflow/Underflow Interrupt Enable 1 read-write DISABLE Overflow/underflow interrupt. 0b0 ENABLE Overflow/underflow interrupt. 0b1 ICLR Timer 2 Interrupt Clear Register 0x18 32 read-write n 0x0 0x0 EXF2CLR External Interrupt Clear Flag 6 write-only N/A External interrupt is not cleared. 0b0 Clear External interrupt 0b1 TF2CLR Overflow/Underflow Interrupt Clear Flag 7 write-only N/A Overflow/underflow interrupt is not cleared. 0b0 Clear Overflow/underflow interrupt 0b1 MOD Timer 2 Mode Register 0x4 32 read-write n 0x0 0x0 DCEN Up/Down Counter Enable 0 read-write DISABLED Up/Down Counter function is disabled 0b0 ENABLED Up/Down Counter function is enabled and controlled by pin T2EX (Up = 1, Down = 0) 0b1 EDGESEL Edge Select in Capture Mode/Reload Mode 5 read-write FALLING The falling edge at Pin T2EX is selected. 0b0 RISING The rising edge at Pin T2EX is selected. 0b1 PREN Prescaler Enable 4 read-write DISABLED Prescaler is disabled and the 2 or 12 divider takes effect. 0b0 ENABLED Prescaler is enabled (see T2PRE bit) and the 2 or 12 divider is bypassed. 0b1 T2PRE Timer 2 Prescaler Bit 1 2 read-write DIV1 fT2 = fsys 0b000 DIV2 fT2 = fsys / 2 0b001 DIV4 DfT2 = fsys / 4 0b010 DIV8 fT2 = fsys / 8 0b011 DIV16 fT2 = fsys / 16 0b100 DIV32 fT2 = fsys / 32 0b101 DIV64 fT2 = fsys / 64 0b110 DIV128 fT2 = fsys / 128 0b111 T2REGS Edge Select for Timer 2 External Start 7 read-write FALLING The falling edge at Pin T2EX is selected. 0b0 RISING The rising edge at Pin T2EX is selected. 0b1 T2RHEN Timer 2 External Start Enable 6 read-write DISABLED Timer 2 External Start is disabled. 0b0 ENABLED Timer 2 External Start is enabled. 0b1 RC Timer 2 Reload/Capture Register 0x8 32 read-write n 0x0 0x0 RCH2 Reload/Capture Value 8 7 read-write RCL2 Reload/Capture Value 0 7 read-write TIMER21 TIMER21 TIMER21 0x0 0x0 0x1000 registers n CNT Timer 2 Count Register 0x10 32 read-write n 0x0 0x0 T2H Timer 2 Value 8 7 read-write T2L Timer 2 Value 0 7 read-write CON Timer 2 Control Register 0x0 32 read-write n 0x0 0x0 CP_RL2 Capture/Reload Select 0 read-write Reload upon overflow or upon negative/positive transition at pin T2EX (when EXEN2 = 1). 0b0 Capture Timer 2 data register contents on the negative/positive transition at pin T2EX, provided EXEN2 = 1.The negative or positive transition at Pin T2EX is selected by bit EDGESEL. 0b1 C_T2 Timer or Counter Select 1 read-write Timer function selected. 0b0 Count upon negative edge at pin T2. 0b1 EXEN2 Timer 2 External Enable Control 3 read-write DISABLED External events are disabled. 0b0 ENABLED External events are enabled in Capture/Reload Mode. 0b1 EXF2 Timer 2 External Flag 6 read-only TF2 Timer 2 Overflow/Underflow Flag 7 read-only TR2 Timer 2 Start/Stop Control 2 read-write STOP Timer 2. 0b0 START Timer 2. 0b1 CON1 Timer 2 Control Register 1 0x1C 32 read-write n 0x0 0x0 EXF2EN External Interrupt Enable 0 read-write DISABLE External interrupt. 0b0 ENABLE External interrupt 0b1 TF2EN Overflow/Underflow Interrupt Enable 1 read-write DISABLE Overflow/underflow interrupt. 0b0 ENABLE Overflow/underflow interrupt. 0b1 ICLR Timer 2 Interrupt Clear Register 0x18 32 read-write n 0x0 0x0 EXF2CLR External Interrupt Clear Flag 6 write-only N/A External interrupt is not cleared. 0b0 Clear External interrupt 0b1 TF2CLR Overflow/Underflow Interrupt Clear Flag 7 write-only N/A Overflow/underflow interrupt is not cleared. 0b0 Clear Overflow/underflow interrupt 0b1 MOD Timer 2 Mode Register 0x4 32 read-write n 0x0 0x0 DCEN Up/Down Counter Enable 0 read-write DISABLED Up/Down Counter function is disabled 0b0 ENABLED Up/Down Counter function is enabled and controlled by pin T2EX (Up = 1, Down = 0) 0b1 EDGESEL Edge Select in Capture Mode/Reload Mode 5 read-write FALLING The falling edge at Pin T2EX is selected. 0b0 RISING The rising edge at Pin T2EX is selected. 0b1 PREN Prescaler Enable 4 read-write DISABLED Prescaler is disabled and the 2 or 12 divider takes effect. 0b0 ENABLED Prescaler is enabled (see T2PRE bit) and the 2 or 12 divider is bypassed. 0b1 T2PRE Timer 2 Prescaler Bit 1 2 read-write DIV1 fT2 = fsys 0b000 DIV2 fT2 = fsys / 2 0b001 DIV4 DfT2 = fsys / 4 0b010 DIV8 fT2 = fsys / 8 0b011 DIV16 fT2 = fsys / 16 0b100 DIV32 fT2 = fsys / 32 0b101 DIV64 fT2 = fsys / 64 0b110 DIV128 fT2 = fsys / 128 0b111 T2REGS Edge Select for Timer 2 External Start 7 read-write FALLING The falling edge at Pin T2EX is selected. 0b0 RISING The rising edge at Pin T2EX is selected. 0b1 T2RHEN Timer 2 External Start Enable 6 read-write DISABLED Timer 2 External Start is disabled. 0b0 ENABLED Timer 2 External Start is enabled. 0b1 RC Timer 2 Reload/Capture Register 0x8 32 read-write n 0x0 0x0 RCH2 Reload/Capture Value 8 7 read-write RCL2 Reload/Capture Value 0 7 read-write UART1 UART1 UART1 0x0 0x0 0x2000 registers n SBUF Serial Data Buffer 0x4 32 read-write n 0x0 0x0 VAL Serial Interface Buffer Register 0 7 read-write SCON Serial Channel Control Register 0x0 32 read-write n 0x0 0x0 RB8 Serial Port Receiver Bit 9 2 read-write REN Enable Receiver of Serial Port 4 read-write value1 Serial reception is disabled. 0b0 value2 Serial reception is enabled. 0b1 RI Receive Interrupt Flag 0 read-write SM0 Serial Port Operating Mode Selection 7 read-write SM1 Serial Port Operating Mode Selection 6 read-write SM2 Enable Serial Port Multiprocessor Communication in Modes 2 and 3 5 read-write TB8 Serial Port Transmitter Bit 9 3 read-write TI Transmit Interrupt Flag 1 read-write SCONCLR Serial Channel Control Clear Register 0x8 32 read-write n 0x0 0x0 RB8CLR SCON.RB8 Clear Flag 2 write-only value1 RB8 Flag is not cleared. 0b0 value2 RB8 Flag is cleared. 0b1 RICLR SCON.RI Clear Flag 0 write-only value1 RI Flag is not cleared. 0b0 value2 RI Flag is cleared. 0b1 TICLR SCON.TI Clear Flag 1 write-only value1 TI Flag is not cleared. 0b0 value2 TI Flag is cleared. 0b1 UART2 UART2 UART2 0x0 0x0 0x2000 registers n SBUF Serial Data Buffer 0x4 32 read-write n 0x0 0x0 VAL Serial Interface Buffer Register 0 7 read-write SCON Serial Channel Control Register 0x0 32 read-write n 0x0 0x0 RB8 Serial Port Receiver Bit 9 2 read-write REN Enable Receiver of Serial Port 4 read-write value1 Serial reception is disabled. 0b0 value2 Serial reception is enabled. 0b1 RI Receive Interrupt Flag 0 read-write SM0 Serial Port Operating Mode Selection 7 read-write SM1 Serial Port Operating Mode Selection 6 read-write SM2 Enable Serial Port Multiprocessor Communication in Modes 2 and 3 5 read-write TB8 Serial Port Transmitter Bit 9 3 read-write TI Transmit Interrupt Flag 1 read-write SCONCLR Serial Channel Control Clear Register 0x8 32 read-write n 0x0 0x0 RB8CLR SCON.RB8 Clear Flag 2 write-only value1 RB8 Flag is not cleared. 0b0 value2 RB8 Flag is cleared. 0b1 RICLR SCON.RI Clear Flag 0 write-only value1 RI Flag is not cleared. 0b0 value2 RI Flag is cleared. 0b1 TICLR SCON.TI Clear Flag 1 write-only value1 TI Flag is not cleared. 0b0 value2 TI Flag is cleared. 0b1