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ADC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1E8 byte (0x0)
mem_usage : registers
protection :

Registers

SC1A

SC1E

aSC1A

aSC1B

aSC1C

aSC1D

aSC1E

aSC1F

aSC1G

aSC1H

aSC1I

aSC1J

aSC1K

aSC1L

aSC1M

aSC1N

SC1F

aSC1O

aSC1P

SC1Q

SC1R

SC1S

SC1T

SC1U

SC1V

SC1W

SC1X

SC1G

aRA

aRB

aRC

aRD

aRE

aRF

aRG

aRH

aRI

aRJ

aRK

aRL

aRM

aRN

SC1H

aRO

aRP

RQ

RR

RS

RT

RU

RV

RW

RX

SC1I

SC1J

SC1K

SC1L

SC1M

SC1N

SC1O

SC1P

SC1B

CFG1

CFG2

RA

RB

RC

RD

RE

RF

RG

RH

RI

RJ

RK

RL

RM

RN

SC1C

RO

RP

CV1

CV2

SC2

SC3

BASE_OFS

OFS

USR_OFS

XOFS

YOFS

G

UG

CLPS

CLP3

CLP2

SC1D

CLP1

CLP0

CLPX

CLP9

CLPS_OFS

CLP3_OFS

CLP2_OFS

CLP1_OFS

CLP0_OFS

CLPX_OFS

CLP9_OFS


SC1A

ADC Status and Control Register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1A SC1A read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1E

ADC Status and Control Register 1
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1E SC1E read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1A

ADC Status and Control Register 1 (alias)
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1A aSC1A read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1B

ADC Status and Control Register 1 (alias)
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1B aSC1B read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1C

ADC Status and Control Register 1 (alias)
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1C aSC1C read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1D

ADC Status and Control Register 1 (alias)
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1D aSC1D read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1E

ADC Status and Control Register 1 (alias)
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1E aSC1E read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1F

ADC Status and Control Register 1 (alias)
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1F aSC1F read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1G

ADC Status and Control Register 1 (alias)
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1G aSC1G read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1H

ADC Status and Control Register 1 (alias)
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1H aSC1H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1I

ADC Status and Control Register 1 (alias)
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1I aSC1I read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1J

ADC Status and Control Register 1 (alias)
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1J aSC1J read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1K

ADC Status and Control Register 1 (alias)
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1K aSC1K read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1L

ADC Status and Control Register 1 (alias)
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1L aSC1L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1M

ADC Status and Control Register 1 (alias)
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1M aSC1M read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1N

ADC Status and Control Register 1 (alias)
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1N aSC1N read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1F

ADC Status and Control Register 1
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1F SC1F read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1O

ADC Status and Control Register 1 (alias)
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1O aSC1O read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aSC1P

ADC Status and Control Register 1 (alias)
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

aSC1P aSC1P read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1Q

ADC Status and Control Register 1
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1Q SC1Q read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1R

ADC Status and Control Register 1
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1R SC1R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1S

ADC Status and Control Register 1
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1S SC1S read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1T

ADC Status and Control Register 1
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1T SC1T read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1U

ADC Status and Control Register 1
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1U SC1U read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1V

ADC Status and Control Register 1
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1V SC1V read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1W

ADC Status and Control Register 1
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1W SC1W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1X

ADC Status and Control Register 1
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1X SC1X read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1G

ADC Status and Control Register 1
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1G SC1G read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aRA

ADC Data Result Registers (alias)
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRA aRA read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRB

ADC Data Result Registers (alias)
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRB aRB read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRC

ADC Data Result Registers (alias)
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRC aRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRD

ADC Data Result Registers (alias)
address_offset : 0x194 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRD aRD read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRE

ADC Data Result Registers (alias)
address_offset : 0x198 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRE aRE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRF

ADC Data Result Registers (alias)
address_offset : 0x19C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRF aRF read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRG

ADC Data Result Registers (alias)
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRG aRG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRH

ADC Data Result Registers (alias)
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRH aRH read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRI

ADC Data Result Registers (alias)
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRI aRI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRJ

ADC Data Result Registers (alias)
address_offset : 0x1AC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRJ aRJ read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRK

ADC Data Result Registers (alias)
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRK aRK read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRL

ADC Data Result Registers (alias)
address_offset : 0x1B4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRL aRL read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRM

ADC Data Result Registers (alias)
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRM aRM read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRN

ADC Data Result Registers (alias)
address_offset : 0x1BC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRN aRN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


SC1H

ADC Status and Control Register 1
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1H SC1H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


aRO

ADC Data Result Registers (alias)
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRO aRO read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


aRP

ADC Data Result Registers (alias)
address_offset : 0x1C4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

aRP aRP read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RQ

ADC Data Result Registers
address_offset : 0x1C8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RQ RQ read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RR

ADC Data Result Registers
address_offset : 0x1CC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RR RR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RS

ADC Data Result Registers
address_offset : 0x1D0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RS RS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RT

ADC Data Result Registers
address_offset : 0x1D4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RT RT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RU

ADC Data Result Registers
address_offset : 0x1D8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RU RU read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RV

ADC Data Result Registers
address_offset : 0x1DC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RV RV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RW

ADC Data Result Registers
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RW RW read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RX

ADC Data Result Registers
address_offset : 0x1E4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RX RX read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


SC1I

ADC Status and Control Register 1
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1I SC1I read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1J

ADC Status and Control Register 1
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1J SC1J read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1K

ADC Status and Control Register 1
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1K SC1K read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1L

ADC Status and Control Register 1
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1L SC1L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1M

ADC Status and Control Register 1
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1M SC1M read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1N

ADC Status and Control Register 1
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1N SC1N read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1O

ADC Status and Control Register 1
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1O SC1O read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1P

ADC Status and Control Register 1
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1P SC1P read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


SC1B

ADC Status and Control Register 1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1B SC1B read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


CFG1

ADC Configuration Register 1
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG1 CFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADICLK MODE ADIV CLRLTRG

ADICLK : Input Clock Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Alternate clock 1 (ADC_ALTCLK1)

#01 : 01

Alternate clock 2 (ADC_ALTCLK2)

#10 : 10

Alternate clock 3 (ADC_ALTCLK3)

#11 : 11

Alternate clock 4 (ADC_ALTCLK4)

End of enumeration elements list.

MODE : Conversion mode selection
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

#00 : 00

8-bit conversion.

#01 : 01

12-bit conversion.

#10 : 10

10-bit conversion.

End of enumeration elements list.

ADIV : Clock Divide Select
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

#00 : 00

The divide ratio is 1 and the clock rate is input clock.

#01 : 01

The divide ratio is 2 and the clock rate is (input clock)/2.

#10 : 10

The divide ratio is 4 and the clock rate is (input clock)/4.

#11 : 11

The divide ratio is 8 and the clock rate is (input clock)/8.

End of enumeration elements list.

CLRLTRG : Clear Latch Trigger in Trigger Handler Block
bits : 8 - 8 (1 bit)
access : write-only


CFG2

ADC Configuration Register 2
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG2 CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SMPLTS

SMPLTS : Sample Time Select
bits : 0 - 7 (8 bit)
access : read-write


RA

ADC Data Result Registers
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RA RA read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RB

ADC Data Result Registers
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RB RB read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RC

ADC Data Result Registers
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RC RC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RD

ADC Data Result Registers
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RD RD read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RE

ADC Data Result Registers
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RE RE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RF

ADC Data Result Registers
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RF RF read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RG

ADC Data Result Registers
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RG RG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RH

ADC Data Result Registers
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RH RH read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RI

ADC Data Result Registers
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RI RI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RJ

ADC Data Result Registers
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RJ RJ read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RK

ADC Data Result Registers
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RK RK read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RL

ADC Data Result Registers
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RL RL read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RM

ADC Data Result Registers
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RM RM read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RN

ADC Data Result Registers
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RN RN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


SC1C

ADC Status and Control Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1C SC1C read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


RO

ADC Data Result Registers
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RO RO read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


RP

ADC Data Result Registers
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RP RP read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : Data result
bits : 0 - 11 (12 bit)
access : read-only


CV1

Compare Value Registers
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CV1 CV1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CV

CV : Compare Value.
bits : 0 - 15 (16 bit)
access : read-write


CV2

Compare Value Registers
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CV2 CV2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CV

CV : Compare Value.
bits : 0 - 15 (16 bit)
access : read-write


SC2

Status and Control Register 2
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC2 SC2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REFSEL DMAEN ACREN ACFGT ACFE ADTRG ADACT TRGPRNUM TRGSTLAT TRGSTERR

REFSEL : Voltage Reference Selection
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

Default voltage reference pin pair, that is, external pins VREFH and VREFL

#01 : 01

Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU.

End of enumeration elements list.

DMAEN : DMA Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

DMA is disabled.

#1 : 1

DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted.

End of enumeration elements list.

ACREN : Compare Function Range Enable
bits : 3 - 3 (1 bit)
access : read-write

ACFGT : Compare Function Greater Than Enable
bits : 4 - 4 (1 bit)
access : read-write

ACFE : Compare Function Enable
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Compare function disabled.

#1 : 1

Compare function enabled.

End of enumeration elements list.

ADTRG : Conversion Trigger Select
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Software trigger selected.

#1 : 1

Hardware trigger selected.

End of enumeration elements list.

ADACT : Conversion Active
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion not in progress.

#1 : 1

Conversion in progress.

End of enumeration elements list.

TRGPRNUM : Trigger Process Number
bits : 13 - 14 (2 bit)
access : read-only

TRGSTLAT : Trigger Status
bits : 16 - 19 (4 bit)
access : read-only

Enumeration:

#0000 : 0

No trigger request has been latched

#0001 : 1

A trigger request has been latched

End of enumeration elements list.

TRGSTERR : Error in Multiplexed Trigger Request
bits : 24 - 27 (4 bit)
access : read-only

Enumeration:

#0000 : 0

No error has occurred

#0001 : 1

An error has occurred

End of enumeration elements list.


SC3

Status and Control Register 3
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC3 SC3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AVGS AVGE ADCO CAL

AVGS : Hardware Average Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 00

4 samples averaged.

#01 : 01

8 samples averaged.

#10 : 10

16 samples averaged.

#11 : 11

32 samples averaged.

End of enumeration elements list.

AVGE : Hardware Average Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Hardware average function disabled.

#1 : 1

Hardware average function enabled.

End of enumeration elements list.

ADCO : Continuous Conversion Enable
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated.

#1 : 1

Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated.

End of enumeration elements list.

CAL : Calibration
bits : 7 - 7 (1 bit)
access : read-write


BASE_OFS

BASE Offset Register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BASE_OFS BASE_OFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BA_OFS

BA_OFS : Base Offset Error Correction Value
bits : 0 - 7 (8 bit)
access : read-write


OFS

ADC Offset Correction Register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OFS OFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OFS

OFS : Offset Error Correction Value
bits : 0 - 15 (16 bit)
access : read-write


USR_OFS

USER Offset Correction Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USR_OFS USR_OFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USR_OFS

USR_OFS : USER Offset Error Correction Value
bits : 0 - 7 (8 bit)
access : read-write


XOFS

ADC X Offset Correction Register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

XOFS XOFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XOFS

XOFS : X offset error correction value
bits : 0 - 5 (6 bit)
access : read-write


YOFS

ADC Y Offset Correction Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

YOFS YOFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 YOFS

YOFS : Y offset error correction value
bits : 0 - 7 (8 bit)
access : read-write


G

ADC Gain Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

G G read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G

G : Gain error adjustment factor for the overall conversion
bits : 0 - 10 (11 bit)
access : read-write


UG

ADC User Gain Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

UG UG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UG

UG : User gain error correction value
bits : 0 - 9 (10 bit)
access : read-write


CLPS

ADC General Calibration Value Register S
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLPS CLPS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLPS

CLPS : Calibration Value
bits : 0 - 6 (7 bit)
access : read-write


CLP3

ADC Plus-Side General Calibration Value Register 3
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLP3 CLP3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLP3

CLP3 : Calibration Value
bits : 0 - 9 (10 bit)
access : read-write


CLP2

ADC Plus-Side General Calibration Value Register 2
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLP2 CLP2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLP2

CLP2 : Calibration Value
bits : 0 - 9 (10 bit)
access : read-write


SC1D

ADC Status and Control Register 1
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SC1D SC1D read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCH AIEN COCO

ADCH : Input channel select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 000000

Exernal intput channel 0 is selected.

#1 : 000001

Exernal channel 1 is selected as input.

#10 : 000010

Exernal channel 2 is selected as input.

#11 : 000011

Exernal channel 3 is selected as input.

#100 : 000100

Exernal channel 4 is selected as input.

#101 : 000101

Exernal channel 5 is selected as input.

#110 : 000110

Exernal channel 6 is selected as input.

#111 : 000111

Exernal channel 7 is selected as input.

#1000 : 001000

Exernal channel 8 is selected as input.

#1001 : 01001

Exernal channel 9 is selected as input.

#1010 : 001010

Exernal channel 10 is selected as input.

#1011 : 001011

Exernal channel 11 is selected as input.

#1100 : 001100

Exernal channel 12 is selected as input.

#1101 : 001101

Exernal channel 13 is selected as input.

#1110 : 001110

Exernal channel 14 is selected as input.

#1111 : 001111

Exernal channel 15 is selected as input.

#10101 : 010101

Internal channel 0 is selected as input.

#10110 : 010110

Internal channel 1 is selected as input.

#10111 : 010111

Internal channel 2 is selected as input.

#11011 : 011011

Band Gap

#11100 : 011100

Internal channel 3 is selected as input.

#11101 : 011101

VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11110 : 011110

VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL].

#11111 : 011111

Module is disabled

#100000 : 100000

Internal channel 16 is selected as input.

#100001 : 100001

Exernal channel 17 is selected as input.

#100010 : 100010

Exernal channel 18 is selected as input.

#100011 : 100011

Exernal channel 19 is selected as input.

#100100 : 100100

Exernal channel 20 is selected as input.

#100101 : 100101

Exernal channel 21 is selected as input.

#100110 : 100110

Exernal channel 22 is selected as input.

#100111 : 100111

Exernal channel 23 is selected as input.

#101000 : 101000

Exernal channel 24 is selected as input.

#101001 : 101001

Exernal channel 25 is selected as input.

#101010 : 101010

Exernal channel 26 is selected as input.

#101011 : 101011

Exernal channel 27 is selected as input.

#101100 : 101100

Exernal channel 28 is selected as input.

#101101 : 101101

Exernal channel 29 is selected as input.

#101110 : 101110

Exernal channel 30 is selected as input.

#101111 : 101111

Exernal channel 31 is selected as input.

#11xxxx : 11xxxx

Module is disabled

End of enumeration elements list.

AIEN : Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Conversion complete interrupt is disabled.

#1 : 1

Conversion complete interrupt is enabled.

End of enumeration elements list.

COCO : Conversion Complete Flag
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Conversion is not completed.

#1 : 1

Conversion is completed.

End of enumeration elements list.


CLP1

ADC Plus-Side General Calibration Value Register 1
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLP1 CLP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLP1

CLP1 : Calibration Value
bits : 0 - 8 (9 bit)
access : read-write


CLP0

ADC Plus-Side General Calibration Value Register 0
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLP0 CLP0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLP0

CLP0 : Calibration Value
bits : 0 - 7 (8 bit)
access : read-write


CLPX

ADC Plus-Side General Calibration Value Register X
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLPX CLPX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLPX

CLPX : Calibration Value
bits : 0 - 6 (7 bit)
access : read-write


CLP9

ADC Plus-Side General Calibration Value Register 9
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLP9 CLP9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLP9

CLP9 : Calibration Value
bits : 0 - 6 (7 bit)
access : read-write


CLPS_OFS

ADC General Calibration Offset Value Register S
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLPS_OFS CLPS_OFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLPS_OFS

CLPS_OFS : CLPS Offset
bits : 0 - 3 (4 bit)
access : read-write


CLP3_OFS

ADC Plus-Side General Calibration Offset Value Register 3
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLP3_OFS CLP3_OFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLP3_OFS

CLP3_OFS : CLP3 Offset
bits : 0 - 3 (4 bit)
access : read-write


CLP2_OFS

ADC Plus-Side General Calibration Offset Value Register 2
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLP2_OFS CLP2_OFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLP2_OFS

CLP2_OFS : CLP2 Offset
bits : 0 - 3 (4 bit)
access : read-write


CLP1_OFS

ADC Plus-Side General Calibration Offset Value Register 1
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLP1_OFS CLP1_OFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLP1_OFS

CLP1_OFS : CLP1 Offset
bits : 0 - 3 (4 bit)
access : read-write


CLP0_OFS

ADC Plus-Side General Calibration Offset Value Register 0
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLP0_OFS CLP0_OFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLP0_OFS

CLP0_OFS : CLP0 Offset
bits : 0 - 3 (4 bit)
access : read-write


CLPX_OFS

ADC Plus-Side General Calibration Offset Value Register X
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLPX_OFS CLPX_OFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLPX_OFS

CLPX_OFS : CLPX Offset
bits : 0 - 11 (12 bit)
access : read-write


CLP9_OFS

ADC Plus-Side General Calibration Offset Value Register 9
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLP9_OFS CLP9_OFS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLP9_OFS

CLP9_OFS : CLP9 Offset
bits : 0 - 11 (12 bit)
access : read-write



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