\n

ERM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x114 byte (0x0)
mem_usage : registers
protection :

Registers

CR0

SR0

EAR0

EAR1


CR0

ERM Configuration Register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR0 CR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENCIE1 ESCIE1 ENCIE0 ESCIE0

ENCIE1 : ENCIE1
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

#0 : 0

Interrupt notification of Memory 1 non-correctable error events is disabled.

#1 : 1

Interrupt notification of Memory 1 non-correctable error events is enabled.

End of enumeration elements list.

ESCIE1 : ESCIE1
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

#0 : 0

Interrupt notification of Memory 1 single-bit correction events is disabled.

#1 : 1

Interrupt notification of Memory 1 single-bit correction events is enabled.

End of enumeration elements list.

ENCIE0 : ENCIE0
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

#0 : 0

Interrupt notification of Memory 0 non-correctable error events is disabled.

#1 : 1

Interrupt notification of Memory 0 non-correctable error events is enabled.

End of enumeration elements list.

ESCIE0 : ESCIE0
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

Interrupt notification of Memory 0 single-bit correction events is disabled.

#1 : 1

Interrupt notification of Memory 0 single-bit correction events is enabled.

End of enumeration elements list.


SR0

ERM Status Register 0
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SR0 SR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NCE1 SBC1 NCE0 SBC0

NCE1 : NCE1
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

#0 : 0

No non-correctable error event on Memory 1 detected

#1 : 1

Non-correctable error event on Memory 1 detected

End of enumeration elements list.

SBC1 : SBC1
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

#0 : 0

No single-bit correction event on Memory 1 detected

#1 : 1

Single-bit correction event on Memory 1 detected

End of enumeration elements list.

NCE0 : NCE0
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

#0 : 0

No non-correctable error event on Memory 0 detected

#1 : 1

Non-correctable error event on Memory 0 detected

End of enumeration elements list.

SBC0 : SBC0
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

No single-bit correction event on Memory 0 detected

#1 : 1

Single-bit correction event on Memory 0 detected

End of enumeration elements list.


EAR0

ERM Memory n Error Address Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EAR0 EAR0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EAR

EAR : EAR
bits : 0 - 31 (32 bit)
access : read-only


EAR1

ERM Memory n Error Address Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EAR1 EAR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EAR

EAR : EAR
bits : 0 - 31 (32 bit)
access : read-only



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