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FTFC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x30 byte (0x0)
mem_usage : registers
protection :

Registers

FSTAT

FCNFG

FPROT3

FPROT2

FPROT1

FPROT0

FEPROT

FDPROT

FSEC

FCSESTAT

FERSTAT

FERCNFG

FOPT

FCCOB3

FCCOB2

FCCOB1

FCCOB0

FCCOB7

FCCOB6

FCCOB5

FCCOB4

FCCOBB

FCCOBA

FCCOB9

FCCOB8


FSTAT

Flash Status Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FSTAT FSTAT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MGSTAT0 FPVIOL ACCERR RDCOLERR CCIF

MGSTAT0 : Memory Controller Command Completion Status Flag
bits : 0 - 0 (1 bit)
access : read-only

FPVIOL : Flash Protection Violation Flag
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

No protection violation detected

#1 : 1

Protection violation detected

End of enumeration elements list.

ACCERR : Flash Access Error Flag
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

No access error detected

#1 : 1

Access error detected

End of enumeration elements list.

RDCOLERR : FTFC Read Collision Error Flag
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

No collision error detected

#1 : 1

Collision error detected

End of enumeration elements list.

CCIF : Command Complete Interrupt Flag
bits : 7 - 7 (1 bit)
access : read-write


FCNFG

Flash Configuration Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNFG FCNFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EEERDY RAMRDY ERSSUSP ERSAREQ RDCOLLIE CCIE

EEERDY : EEERDY
bits : 0 - 0 (1 bit)
access : read-only

RAMRDY : RAM Ready
bits : 1 - 1 (1 bit)
access : read-only

ERSSUSP : Erase Suspend
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

No suspend requested

#1 : 1

Suspend the current Erase Flash Sector command execution

End of enumeration elements list.

ERSAREQ : Erase All Request
bits : 5 - 5 (1 bit)
access : read-only

Enumeration:

#0 : 0

No request or request complete

End of enumeration elements list.

RDCOLLIE : Read Collision Error Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Read collision error interrupt disabled

#1 : 1

Read collision error interrupt enabled. An interrupt request is generated whenever an FTFC read collision error is detected (see the description of FSTAT[RDCOLERR]).

End of enumeration elements list.

CCIE : Command Complete Interrupt Enable
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Command complete interrupt disabled

#1 : 1

Command complete interrupt enabled. An interrupt request is generated whenever the FSTAT[CCIF] flag is set.

End of enumeration elements list.


FPROT3

Program Flash Protection Registers
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FPROT3 FPROT3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PROT

PROT : Program Flash Region Protect
bits : 0 - 7 (8 bit)
access : read-write


FPROT2

Program Flash Protection Registers
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FPROT2 FPROT2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PROT

PROT : Program Flash Region Protect
bits : 0 - 7 (8 bit)
access : read-write


FPROT1

Program Flash Protection Registers
address_offset : 0x12 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FPROT1 FPROT1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PROT

PROT : Program Flash Region Protect
bits : 0 - 7 (8 bit)
access : read-write


FPROT0

Program Flash Protection Registers
address_offset : 0x13 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FPROT0 FPROT0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PROT

PROT : Program Flash Region Protect
bits : 0 - 7 (8 bit)
access : read-write


FEPROT

EEPROM Protection Register
address_offset : 0x16 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FEPROT FEPROT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPROT

EPROT : EEPROM Region Protect
bits : 0 - 7 (8 bit)
access : read-write


FDPROT

Data Flash Protection Register
address_offset : 0x17 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FDPROT FDPROT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DPROT

DPROT : Data Flash Region Protect
bits : 0 - 7 (8 bit)
access : read-write

Enumeration:

#0 : 00000000

Data Flash region is protected

#1 : 00000001

Data Flash region is not protected

End of enumeration elements list.


FSEC

Flash Security Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FSEC FSEC read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SEC FSLACC MEEN KEYEN

SEC : Flash Security
bits : 0 - 1 (2 bit)
access : read-only

Enumeration:

#10 : 10

MCU security status is unsecure (The standard shipping condition of the FTFC is unsecure.)

End of enumeration elements list.

FSLACC : Factory Failure Analysis Access Code
bits : 2 - 3 (2 bit)
access : read-only

Enumeration:

#00 : 00

Factory access granted

#11 : 11

Factory access granted

End of enumeration elements list.

MEEN : Mass Erase Enable Bits
bits : 4 - 5 (2 bit)
access : read-only

Enumeration:

#00 : 00

Mass erase is enabled

#01 : 01

Mass erase is enabled

#11 : 11

Mass erase is enabled

End of enumeration elements list.

KEYEN : Backdoor Key Security Enable
bits : 6 - 7 (2 bit)
access : read-only

Enumeration:

#00 : 00

Backdoor key access disabled

#01 : 01

Backdoor key access disabled (preferred KEYEN state to disable backdoor key access)

#10 : 10

Backdoor key access enabled

#11 : 11

Backdoor key access disabled

End of enumeration elements list.


FCSESTAT

Flash CSEc Status Register
address_offset : 0x2C Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FCSESTAT FCSESTAT read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BSY SB BIN BFN BOK RIN EDB IDB

BSY : Busy
bits : 0 - 0 (1 bit)
access : read-only

SB : Secure Boot
bits : 1 - 1 (1 bit)
access : read-only

BIN : Secure Boot Initialization
bits : 2 - 2 (1 bit)
access : read-only

BFN : Secure Boot Finished
bits : 3 - 3 (1 bit)
access : read-only

BOK : Secure Boot OK
bits : 4 - 4 (1 bit)
access : read-only

RIN : Random Number Generator Initialized
bits : 5 - 5 (1 bit)
access : read-only

EDB : External Debug
bits : 6 - 6 (1 bit)
access : read-only

IDB : Internal Debug
bits : 7 - 7 (1 bit)
access : read-only


FERSTAT

Flash Error Status Register
address_offset : 0x2E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FERSTAT FERSTAT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DFDIF

DFDIF : Double Bit Fault Detect Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Double bit fault not detected during a valid flash read access from the platform flash controller

#1 : 1

Double bit fault detected (or FERCNFG[FDFD] is set) during a valid flash read access from the platform flash controller

End of enumeration elements list.


FERCNFG

Flash Error Configuration Register
address_offset : 0x2F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FERCNFG FERCNFG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DFDIE FDFD

DFDIE : Double Bit Fault Detect Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Double bit fault detect interrupt disabled

#1 : 1

Double bit fault detect interrupt enabled. An interrupt request is generated whenever the FERSTAT[DFDIF] flag is set.

End of enumeration elements list.

FDFD : Force Double Bit Fault Detect
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

FERSTAT[DFDIF] sets only if a double bit fault is detected during read access from the platform flash controller

#1 : 1

FERSTAT[DFDIF] sets during any valid flash read access from the platform flash controller. An interrupt request is generated if the DFDIE bit is set.

End of enumeration elements list.


FOPT

Flash Option Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FOPT FOPT read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 OPT

OPT : Nonvolatile Option
bits : 0 - 7 (8 bit)
access : read-only


FCCOB3

Flash Common Command Object Registers
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOB3 FCCOB3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write


FCCOB2

Flash Common Command Object Registers
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOB2 FCCOB2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write


FCCOB1

Flash Common Command Object Registers
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOB1 FCCOB1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write


FCCOB0

Flash Common Command Object Registers
address_offset : 0x7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOB0 FCCOB0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write


FCCOB7

Flash Common Command Object Registers
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOB7 FCCOB7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write


FCCOB6

Flash Common Command Object Registers
address_offset : 0x9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOB6 FCCOB6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write


FCCOB5

Flash Common Command Object Registers
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOB5 FCCOB5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write


FCCOB4

Flash Common Command Object Registers
address_offset : 0xB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOB4 FCCOB4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write


FCCOBB

Flash Common Command Object Registers
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOBB FCCOBB read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write


FCCOBA

Flash Common Command Object Registers
address_offset : 0xD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOBA FCCOBA read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write


FCCOB9

Flash Common Command Object Registers
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOB9 FCCOB9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write


FCCOB8

Flash Common Command Object Registers
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCCOB8 FCCOB8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CCOBn

CCOBn : CCOBn
bits : 0 - 7 (8 bit)
access : read-write



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