\n
address_offset : 0x0 Bytes (0x0)
size : 0x348 byte (0x0)
mem_usage : registers
protection :
Interrupt Set Enable Register n
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Set enable
bits : 0 - 31 (32 bit)
Interrupt Set Pending Register n
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Set pending
bits : 0 - 31 (32 bit)
Interrupt Set Pending Register n
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Set pending
bits : 0 - 31 (32 bit)
Interrupt Clear Pending Register n
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Clear pending
bits : 0 - 31 (32 bit)
Interrupt Clear Pending Register n
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Clear pending
bits : 0 - 31 (32 bit)
Interrupt Active Bit Register n
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Active state
bits : 0 - 31 (32 bit)
Interrupt Active Bit Register n
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Active state
bits : 0 - 31 (32 bit)
Interrupt Target Non-secure Register n
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ITNS : Interrupt Targets Non-secure
bits : 0 - 31 (32 bit)
Interrupt Target Non-secure Register n
address_offset : 0x284 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ITNS : Interrupt Targets Non-secure
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Priority Register n
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Priority Register n
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Priority Register n
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Priority Register n
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Priority Register n
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Priority Register n
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Priority Register n
address_offset : 0x31C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Priority Register n
address_offset : 0x320 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Priority Register n
address_offset : 0x324 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Priority Register n
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Priority Register n
address_offset : 0x32C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 1 (2 bit)
PRI_N0 : Priority of interrupt number 4n+0
bits : 0 - 7 (8 bit)
PRI1 : Priority of interrupt n
bits : 8 - 9 (2 bit)
PRI_N1 : Priority of interrupt number 4n+1
bits : 8 - 15 (8 bit)
PRI2 : Priority of interrupt n
bits : 16 - 17 (2 bit)
PRI_N2 : Priority of interrupt number 4n+2
bits : 16 - 23 (8 bit)
PRI3 : Priority of interrupt n
bits : 24 - 25 (2 bit)
PRI_N3 : Priority of interrupt number 4n+3
bits : 24 - 31 (8 bit)
Interrupt Set Enable Register n
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Set enable
bits : 0 - 31 (32 bit)
Interrupt Clear Enable Register n
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Clear enable
bits : 0 - 31 (32 bit)
Interrupt Clear Enable Register n
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Clear enable
bits : 0 - 31 (32 bit)
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