\n
address_offset : 0x0 Bytes (0x0)
size : 0xE04 byte (0x0)
mem_usage : registers
protection : not protected
Interrupt Set Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
Interrupt Set Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
Interrupt Set Enable Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
Interrupt Clear Enable Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
Interrupt Set Pending Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
Interrupt Set Pending Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
Interrupt Set Pending Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
Interrupt Set Pending Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
Interrupt Set Pending Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x120A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x150F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Set Enable Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
Interrupt Clear Pending Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x1815 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Clear Enable Register
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
Interrupt Clear Pending Register
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
Interrupt Clear Pending Register
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
Interrupt Clear Pending Register
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
Interrupt Clear Pending Register
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x1B1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x1E24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Set Pending Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
Interrupt Active Bit Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active bits
bits : 0 - 31 (32 bit)
Interrupt Active Bit Register
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active bits
bits : 0 - 31 (32 bit)
Interrupt Active Bit Register
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active bits
bits : 0 - 31 (32 bit)
Interrupt Clear Enable Register
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
Interrupt Active Bit Register
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active bits
bits : 0 - 31 (32 bit)
Interrupt Active Bit Register
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x212D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x2437 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x2742 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Set Enable Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
Interrupt Clear Enable Register
address_offset : 0x298 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x2A4E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x2D5B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Clear Pending Register
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x300 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x301 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x302 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x303 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Set Pending Register
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x304 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x305 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x306 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x3069 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x307 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x308 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x309 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x30A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x30B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x30C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x30D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x30E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x30F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x310 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x311 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x312 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x313 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x314 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x315 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x316 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x317 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x318 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x319 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x31A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x31B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x31C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x31D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x31E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x31F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x320 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x321 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x322 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Clear Enable Register
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x3378 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x3688 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x3999 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x3CAB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x3FBE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Set Enable Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
Interrupt Set Enable Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
Interrupt Active Bit Register
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active bits
bits : 0 - 31 (32 bit)
Interrupt Set Pending Register
address_offset : 0x40C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x42D2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x45E7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Clear Pending Register
address_offset : 0x484 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x48FD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x4C14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x4F2C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Set Pending Register
address_offset : 0x518 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x5245 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x555F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x587A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x5B96 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x5EB3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x600 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Active Bit Register
address_offset : 0x604 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active bits
bits : 0 - 31 (32 bit)
Interrupt Clear Pending Register
address_offset : 0x60C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x61D1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Set Pending Register
address_offset : 0x628 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x64F0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x6810 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x6B31 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Priority Register n
address_offset : 0x6E53 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Clear Pending Register
address_offset : 0x798 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
Interrupt Set Enable Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
Interrupt Clear Enable Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
Interrupt Active Bit Register
address_offset : 0x80C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active bits
bits : 0 - 31 (32 bit)
Interrupt Clear Enable Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
Interrupt Clear Enable Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
Interrupt Clear Enable Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
Interrupt Clear Enable Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0x901 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Clear Pending Register
address_offset : 0x928 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
Interrupt Active Bit Register
address_offset : 0xA18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active bits
bits : 0 - 31 (32 bit)
Interrupt Set Enable Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
Interrupt Set Enable Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
Interrupt Priority Register n
address_offset : 0xC03 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
Interrupt Active Bit Register
address_offset : 0xC28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active bits
bits : 0 - 31 (32 bit)
Software Trigger Interrupt Register
address_offset : 0xE00 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
INTID : Interrupt ID to trigger
bits : 0 - 8 (9 bit)
Interrupt Priority Register n
address_offset : 0xF06 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of interrupt n
bits : 0 - 2 (3 bit)
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