\n
address_offset : 0x0 Bytes (0x0)
size : 0xE8 byte (0x0)
mem_usage : registers
protection : not protected
Mode Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PCEN : Parallel Capture Enable
bits : 0 - 0 (1 bit)
DSIZE : Data size
bits : 4 - 5 (2 bit)
SCALE : Scale data
bits : 8 - 8 (1 bit)
ALWYS : Always Sampling
bits : 9 - 9 (1 bit)
HALFS : Half Sampling
bits : 10 - 10 (1 bit)
FRSTS : First sample
bits : 11 - 11 (1 bit)
ISIZE : Input Data Size
bits : 16 - 18 (3 bit)
CID : Clear If Disabled
bits : 30 - 31 (2 bit)
Interrupt Status Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DRDY : Data Ready Interrupt Status
bits : 0 - 0 (1 bit)
OVRE : Overrun Error Interrupt Status
bits : 1 - 1 (1 bit)
Reception Holding Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RDATA : Reception Data
bits : 0 - 31 (32 bit)
Interrupt Enable Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
DRDY : Data Ready Interrupt Enable
bits : 0 - 0 (1 bit)
OVRE : Overrun Error Interrupt Enable
bits : 1 - 1 (1 bit)
Interrupt Disable Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
DRDY : Data Ready Interrupt Disable
bits : 0 - 0 (1 bit)
OVRE : Overrun Error Interrupt Disable
bits : 1 - 1 (1 bit)
Interrupt Mask Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DRDY : Data Ready Interrupt Mask
bits : 0 - 0 (1 bit)
OVRE : Overrun Error Interrupt Mask
bits : 1 - 1 (1 bit)
Write Protection Mode Register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WPEN : Write Protection Enable
bits : 0 - 0 (1 bit)
WPKEY : Write Protection Key
bits : 8 - 31 (24 bit)
Write Protection Status Register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
WPVS : Write Protection Violation Source
bits : 0 - 0 (1 bit)
WPVSRC : Write Protection Violation Status
bits : 8 - 23 (16 bit)
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