\n
address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :
MPU Type Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SEPARATE : Separate instruction and Data Memory MapsRegions
bits : 0 - 0 (1 bit)
DREGION : Number of Data Regions
bits : 8 - 15 (8 bit)
IREGION : Number of Instruction Regions
bits : 16 - 23 (8 bit)
MPU Region Attribute and Size Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region Enable
bits : 0 - 0 (1 bit)
SIZE : Region Size
bits : 1 - 5 (5 bit)
SRD : Sub-region disable
bits : 8 - 15 (8 bit)
B : Bufferable bit
bits : 16 - 16 (1 bit)
C : Cacheable bit
bits : 17 - 17 (1 bit)
S : Shareable bit
bits : 18 - 18 (1 bit)
TEX : TEX bit
bits : 19 - 21 (3 bit)
AP : Access Permission
bits : 24 - 26 (3 bit)
XN : Execute Never Attribute
bits : 28 - 28 (1 bit)
MPU Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : MPU Enable
bits : 0 - 0 (1 bit)
HFNMIENA : Enable Hard Fault and NMI handlers
bits : 1 - 1 (1 bit)
PRIVDEFENA : Enables privileged software access to default memory map
bits : 2 - 2 (1 bit)
MPU Region Number Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REGION : Region referenced by RBAR and RASR
bits : 0 - 7 (8 bit)
MPU Region Base Address Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REGION : Region number
bits : 0 - 3 (4 bit)
VALID : Region number valid
bits : 4 - 4 (1 bit)
ADDR : Region base address
bits : 5 - 31 (27 bit)
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