\n
address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection :
Control
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software Reset
bits : 0 - 0 (1 bit)
ENABLE : Enable
bits : 1 - 1 (1 bit)
Status
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SYNCBUSY : Synchronization Busy
bits : 7 - 7 (1 bit)
access : read-only
Interrupt Flag Status and Clear
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXTINT0 : External Interrupt 0
bits : 0 - 0 (1 bit)
EXTINT1 : External Interrupt 1
bits : 1 - 1 (1 bit)
EXTINT2 : External Interrupt 2
bits : 2 - 2 (1 bit)
EXTINT3 : External Interrupt 3
bits : 3 - 3 (1 bit)
EXTINT4 : External Interrupt 4
bits : 4 - 4 (1 bit)
EXTINT5 : External Interrupt 5
bits : 5 - 5 (1 bit)
EXTINT6 : External Interrupt 6
bits : 6 - 6 (1 bit)
EXTINT7 : External Interrupt 7
bits : 7 - 7 (1 bit)
Wake-Up Enable
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WAKEUPEN0 : External Interrupt 0 Wake-up Enable
bits : 0 - 0 (1 bit)
WAKEUPEN1 : External Interrupt 1 Wake-up Enable
bits : 1 - 1 (1 bit)
WAKEUPEN2 : External Interrupt 2 Wake-up Enable
bits : 2 - 2 (1 bit)
WAKEUPEN3 : External Interrupt 3 Wake-up Enable
bits : 3 - 3 (1 bit)
WAKEUPEN4 : External Interrupt 4 Wake-up Enable
bits : 4 - 4 (1 bit)
WAKEUPEN5 : External Interrupt 5 Wake-up Enable
bits : 5 - 5 (1 bit)
WAKEUPEN6 : External Interrupt 6 Wake-up Enable
bits : 6 - 6 (1 bit)
WAKEUPEN7 : External Interrupt 7 Wake-up Enable
bits : 7 - 7 (1 bit)
Configuration n
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SENSE0 : Input Sense 0 Configuration
bits : 0 - 2 (3 bit)
Enumeration: SENSE0Select
0x0 : NONE
No detection
0x1 : RISE
Rising-edge detection
0x2 : FALL
Falling-edge detection
0x3 : BOTH
Both-edges detection
0x4 : HIGH
High-level detection
0x5 : LOW
Low-level detection
End of enumeration elements list.
FILTEN0 : Filter 0 Enable
bits : 3 - 3 (1 bit)
SENSE1 : Input Sense 1 Configuration
bits : 4 - 6 (3 bit)
Enumeration: SENSE1Select
0x0 : NONE
No detection
0x1 : RISE
Rising edge detection
0x2 : FALL
Falling edge detection
0x3 : BOTH
Both edges detection
0x4 : HIGH
High level detection
0x5 : LOW
Low level detection
End of enumeration elements list.
FILTEN1 : Filter 1 Enable
bits : 7 - 7 (1 bit)
SENSE2 : Input Sense 2 Configuration
bits : 8 - 10 (3 bit)
Enumeration: SENSE2Select
0x0 : NONE
No detection
0x1 : RISE
Rising edge detection
0x2 : FALL
Falling edge detection
0x3 : BOTH
Both edges detection
0x4 : HIGH
High level detection
0x5 : LOW
Low level detection
End of enumeration elements list.
FILTEN2 : Filter 2 Enable
bits : 11 - 11 (1 bit)
SENSE3 : Input Sense 3 Configuration
bits : 12 - 14 (3 bit)
Enumeration: SENSE3Select
0x0 : NONE
No detection
0x1 : RISE
Rising edge detection
0x2 : FALL
Falling edge detection
0x3 : BOTH
Both edges detection
0x4 : HIGH
High level detection
0x5 : LOW
Low level detection
End of enumeration elements list.
FILTEN3 : Filter 3 Enable
bits : 15 - 15 (1 bit)
SENSE4 : Input Sense 4 Configuration
bits : 16 - 18 (3 bit)
Enumeration: SENSE4Select
0x0 : NONE
No detection
0x1 : RISE
Rising edge detection
0x2 : FALL
Falling edge detection
0x3 : BOTH
Both edges detection
0x4 : HIGH
High level detection
0x5 : LOW
Low level detection
End of enumeration elements list.
FILTEN4 : Filter 4 Enable
bits : 19 - 19 (1 bit)
SENSE5 : Input Sense 5 Configuration
bits : 20 - 22 (3 bit)
Enumeration: SENSE5Select
0x0 : NONE
No detection
0x1 : RISE
Rising edge detection
0x2 : FALL
Falling edge detection
0x3 : BOTH
Both edges detection
0x4 : HIGH
High level detection
0x5 : LOW
Low level detection
End of enumeration elements list.
FILTEN5 : Filter 5 Enable
bits : 23 - 23 (1 bit)
SENSE6 : Input Sense 6 Configuration
bits : 24 - 26 (3 bit)
Enumeration: SENSE6Select
0x0 : NONE
No detection
0x1 : RISE
Rising edge detection
0x2 : FALL
Falling edge detection
0x3 : BOTH
Both edges detection
0x4 : HIGH
High level detection
0x5 : LOW
Low level detection
End of enumeration elements list.
FILTEN6 : Filter 6 Enable
bits : 27 - 27 (1 bit)
SENSE7 : Input Sense 7 Configuration
bits : 28 - 30 (3 bit)
Enumeration: SENSE7Select
0x0 : NONE
No detection
0x1 : RISE
Rising edge detection
0x2 : FALL
Falling edge detection
0x3 : BOTH
Both edges detection
0x4 : HIGH
High level detection
0x5 : LOW
Low level detection
End of enumeration elements list.
FILTEN7 : Filter 7 Enable
bits : 31 - 31 (1 bit)
Non-Maskable Interrupt Control
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NMISENSE : Non-Maskable Interrupt Sense
bits : 0 - 2 (3 bit)
Enumeration: NMISENSESelect
0x0 : NONE
No detection
0x1 : RISE
Rising-edge detection
0x2 : FALL
Falling-edge detection
0x3 : BOTH
Both-edges detection
0x4 : HIGH
High-level detection
0x5 : LOW
Low-level detection
End of enumeration elements list.
NMIFILTEN : Non-Maskable Interrupt Filter Enable
bits : 3 - 3 (1 bit)
Non-Maskable Interrupt Flag Status and Clear
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NMI : Non-Maskable Interrupt
bits : 0 - 0 (1 bit)
Event Control
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXTINTEO0 : External Interrupt 0 Event Output Enable
bits : 0 - 0 (1 bit)
EXTINTEO1 : External Interrupt 1 Event Output Enable
bits : 1 - 1 (1 bit)
EXTINTEO2 : External Interrupt 2 Event Output Enable
bits : 2 - 2 (1 bit)
EXTINTEO3 : External Interrupt 3 Event Output Enable
bits : 3 - 3 (1 bit)
EXTINTEO4 : External Interrupt 4 Event Output Enable
bits : 4 - 4 (1 bit)
EXTINTEO5 : External Interrupt 5 Event Output Enable
bits : 5 - 5 (1 bit)
EXTINTEO6 : External Interrupt 6 Event Output Enable
bits : 6 - 6 (1 bit)
EXTINTEO7 : External Interrupt 7 Event Output Enable
bits : 7 - 7 (1 bit)
Interrupt Enable Clear
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXTINT0 : External Interrupt 0 Enable
bits : 0 - 0 (1 bit)
EXTINT1 : External Interrupt 1 Enable
bits : 1 - 1 (1 bit)
EXTINT2 : External Interrupt 2 Enable
bits : 2 - 2 (1 bit)
EXTINT3 : External Interrupt 3 Enable
bits : 3 - 3 (1 bit)
EXTINT4 : External Interrupt 4 Enable
bits : 4 - 4 (1 bit)
EXTINT5 : External Interrupt 5 Enable
bits : 5 - 5 (1 bit)
EXTINT6 : External Interrupt 6 Enable
bits : 6 - 6 (1 bit)
EXTINT7 : External Interrupt 7 Enable
bits : 7 - 7 (1 bit)
Interrupt Enable Set
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXTINT0 : External Interrupt 0 Enable
bits : 0 - 0 (1 bit)
EXTINT1 : External Interrupt 1 Enable
bits : 1 - 1 (1 bit)
EXTINT2 : External Interrupt 2 Enable
bits : 2 - 2 (1 bit)
EXTINT3 : External Interrupt 3 Enable
bits : 3 - 3 (1 bit)
EXTINT4 : External Interrupt 4 Enable
bits : 4 - 4 (1 bit)
EXTINT5 : External Interrupt 5 Enable
bits : 5 - 5 (1 bit)
EXTINT6 : External Interrupt 6 Enable
bits : 6 - 6 (1 bit)
EXTINT7 : External Interrupt 7 Enable
bits : 7 - 7 (1 bit)
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