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address_offset : 0x0 Bytes (0x0)
size : 0xFD0 byte (0x0)
mem_usage : registers
protection :
Supported Parallel Port Size Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Asynchronous Clock Prescaler Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRESCALER :
bits : 0 - 12 (13 bit)
Formatter and Flush Status Register
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FlInProg :
bits : 0 - 0 (1 bit)
FtStopped :
bits : 1 - 1 (1 bit)
TCPresent :
bits : 2 - 2 (1 bit)
FtNonStop :
bits : 3 - 3 (1 bit)
Formatter and Flush Control Register
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EnFCont :
bits : 1 - 1 (1 bit)
TrigIn :
bits : 8 - 8 (1 bit)
Formatter Synchronization Counter Register
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Current Parallel Port Size Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRIGGER
address_offset : 0xEE8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TRIGGER :
bits : 0 - 0 (1 bit)
Integration ETM Data
address_offset : 0xEEC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ETM0 :
bits : 0 - 7 (8 bit)
ETM1 :
bits : 8 - 15 (8 bit)
ETM2 :
bits : 16 - 23 (8 bit)
ETM_bytecount :
bits : 24 - 25 (2 bit)
ETM_ATVALID :
bits : 26 - 26 (1 bit)
ITM_bytecount :
bits : 27 - 28 (2 bit)
ITM_ATVALID :
bits : 29 - 29 (1 bit)
ITATBCTR2
address_offset : 0xEF0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ATREADY :
bits : 0 - 0 (1 bit)
ITATBCTR0
address_offset : 0xEF8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ATREADY :
bits : 0 - 0 (1 bit)
Integration ITM Data
address_offset : 0xEFC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM0 :
bits : 0 - 7 (8 bit)
ITM1 :
bits : 8 - 15 (8 bit)
ITM2 :
bits : 16 - 23 (8 bit)
ETM_bytecount :
bits : 24 - 25 (2 bit)
ETM_ATVALID :
bits : 26 - 26 (1 bit)
ITM_bytecount :
bits : 27 - 28 (2 bit)
ITM_ATVALID :
bits : 29 - 29 (1 bit)
Selected Pin Protocol Register
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXMODE :
bits : 0 - 1 (2 bit)
Integration Mode Control
address_offset : 0xF00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Mode :
bits : 0 - 0 (1 bit)
Claim tag set
address_offset : 0xFA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Claim tag clear
address_offset : 0xFA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TPIU_DEVID
address_offset : 0xFC8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
NrTraceInput :
bits : 0 - 0 (1 bit)
AsynClkIn :
bits : 5 - 5 (1 bit)
MinBufSz :
bits : 6 - 8 (3 bit)
PTINVALID :
bits : 9 - 9 (1 bit)
MANCVALID :
bits : 10 - 10 (1 bit)
NRZVALID :
bits : 11 - 11 (1 bit)
TPIU_DEVTYPE
address_offset : 0xFCC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SubType :
bits : 0 - 3 (4 bit)
MajorType :
bits : 4 - 7 (4 bit)
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