\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
ITM Stimulus Port Registers
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x2AC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x2AC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x2AC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x2F8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x2F8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x2F8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x39C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x39C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x39C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x3F4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x3F4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x3F4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x450 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x450 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x450 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x4B0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x4B0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x4B0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x514 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x514 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x514 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x57C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x57C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x57C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x5E8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x5E8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x5E8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x6CC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x6CC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x6CC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x744 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x744 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x744 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x7C0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x7C0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x7C0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Stimulus Port Registers
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_BYTE_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PORT :
bits : 0 - 31 (32 bit)
ITM Stimulus Port Registers
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 7 (8 bit)
ITM Stimulus Port Registers
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : PORT_WORD_MODE[%s]
reset_Mask : 0x0
PORT :
bits : 0 - 15 (16 bit)
ITM Trace Enable Register
address_offset : 0xE00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ITM Trace Privilege Register
address_offset : 0xE40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRIVMASK :
bits : 0 - 3 (4 bit)
ITM Trace Control Register
address_offset : 0xE80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ITMENA :
bits : 0 - 0 (1 bit)
TSENA :
bits : 1 - 1 (1 bit)
SYNCENA :
bits : 2 - 2 (1 bit)
DWTENA :
bits : 3 - 3 (1 bit)
SWOENA :
bits : 4 - 4 (1 bit)
STALLENA :
bits : 5 - 5 (1 bit)
TSPrescale :
bits : 8 - 9 (2 bit)
GTSFREQ :
bits : 10 - 11 (2 bit)
TraceBusID :
bits : 16 - 22 (7 bit)
BUSY :
bits : 23 - 23 (1 bit)
ITM Integration Write Register
address_offset : 0xEF8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ATVALIDM :
bits : 0 - 0 (1 bit)
ITM Integration Read Register
address_offset : 0xEFC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ATREADYM :
bits : 0 - 0 (1 bit)
ITM Peripheral Identification Register #4
address_offset : 0xFD0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM Peripheral Identification Register #5
address_offset : 0xFD4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM Peripheral Identification Register #6
address_offset : 0xFD8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM Peripheral Identification Register #7
address_offset : 0xFDC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM Peripheral Identification Register #0
address_offset : 0xFE0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM Peripheral Identification Register #1
address_offset : 0xFE4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM Peripheral Identification Register #2
address_offset : 0xFE8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM Peripheral Identification Register #3
address_offset : 0xFEC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM Component Identification Register #0
address_offset : 0xFF0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM Component Identification Register #1
address_offset : 0xFF4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM Component Identification Register #2
address_offset : 0xFF8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ITM Component Identification Register #3
address_offset : 0xFFC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
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