\n
address_offset : 0x0 Bytes (0x0)
size : 0x13 byte (0x0)
mem_usage : registers
protection : not protected
Control A
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IORET : I/O Retention
bits : 2 - 2 (1 bit)
Sleep Configuration
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEEPMODE : Sleep Mode
bits : 0 - 2 (3 bit)
Enumeration: SLEEPMODESelect
2 : IDLE
CPU, AHBx, and APBx clocks are OFF
4 : STANDBY
All Clocks are OFF
5 : HIBERNATE
Backup domain is ON as well as some PDRAMs
6 : BACKUP
Only Backup domain is powered ON
7 : OFF
All power domains are powered OFF
End of enumeration elements list.
Power Switch Acknowledge Delay
address_offset : 0x12 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DLYVAL : Delay Value
bits : 0 - 6 (7 bit)
IGNACK : Ignore Acknowledge
bits : 7 - 7 (1 bit)
Interrupt Enable Clear
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEEPRDY : Sleep Mode Entry Ready Enable
bits : 0 - 0 (1 bit)
Interrupt Enable Set
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEEPRDY : Sleep Mode Entry Ready Enable
bits : 0 - 0 (1 bit)
Interrupt Flag Status and Clear
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEEPRDY : Sleep Mode Entry Ready
bits : 0 - 0 (1 bit)
Standby Configuration
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RAMCFG : Ram Configuration
bits : 0 - 1 (2 bit)
Enumeration: RAMCFGSelect
0 : RET
All the system RAM is retained
1 : PARTIAL
Only the first 32Kbytes of the system RAM is retained
2 : OFF
All the system RAM is turned OFF
End of enumeration elements list.
FASTWKUP : Fast Wakeup
bits : 4 - 5 (2 bit)
Enumeration: FASTWKUPSelect
0 : NO
Fast Wakeup is disabled
1 : NVM
Fast Wakeup is enabled on NVM
2 : MAINVREG
Fast Wakeup is enabled on the main voltage regulator (MAINVREG)
3 : BOTH
Fast Wakeup is enabled on both NVM and MAINVREG
End of enumeration elements list.
Hibernate Configuration
address_offset : 0x9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RAMCFG : Ram Configuration
bits : 0 - 1 (2 bit)
Enumeration: RAMCFGSelect
0 : RET
All the system RAM is retained
1 : PARTIAL
Only the first 32Kbytes of the system RAM is retained
2 : OFF
All the system RAM is turned OFF
End of enumeration elements list.
BRAMCFG : Backup Ram Configuration
bits : 2 - 3 (2 bit)
Enumeration: BRAMCFGSelect
0 : RET
All the backup RAM is retained
1 : PARTIAL
Only the first 4Kbytes of the backup RAM is retained
2 : OFF
All the backup RAM is turned OFF
End of enumeration elements list.
Backup Configuration
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BRAMCFG : Ram Configuration
bits : 0 - 1 (2 bit)
Enumeration: BRAMCFGSelect
0 : RET
All the backup RAM is retained
1 : PARTIAL
Only the first 4Kbytes of the backup RAM is retained
2 : OFF
All the backup RAM is turned OFF
End of enumeration elements list.
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