Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x235 byte (0x0)
mem_usage : registers
protection : not protected
SDMA System Address / Argument 2
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDR : SDMA System Address
bits : 0 - 31 (32 bit)
SDMA System Address / Argument 2
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : SSAR
reset_Mask : 0x0
ARG2 : Argument 2
bits : 0 - 31 (32 bit)
SDMA System Address / Argument 2
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDR : SDMA System Address
bits : 0 - 31 (32 bit)
SDMA System Address / Argument 2
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : SSAR
reset_Mask : 0x0
ARG2 : Argument 2
bits : 0 - 31 (32 bit)
Response
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMDRESP : Command Response
bits : 0 - 31 (32 bit)
Preset Value n
address_offset : 0x122 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Response
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMDRESP : Command Response
bits : 0 - 31 (32 bit)
Response
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMDRESP : Command Response
bits : 0 - 31 (32 bit)
Preset Value n
address_offset : 0x186 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Response
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMDRESP : Command Response
bits : 0 - 31 (32 bit)
Preset Value n
address_offset : 0x1EC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Response
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMDRESP : Command Response
bits : 0 - 31 (32 bit)
Buffer Data Port
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUFDATA : Buffer Data
bits : 0 - 31 (32 bit)
Buffer Data Port
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUFDATA : Buffer Data
bits : 0 - 31 (32 bit)
MMC Control 1
address_offset : 0x204 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDTYP : e.MMC Command Type
bits : 0 - 1 (2 bit)
Enumeration: CMDTYPSelect
0 : NORMAL
Not a MMC specific command
1 : WAITIRQ
Wait IRQ Command
2 : STREAM
Stream Command
3 : BOOT
Boot Command
End of enumeration elements list.
DDR : e.MMC HSDDR Mode
bits : 3 - 3 (1 bit)
OPD : e.MMC Open Drain Mode
bits : 4 - 4 (1 bit)
BOOTA : e.MMC Boot Acknowledge Enable
bits : 5 - 5 (1 bit)
RSTN : e.MMC Reset Signal
bits : 6 - 6 (1 bit)
FCD : e.MMC Force Card Detect
bits : 7 - 7 (1 bit)
MMC Control 1
address_offset : 0x204 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDTYP : e.MMC Command Type
bits : 0 - 1 (2 bit)
Enumeration: CMDTYPSelect
0 : NORMAL
Not a MMC specific command
1 : WAITIRQ
Wait IRQ Command
2 : STREAM
Stream Command
3 : BOOT
Boot Command
End of enumeration elements list.
DDR : e.MMC HSDDR Mode
bits : 3 - 3 (1 bit)
OPD : e.MMC Open Drain Mode
bits : 4 - 4 (1 bit)
BOOTA : e.MMC Boot Acknowledge Enable
bits : 5 - 5 (1 bit)
RSTN : e.MMC Reset Signal
bits : 6 - 6 (1 bit)
FCD : e.MMC Force Card Detect
bits : 7 - 7 (1 bit)
MMC Control 2
address_offset : 0x205 Bytes (0x0)
size : 8 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SRESP : e.MMC Abort Wait IRQ
bits : 0 - 0 (1 bit)
ABOOT : e.MMC Abort Boot
bits : 1 - 1 (1 bit)
MMC Control 2
address_offset : 0x205 Bytes (0x0)
size : 8 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SRESP : e.MMC Abort Wait IRQ
bits : 0 - 0 (1 bit)
ABOOT : e.MMC Abort Boot
bits : 1 - 1 (1 bit)
AHB Control
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BMAX : AHB Maximum Burst
bits : 0 - 1 (2 bit)
Enumeration: BMAXSelect
0 : INCR16
None
1 : INCR8
None
2 : INCR4
None
3 : SINGLE
None
End of enumeration elements list.
AHB Control
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BMAX : AHB Maximum Burst
bits : 0 - 1 (2 bit)
Enumeration: BMAXSelect
0 : INCR16
1 : INCR8
2 : INCR4
3 : SINGLE
End of enumeration elements list.
Clock Control 2
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FSDCLKD : Force SDCK Disabled
bits : 0 - 0 (1 bit)
Enumeration: FSDCLKDSelect
0 : NOEFFECT
No effect
1 : DISABLE
SDCLK can be stopped at any time after DATA transfer.SDCLK enable forcing for 8 SDCLK cycles is disabled
End of enumeration elements list.
Clock Control 2
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FSDCLKD : Force SDCK Disabled
bits : 0 - 0 (1 bit)
Enumeration: FSDCLKDSelect
0 : NOEFFECT
No effect
1 : DISABLE
SDCLK can be stopped at any time after DATA transfer.SDCLK enable forcing for 8 SDCLK cycles is disabled
End of enumeration elements list.
Capabilities Control
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CAPWREN : Capabilities Registers Write Enable (Required to write the correct frequencies in the Capabilities Registers)
bits : 0 - 0 (1 bit)
KEY : Key (0x46)
bits : 8 - 15 (8 bit)
Capabilities Control
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CAPWREN : Capabilities Registers Write Enable (Required to write the correct frequencies in the Capabilities Registers)
bits : 0 - 0 (1 bit)
KEY : Key (0x46)
bits : 8 - 15 (8 bit)
Debug
address_offset : 0x234 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NIDBG : Non-intrusive debug enable
bits : 0 - 0 (1 bit)
Enumeration: NIDBGSelect
0 : IDBG
Debugging is intrusive (reads of BDPR from debugger are considered and increment the internal buffer pointer)
1 : NIDBG
Debugging is not intrusive (reads of BDPR from debugger are discarded and do not increment the internal buffer pointer)
End of enumeration elements list.
Debug
address_offset : 0x234 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NIDBG : Non-intrusive debug enable
bits : 0 - 0 (1 bit)
Enumeration: NIDBGSelect
0 : IDBG
Debugging is intrusive (reads of BDPR from debugger are considered and increment the internal buffer pointer)
1 : NIDBG
Debugging is not intrusive (reads of BDPR from debugger are discarded and do not increment the internal buffer pointer)
End of enumeration elements list.
Present State
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMDINHC : Command Inhibit (CMD)
bits : 0 - 0 (1 bit)
Enumeration: CMDINHCSelect
0 : CAN
Can issue command using only CMD line
1 : CANNOT
Cannot issue command
End of enumeration elements list.
CMDINHD : Command Inhibit (DAT)
bits : 1 - 1 (1 bit)
Enumeration: CMDINHDSelect
0 : CAN
Can issue command which uses the DAT line
1 : CANNOT
Cannot issue command which uses the DAT line
End of enumeration elements list.
DLACT : DAT Line Active
bits : 2 - 2 (1 bit)
Enumeration: DLACTSelect
0 : INACTIVE
DAT Line Inactive
1 : ACTIVE
DAT Line Active
End of enumeration elements list.
RTREQ : Re-Tuning Request
bits : 3 - 3 (1 bit)
Enumeration: RTREQSelect
0 : OK
Fixed or well-tuned sampling clock
1 : REQUIRED
Sampling clock needs re-tuning
End of enumeration elements list.
WTACT : Write Transfer Active
bits : 8 - 8 (1 bit)
Enumeration: WTACTSelect
0 : NO
No valid data
1 : YES
Transferring data
End of enumeration elements list.
RTACT : Read Transfer Active
bits : 9 - 9 (1 bit)
Enumeration: RTACTSelect
0 : NO
No valid data
1 : YES
Transferring data
End of enumeration elements list.
BUFWREN : Buffer Write Enable
bits : 10 - 10 (1 bit)
Enumeration: BUFWRENSelect
0 : DISABLE
Write disable
1 : ENABLE
Write enable
End of enumeration elements list.
BUFRDEN : Buffer Read Enable
bits : 11 - 11 (1 bit)
Enumeration: BUFRDENSelect
0 : DISABLE
Read disable
1 : ENABLE
Read enable
End of enumeration elements list.
CARDINS : Card Inserted
bits : 16 - 16 (1 bit)
Enumeration: CARDINSSelect
0 : NO
Reset or Debouncing or No Card
1 : YES
Card inserted
End of enumeration elements list.
CARDSS : Card State Stable
bits : 17 - 17 (1 bit)
Enumeration: CARDSSSelect
0 : NO
Reset or Debouncing
1 : YES
No Card or Insered
End of enumeration elements list.
CARDDPL : Card Detect Pin Level
bits : 18 - 18 (1 bit)
Enumeration: CARDDPLSelect
0 : NO
No card present (SDCD#=1)
1 : YES
Card present (SDCD#=0)
End of enumeration elements list.
WRPPL : Write Protect Pin Level
bits : 19 - 19 (1 bit)
Enumeration: WRPPLSelect
0 : PROTECTED
Write protected (SDWP#=0)
1 : ENABLED
Write enabled (SDWP#=1)
End of enumeration elements list.
DATLL : DAT[3:0] Line Level
bits : 20 - 23 (4 bit)
CMDLL : CMD Line Level
bits : 24 - 24 (1 bit)
Present State
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMDINHC : Command Inhibit (CMD)
bits : 0 - 0 (1 bit)
Enumeration: CMDINHCSelect
0 : CAN
Can issue command using only CMD line
1 : CANNOT
Cannot issue command
End of enumeration elements list.
CMDINHD : Command Inhibit (DAT)
bits : 1 - 1 (1 bit)
Enumeration: CMDINHDSelect
0 : CAN
Can issue command which uses the DAT line
1 : CANNOT
Cannot issue command which uses the DAT line
End of enumeration elements list.
DLACT : DAT Line Active
bits : 2 - 2 (1 bit)
Enumeration: DLACTSelect
0 : INACTIVE
DAT Line Inactive
1 : ACTIVE
DAT Line Active
End of enumeration elements list.
RTREQ : Re-Tuning Request
bits : 3 - 3 (1 bit)
Enumeration: RTREQSelect
0 : OK
Fixed or well-tuned sampling clock
1 : REQUIRED
Sampling clock needs re-tuning
End of enumeration elements list.
WTACT : Write Transfer Active
bits : 8 - 8 (1 bit)
Enumeration: WTACTSelect
0 : NO
No valid data
1 : YES
Transferring data
End of enumeration elements list.
RTACT : Read Transfer Active
bits : 9 - 9 (1 bit)
Enumeration: RTACTSelect
0 : NO
No valid data
1 : YES
Transferring data
End of enumeration elements list.
BUFWREN : Buffer Write Enable
bits : 10 - 10 (1 bit)
Enumeration: BUFWRENSelect
0 : DISABLE
Write disable
1 : ENABLE
Write enable
End of enumeration elements list.
BUFRDEN : Buffer Read Enable
bits : 11 - 11 (1 bit)
Enumeration: BUFRDENSelect
0 : DISABLE
Read disable
1 : ENABLE
Read enable
End of enumeration elements list.
CARDINS : Card Inserted
bits : 16 - 16 (1 bit)
Enumeration: CARDINSSelect
0 : NO
Reset or Debouncing or No Card
1 : YES
Card inserted
End of enumeration elements list.
CARDSS : Card State Stable
bits : 17 - 17 (1 bit)
Enumeration: CARDSSSelect
0 : NO
Reset or Debouncing
1 : YES
No Card or Insered
End of enumeration elements list.
CARDDPL : Card Detect Pin Level
bits : 18 - 18 (1 bit)
Enumeration: CARDDPLSelect
0 : NO
No card present (SDCD#=1)
1 : YES
Card present (SDCD#=0)
End of enumeration elements list.
WRPPL : Write Protect Pin Level
bits : 19 - 19 (1 bit)
Enumeration: WRPPLSelect
0 : PROTECTED
Write protected (SDWP#=0)
1 : ENABLED
Write enabled (SDWP#=1)
End of enumeration elements list.
DATLL : DAT[3:0] Line Level
bits : 20 - 23 (4 bit)
CMDLL : CMD Line Level
bits : 24 - 24 (1 bit)
Preset Value n
address_offset : 0x254 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Host Control 1
address_offset : 0x28 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LEDCTRL : LED Control
bits : 0 - 0 (1 bit)
Enumeration: LEDCTRLSelect
0 : OFF
LED off
1 : ON
LED on
End of enumeration elements list.
DW : Data Width
bits : 1 - 1 (1 bit)
Enumeration: DWSelect
0 : 1BIT
1-bit mode
1 : 4BIT
4-bit mode
End of enumeration elements list.
HSEN : High Speed Enable
bits : 2 - 2 (1 bit)
Enumeration: HSENSelect
0 : NORMAL
Normal Speed mode
1 : HIGH
High Speed mode
End of enumeration elements list.
DMASEL : DMA Select
bits : 3 - 4 (2 bit)
Enumeration: DMASELSelect
0 : SDMA
SDMA is selected
2 : 32BIT
32-bit Address ADMA2 is selected
End of enumeration elements list.
CARDDTL : Card Detect Test Level
bits : 6 - 6 (1 bit)
Enumeration: CARDDTLSelect
0 : NO
No Card
1 : YES
Card Inserted
End of enumeration elements list.
CARDDSEL : Card Detect Signal Selection
bits : 7 - 7 (1 bit)
Enumeration: CARDDSELSelect
0 : NORMAL
SDCD# is selected (for normal use)
1 : TEST
The Card Select Test Level is selected (for test purpose)
End of enumeration elements list.
Host Control 1
address_offset : 0x28 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : HC1R
reset_Mask : 0x0
DW : Data Width
bits : 1 - 1 (1 bit)
Enumeration: DWSelect
0 : 1BIT
1-bit mode
1 : 4BIT
4-bit mode
End of enumeration elements list.
HSEN : High Speed Enable
bits : 2 - 2 (1 bit)
Enumeration: HSENSelect
0 : NORMAL
Normal Speed mode
1 : HIGH
High Speed mode
End of enumeration elements list.
DMASEL : DMA Select
bits : 3 - 4 (2 bit)
Enumeration: DMASELSelect
0 : SDMA
SDMA is selected
2 : 32BIT
32-bit Address ADMA2 is selected
End of enumeration elements list.
Host Control 1
address_offset : 0x28 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LEDCTRL : LED Control
bits : 0 - 0 (1 bit)
Enumeration: LEDCTRLSelect
0 : OFF
LED off
1 : ON
LED on
End of enumeration elements list.
DW : Data Width
bits : 1 - 1 (1 bit)
Enumeration: DWSelect
0 : 1BIT
1-bit mode
1 : 4BIT
4-bit mode
End of enumeration elements list.
HSEN : High Speed Enable
bits : 2 - 2 (1 bit)
Enumeration: HSENSelect
0 : NORMAL
Normal Speed mode
1 : HIGH
High Speed mode
End of enumeration elements list.
DMASEL : DMA Select
bits : 3 - 4 (2 bit)
Enumeration: DMASELSelect
0 : SDMA
SDMA is selected
2 : 32BIT
32-bit Address ADMA2 is selected
End of enumeration elements list.
CARDDTL : Card Detect Test Level
bits : 6 - 6 (1 bit)
Enumeration: CARDDTLSelect
0 : NO
No Card
1 : YES
Card Inserted
End of enumeration elements list.
CARDDSEL : Card Detect Signal Selection
bits : 7 - 7 (1 bit)
Enumeration: CARDDSELSelect
0 : NORMAL
SDCD# is selected (for normal use)
1 : TEST
The Card Select Test Level is selected (for test purpose)
End of enumeration elements list.
Host Control 1
address_offset : 0x28 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : HC1R
reset_Mask : 0x0
DW : Data Width
bits : 1 - 1 (1 bit)
Enumeration: DWSelect
0 : 1BIT
1-bit mode
1 : 4BIT
4-bit mode
End of enumeration elements list.
HSEN : High Speed Enable
bits : 2 - 2 (1 bit)
Enumeration: HSENSelect
0 : NORMAL
Normal Speed mode
1 : HIGH
High Speed mode
End of enumeration elements list.
DMASEL : DMA Select
bits : 3 - 4 (2 bit)
Enumeration: DMASELSelect
0 : SDMA
SDMA is selected
2 : 32BIT
32-bit Address ADMA2 is selected
End of enumeration elements list.
Power Control
address_offset : 0x29 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDBPWR : SD Bus Power
bits : 0 - 0 (1 bit)
Enumeration: SDBPWRSelect
0 : OFF
Power off
1 : ON
Power on
End of enumeration elements list.
SDBVSEL : SD Bus Voltage Select
bits : 1 - 3 (3 bit)
Enumeration: SDBVSELSelect
5 : 1V8
1.8V (Typ.)
6 : 3V0
3.0V (Typ.)
7 : 3V3
3.3V (Typ.)
End of enumeration elements list.
Power Control
address_offset : 0x29 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDBPWR : SD Bus Power
bits : 0 - 0 (1 bit)
Enumeration: SDBPWRSelect
0 : OFF
Power off
1 : ON
Power on
End of enumeration elements list.
SDBVSEL : SD Bus Voltage Select
bits : 1 - 3 (3 bit)
Enumeration: SDBVSELSelect
5 : 1V8
1.8V (Typ.)
6 : 3V0
3.0V (Typ.)
7 : 3V3
3.3V (Typ.)
End of enumeration elements list.
Block Gap Control
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STPBGR : Stop at Block Gap Request
bits : 0 - 0 (1 bit)
Enumeration: STPBGRSelect
0 : TRANSFER
Transfer
1 : STOP
Stop
End of enumeration elements list.
CONTR : Continue Request
bits : 1 - 1 (1 bit)
Enumeration: CONTRSelect
0 : GO_ON
Not affected
1 : RESTART
Restart
End of enumeration elements list.
RWCTRL : Read Wait Control
bits : 2 - 2 (1 bit)
Enumeration: RWCTRLSelect
0 : DISABLE
Disable Read Wait Control
1 : ENABLE
Enable Read Wait Control
End of enumeration elements list.
INTBG : Interrupt at Block Gap
bits : 3 - 3 (1 bit)
Enumeration: INTBGSelect
0 : DISABLED
Disabled
1 : ENABLED
Enabled
End of enumeration elements list.
Block Gap Control
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : BGCR
reset_Mask : 0x0
STPBGR : Stop at Block Gap Request
bits : 0 - 0 (1 bit)
Enumeration: STPBGRSelect
0 : TRANSFER
Transfer
1 : STOP
Stop
End of enumeration elements list.
CONTR : Continue Request
bits : 1 - 1 (1 bit)
Enumeration: CONTRSelect
0 : GO_ON
Not affected
1 : RESTART
Restart
End of enumeration elements list.
Block Gap Control
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STPBGR : Stop at Block Gap Request
bits : 0 - 0 (1 bit)
Enumeration: STPBGRSelect
0 : TRANSFER
Transfer
1 : STOP
Stop
End of enumeration elements list.
CONTR : Continue Request
bits : 1 - 1 (1 bit)
Enumeration: CONTRSelect
0 : GO_ON
Not affected
1 : RESTART
Restart
End of enumeration elements list.
RWCTRL : Read Wait Control
bits : 2 - 2 (1 bit)
Enumeration: RWCTRLSelect
0 : DISABLE
Disable Read Wait Control
1 : ENABLE
Enable Read Wait Control
End of enumeration elements list.
INTBG : Interrupt at Block Gap
bits : 3 - 3 (1 bit)
Enumeration: INTBGSelect
0 : DISABLED
Disabled
1 : ENABLED
Enabled
End of enumeration elements list.
Block Gap Control
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : BGCR
reset_Mask : 0x0
STPBGR : Stop at Block Gap Request
bits : 0 - 0 (1 bit)
Enumeration: STPBGRSelect
0 : TRANSFER
Transfer
1 : STOP
Stop
End of enumeration elements list.
CONTR : Continue Request
bits : 1 - 1 (1 bit)
Enumeration: CONTRSelect
0 : GO_ON
Not affected
1 : RESTART
Restart
End of enumeration elements list.
Wakeup Control
address_offset : 0x2B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WKENCINT : Wakeup Event Enable on Card Interrupt
bits : 0 - 0 (1 bit)
Enumeration: WKENCINTSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
WKENCINS : Wakeup Event Enable on Card Insertion
bits : 1 - 1 (1 bit)
Enumeration: WKENCINSSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
WKENCREM : Wakeup Event Enable on Card Removal
bits : 2 - 2 (1 bit)
Enumeration: WKENCREMSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
Wakeup Control
address_offset : 0x2B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WKENCINT : Wakeup Event Enable on Card Interrupt
bits : 0 - 0 (1 bit)
Enumeration: WKENCINTSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
WKENCINS : Wakeup Event Enable on Card Insertion
bits : 1 - 1 (1 bit)
Enumeration: WKENCINSSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
WKENCREM : Wakeup Event Enable on Card Removal
bits : 2 - 2 (1 bit)
Enumeration: WKENCREMSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
Preset Value n
address_offset : 0x2BE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Clock Control
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTCLKEN : Internal Clock Enable
bits : 0 - 0 (1 bit)
Enumeration: INTCLKENSelect
0 : OFF
Stop
1 : ON
Oscillate
End of enumeration elements list.
INTCLKS : Internal Clock Stable
bits : 1 - 1 (1 bit)
Enumeration: INTCLKSSelect
0 : NOT_READY
Not Ready
1 : READY
Ready
End of enumeration elements list.
SDCLKEN : SD Clock Enable
bits : 2 - 2 (1 bit)
Enumeration: SDCLKENSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
CLKGSEL : Clock Generator Select
bits : 5 - 5 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Divided Clock Mode
1 : PROG
Programmable Clock Mode
End of enumeration elements list.
USDCLKFSEL : Upper Bits of SDCLK Frequency Select
bits : 6 - 7 (2 bit)
SDCLKFSEL : SDCLK Frequency Select
bits : 8 - 15 (8 bit)
Clock Control
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTCLKEN : Internal Clock Enable
bits : 0 - 0 (1 bit)
Enumeration: INTCLKENSelect
0 : OFF
Stop
1 : ON
Oscillate
End of enumeration elements list.
INTCLKS : Internal Clock Stable
bits : 1 - 1 (1 bit)
Enumeration: INTCLKSSelect
0 : NOT_READY
Not Ready
1 : READY
Ready
End of enumeration elements list.
SDCLKEN : SD Clock Enable
bits : 2 - 2 (1 bit)
Enumeration: SDCLKENSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
CLKGSEL : Clock Generator Select
bits : 5 - 5 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Divided Clock Mode
1 : PROG
Programmable Clock Mode
End of enumeration elements list.
USDCLKFSEL : Upper Bits of SDCLK Frequency Select
bits : 6 - 7 (2 bit)
SDCLKFSEL : SDCLK Frequency Select
bits : 8 - 15 (8 bit)
Timeout Control
address_offset : 0x2E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DTCVAL : Data Timeout Counter Value
bits : 0 - 3 (4 bit)
Timeout Control
address_offset : 0x2E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DTCVAL : Data Timeout Counter Value
bits : 0 - 3 (4 bit)
Software Reset
address_offset : 0x2F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRSTALL : Software Reset For All
bits : 0 - 0 (1 bit)
Enumeration: SWRSTALLSelect
0 : WORK
Work
1 : RESET
Reset
End of enumeration elements list.
SWRSTCMD : Software Reset For CMD Line
bits : 1 - 1 (1 bit)
Enumeration: SWRSTCMDSelect
0 : WORK
Work
1 : RESET
Reset
End of enumeration elements list.
SWRSTDAT : Software Reset For DAT Line
bits : 2 - 2 (1 bit)
Enumeration: SWRSTDATSelect
0 : WORK
Work
1 : RESET
Reset
End of enumeration elements list.
Software Reset
address_offset : 0x2F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRSTALL : Software Reset For All
bits : 0 - 0 (1 bit)
Enumeration: SWRSTALLSelect
0 : WORK
Work
1 : RESET
Reset
End of enumeration elements list.
SWRSTCMD : Software Reset For CMD Line
bits : 1 - 1 (1 bit)
Enumeration: SWRSTCMDSelect
0 : WORK
Work
1 : RESET
Reset
End of enumeration elements list.
SWRSTDAT : Software Reset For DAT Line
bits : 2 - 2 (1 bit)
Enumeration: SWRSTDATSelect
0 : WORK
Work
1 : RESET
Reset
End of enumeration elements list.
Normal Interrupt Status
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDC : Command Complete
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : NO
No command complete
1 : YES
Command complete
End of enumeration elements list.
TRFC : Transfer Complete
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : NO
Not complete
1 : YES
Command execution is completed
End of enumeration elements list.
BLKGE : Block Gap Event
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : NO
No Block Gap Event
1 : STOP
Transaction stopped at block gap
End of enumeration elements list.
DMAINT : DMA Interrupt
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : NO
No DMA Interrupt
1 : YES
DMA Interrupt is generated
End of enumeration elements list.
BWRRDY : Buffer Write Ready
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : NO
Not ready to write buffer
1 : YES
Ready to write buffer
End of enumeration elements list.
BRDRDY : Buffer Read Ready
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : NO
Not ready to read buffer
1 : YES
Ready to read buffer
End of enumeration elements list.
CINS : Card Insertion
bits : 6 - 6 (1 bit)
Enumeration: CINSSelect
0 : NO
Card state stable or Debouncing
1 : YES
Card inserted
End of enumeration elements list.
CREM : Card Removal
bits : 7 - 7 (1 bit)
Enumeration: CREMSelect
0 : NO
Card state stable or Debouncing
1 : YES
Card Removed
End of enumeration elements list.
CINT : Card Interrupt
bits : 8 - 8 (1 bit)
Enumeration: CINTSelect
0 : NO
No Card Interrupt
1 : YES
Generate Card Interrupt
End of enumeration elements list.
ERRINT : Error Interrupt
bits : 15 - 15 (1 bit)
Enumeration: ERRINTSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
Normal Interrupt Status
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : NISTR
reset_Mask : 0x0
CMDC : Command Complete
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : NO
No command complete
1 : YES
Command complete
End of enumeration elements list.
TRFC : Transfer Complete
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : NO
Not complete
1 : YES
Command execution is completed
End of enumeration elements list.
BLKGE : Block Gap Event
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : NO
No Block Gap Event
1 : STOP
Transaction stopped at block gap
End of enumeration elements list.
DMAINT : DMA Interrupt
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : NO
No DMA Interrupt
1 : YES
DMA Interrupt is generated
End of enumeration elements list.
BWRRDY : Buffer Write Ready
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : NO
Not ready to write buffer
1 : YES
Ready to write buffer
End of enumeration elements list.
BRDRDY : Buffer Read Ready
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : NO
Not ready to read buffer
1 : YES
Ready to read buffer
End of enumeration elements list.
BOOTAR : Boot Acknowledge Received
bits : 14 - 14 (1 bit)
ERRINT : Error Interrupt
bits : 15 - 15 (1 bit)
Enumeration: ERRINTSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
Normal Interrupt Status
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDC : Command Complete
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : NO
No command complete
1 : YES
Command complete
End of enumeration elements list.
TRFC : Transfer Complete
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : NO
Not complete
1 : YES
Command execution is completed
End of enumeration elements list.
BLKGE : Block Gap Event
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : NO
No Block Gap Event
1 : STOP
Transaction stopped at block gap
End of enumeration elements list.
DMAINT : DMA Interrupt
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : NO
No DMA Interrupt
1 : YES
DMA Interrupt is generated
End of enumeration elements list.
BWRRDY : Buffer Write Ready
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : NO
Not ready to write buffer
1 : YES
Ready to write buffer
End of enumeration elements list.
BRDRDY : Buffer Read Ready
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : NO
Not ready to read buffer
1 : YES
Ready to read buffer
End of enumeration elements list.
CINS : Card Insertion
bits : 6 - 6 (1 bit)
Enumeration: CINSSelect
0 : NO
Card state stable or Debouncing
1 : YES
Card inserted
End of enumeration elements list.
CREM : Card Removal
bits : 7 - 7 (1 bit)
Enumeration: CREMSelect
0 : NO
Card state stable or Debouncing
1 : YES
Card Removed
End of enumeration elements list.
CINT : Card Interrupt
bits : 8 - 8 (1 bit)
Enumeration: CINTSelect
0 : NO
No Card Interrupt
1 : YES
Generate Card Interrupt
End of enumeration elements list.
ERRINT : Error Interrupt
bits : 15 - 15 (1 bit)
Enumeration: ERRINTSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
Normal Interrupt Status
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : NISTR
reset_Mask : 0x0
CMDC : Command Complete
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : NO
No command complete
1 : YES
Command complete
End of enumeration elements list.
TRFC : Transfer Complete
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : NO
Not complete
1 : YES
Command execution is completed
End of enumeration elements list.
BLKGE : Block Gap Event
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : NO
No Block Gap Event
1 : STOP
Transaction stopped at block gap
End of enumeration elements list.
DMAINT : DMA Interrupt
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : NO
No DMA Interrupt
1 : YES
DMA Interrupt is generated
End of enumeration elements list.
BWRRDY : Buffer Write Ready
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : NO
Not ready to write buffer
1 : YES
Ready to write buffer
End of enumeration elements list.
BRDRDY : Buffer Read Ready
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : NO
Not ready to read buffer
1 : YES
Ready to read buffer
End of enumeration elements list.
BOOTAR : Boot Acknowledge Received
bits : 14 - 14 (1 bit)
ERRINT : Error Interrupt
bits : 15 - 15 (1 bit)
Enumeration: ERRINTSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
Error Interrupt Status
address_offset : 0x32 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDTEO : Command Timeout Error
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : NO
No Error
1 : YES
Timeout
End of enumeration elements list.
CMDCRC : Command CRC Error
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : NO
No Error
1 : YES
CRC Error Generated
End of enumeration elements list.
CMDEND : Command End Bit Error
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : NO
No error
1 : YES
End Bit Error Generated
End of enumeration elements list.
CMDIDX : Command Index Error
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
DATTEO : Data Timeout Error
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : NO
No Error
1 : YES
Timeout
End of enumeration elements list.
DATCRC : Data CRC Error
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
DATEND : Data End Bit Error
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
CURLIM : Current Limit Error
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : NO
No Error
1 : YES
Power Fail
End of enumeration elements list.
ACMD : Auto CMD Error
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
ADMA : ADMA Error
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
Error Interrupt Status
address_offset : 0x32 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : EISTR
reset_Mask : 0x0
CMDTEO : Command Timeout Error
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : NO
No Error
1 : YES
Timeout
End of enumeration elements list.
CMDCRC : Command CRC Error
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : NO
No Error
1 : YES
CRC Error Generated
End of enumeration elements list.
CMDEND : Command End Bit Error
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : NO
No error
1 : YES
End Bit Error Generated
End of enumeration elements list.
CMDIDX : Command Index Error
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
DATTEO : Data Timeout Error
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : NO
No Error
1 : YES
Timeout
End of enumeration elements list.
DATCRC : Data CRC Error
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
DATEND : Data End Bit Error
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
CURLIM : Current Limit Error
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : NO
No Error
1 : YES
Power Fail
End of enumeration elements list.
ACMD : Auto CMD Error
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
ADMA : ADMA Error
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
BOOTAE : Boot Acknowledge Error
bits : 12 - 12 (1 bit)
Enumeration: BOOTAESelect
0 : 0
FIFO contains at least one byte
1 : 1
FIFO is empty
End of enumeration elements list.
Error Interrupt Status
address_offset : 0x32 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDTEO : Command Timeout Error
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : NO
No Error
1 : YES
Timeout
End of enumeration elements list.
CMDCRC : Command CRC Error
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : NO
No Error
1 : YES
CRC Error Generated
End of enumeration elements list.
CMDEND : Command End Bit Error
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : NO
No error
1 : YES
End Bit Error Generated
End of enumeration elements list.
CMDIDX : Command Index Error
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
DATTEO : Data Timeout Error
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : NO
No Error
1 : YES
Timeout
End of enumeration elements list.
DATCRC : Data CRC Error
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
DATEND : Data End Bit Error
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
CURLIM : Current Limit Error
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : NO
No Error
1 : YES
Power Fail
End of enumeration elements list.
ACMD : Auto CMD Error
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
ADMA : ADMA Error
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
Error Interrupt Status
address_offset : 0x32 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : EISTR
reset_Mask : 0x0
CMDTEO : Command Timeout Error
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : NO
No Error
1 : YES
Timeout
End of enumeration elements list.
CMDCRC : Command CRC Error
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : NO
No Error
1 : YES
CRC Error Generated
End of enumeration elements list.
CMDEND : Command End Bit Error
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : NO
No error
1 : YES
End Bit Error Generated
End of enumeration elements list.
CMDIDX : Command Index Error
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
DATTEO : Data Timeout Error
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : NO
No Error
1 : YES
Timeout
End of enumeration elements list.
DATCRC : Data CRC Error
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
DATEND : Data End Bit Error
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
CURLIM : Current Limit Error
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : NO
No Error
1 : YES
Power Fail
End of enumeration elements list.
ACMD : Auto CMD Error
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
ADMA : ADMA Error
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
BOOTAE : Boot Acknowledge Error
bits : 12 - 12 (1 bit)
Enumeration: BOOTAESelect
0 : 0
FIFO contains at least one byte
1 : 1
FIFO is empty
End of enumeration elements list.
Preset Value n
address_offset : 0x32A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Response
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMDRESP : Command Response
bits : 0 - 31 (32 bit)
Normal Interrupt Status Enable
address_offset : 0x34 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDC : Command Complete Status Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
TRFC : Transfer Complete Status Enable
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BLKGE : Block Gap Event Status Enable
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DMAINT : DMA Interrupt Status Enable
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BWRRDY : Buffer Write Ready Status Enable
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BRDRDY : Buffer Read Ready Status Enable
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CINS : Card Insertion Status Enable
bits : 6 - 6 (1 bit)
Enumeration: CINSSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CREM : Card Removal Status Enable
bits : 7 - 7 (1 bit)
Enumeration: CREMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CINT : Card Interrupt Status Enable
bits : 8 - 8 (1 bit)
Enumeration: CINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
Normal Interrupt Status Enable
address_offset : 0x34 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : NISTER
reset_Mask : 0x0
CMDC : Command Complete Status Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
TRFC : Transfer Complete Status Enable
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BLKGE : Block Gap Event Status Enable
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DMAINT : DMA Interrupt Status Enable
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BWRRDY : Buffer Write Ready Status Enable
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BRDRDY : Buffer Read Ready Status Enable
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BOOTAR : Boot Acknowledge Received Status Enable
bits : 14 - 14 (1 bit)
Normal Interrupt Status Enable
address_offset : 0x34 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDC : Command Complete Status Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
TRFC : Transfer Complete Status Enable
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BLKGE : Block Gap Event Status Enable
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DMAINT : DMA Interrupt Status Enable
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BWRRDY : Buffer Write Ready Status Enable
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BRDRDY : Buffer Read Ready Status Enable
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CINS : Card Insertion Status Enable
bits : 6 - 6 (1 bit)
Enumeration: CINSSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CREM : Card Removal Status Enable
bits : 7 - 7 (1 bit)
Enumeration: CREMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CINT : Card Interrupt Status Enable
bits : 8 - 8 (1 bit)
Enumeration: CINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
Normal Interrupt Status Enable
address_offset : 0x34 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : NISTER
reset_Mask : 0x0
CMDC : Command Complete Status Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
TRFC : Transfer Complete Status Enable
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BLKGE : Block Gap Event Status Enable
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DMAINT : DMA Interrupt Status Enable
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BWRRDY : Buffer Write Ready Status Enable
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BRDRDY : Buffer Read Ready Status Enable
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BOOTAR : Boot Acknowledge Received Status Enable
bits : 14 - 14 (1 bit)
Error Interrupt Status Enable
address_offset : 0x36 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDTEO : Command Timeout Error Status Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDCRC : Command CRC Error Status Enable
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDEND : Command End Bit Error Status Enable
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDIDX : Command Index Error Status Enable
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATTEO : Data Timeout Error Status Enable
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATCRC : Data CRC Error Status Enable
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATEND : Data End Bit Error Status Enable
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CURLIM : Current Limit Error Status Enable
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ACMD : Auto CMD Error Status Enable
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ADMA : ADMA Error Status Enable
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
Error Interrupt Status Enable
address_offset : 0x36 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : EISTER
reset_Mask : 0x0
CMDTEO : Command Timeout Error Status Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDCRC : Command CRC Error Status Enable
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDEND : Command End Bit Error Status Enable
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDIDX : Command Index Error Status Enable
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATTEO : Data Timeout Error Status Enable
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATCRC : Data CRC Error Status Enable
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATEND : Data End Bit Error Status Enable
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CURLIM : Current Limit Error Status Enable
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ACMD : Auto CMD Error Status Enable
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ADMA : ADMA Error Status Enable
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BOOTAE : Boot Acknowledge Error Status Enable
bits : 12 - 12 (1 bit)
Error Interrupt Status Enable
address_offset : 0x36 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDTEO : Command Timeout Error Status Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDCRC : Command CRC Error Status Enable
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDEND : Command End Bit Error Status Enable
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDIDX : Command Index Error Status Enable
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATTEO : Data Timeout Error Status Enable
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATCRC : Data CRC Error Status Enable
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATEND : Data End Bit Error Status Enable
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CURLIM : Current Limit Error Status Enable
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ACMD : Auto CMD Error Status Enable
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ADMA : ADMA Error Status Enable
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
Error Interrupt Status Enable
address_offset : 0x36 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : EISTER
reset_Mask : 0x0
CMDTEO : Command Timeout Error Status Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDCRC : Command CRC Error Status Enable
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDEND : Command End Bit Error Status Enable
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDIDX : Command Index Error Status Enable
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATTEO : Data Timeout Error Status Enable
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATCRC : Data CRC Error Status Enable
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATEND : Data End Bit Error Status Enable
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CURLIM : Current Limit Error Status Enable
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ACMD : Auto CMD Error Status Enable
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ADMA : ADMA Error Status Enable
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BOOTAE : Boot Acknowledge Error Status Enable
bits : 12 - 12 (1 bit)
Normal Interrupt Signal Enable
address_offset : 0x38 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDC : Command Complete Signal Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
TRFC : Transfer Complete Signal Enable
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BLKGE : Block Gap Event Signal Enable
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DMAINT : DMA Interrupt Signal Enable
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BWRRDY : Buffer Write Ready Signal Enable
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BRDRDY : Buffer Read Ready Signal Enable
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CINS : Card Insertion Signal Enable
bits : 6 - 6 (1 bit)
Enumeration: CINSSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CREM : Card Removal Signal Enable
bits : 7 - 7 (1 bit)
Enumeration: CREMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CINT : Card Interrupt Signal Enable
bits : 8 - 8 (1 bit)
Enumeration: CINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
Normal Interrupt Signal Enable
address_offset : 0x38 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : NISIER
reset_Mask : 0x0
CMDC : Command Complete Signal Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
TRFC : Transfer Complete Signal Enable
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BLKGE : Block Gap Event Signal Enable
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DMAINT : DMA Interrupt Signal Enable
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BWRRDY : Buffer Write Ready Signal Enable
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BRDRDY : Buffer Read Ready Signal Enable
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BOOTAR : Boot Acknowledge Received Signal Enable
bits : 14 - 14 (1 bit)
Normal Interrupt Signal Enable
address_offset : 0x38 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDC : Command Complete Signal Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
TRFC : Transfer Complete Signal Enable
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BLKGE : Block Gap Event Signal Enable
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DMAINT : DMA Interrupt Signal Enable
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BWRRDY : Buffer Write Ready Signal Enable
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BRDRDY : Buffer Read Ready Signal Enable
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CINS : Card Insertion Signal Enable
bits : 6 - 6 (1 bit)
Enumeration: CINSSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CREM : Card Removal Signal Enable
bits : 7 - 7 (1 bit)
Enumeration: CREMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CINT : Card Interrupt Signal Enable
bits : 8 - 8 (1 bit)
Enumeration: CINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
Normal Interrupt Signal Enable
address_offset : 0x38 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : NISIER
reset_Mask : 0x0
CMDC : Command Complete Signal Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
TRFC : Transfer Complete Signal Enable
bits : 1 - 1 (1 bit)
Enumeration: TRFCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BLKGE : Block Gap Event Signal Enable
bits : 2 - 2 (1 bit)
Enumeration: BLKGESelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DMAINT : DMA Interrupt Signal Enable
bits : 3 - 3 (1 bit)
Enumeration: DMAINTSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BWRRDY : Buffer Write Ready Signal Enable
bits : 4 - 4 (1 bit)
Enumeration: BWRRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BRDRDY : Buffer Read Ready Signal Enable
bits : 5 - 5 (1 bit)
Enumeration: BRDRDYSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BOOTAR : Boot Acknowledge Received Signal Enable
bits : 14 - 14 (1 bit)
Preset Value n
address_offset : 0x398 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Error Interrupt Signal Enable
address_offset : 0x3A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDTEO : Command Timeout Error Signal Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDCRC : Command CRC Error Signal Enable
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDEND : Command End Bit Error Signal Enable
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDIDX : Command Index Error Signal Enable
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATTEO : Data Timeout Error Signal Enable
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATCRC : Data CRC Error Signal Enable
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATEND : Data End Bit Error Signal Enable
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CURLIM : Current Limit Error Signal Enable
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ACMD : Auto CMD Error Signal Enable
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ADMA : ADMA Error Signal Enable
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
Error Interrupt Signal Enable
address_offset : 0x3A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : EISIER
reset_Mask : 0x0
CMDTEO : Command Timeout Error Signal Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDCRC : Command CRC Error Signal Enable
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDEND : Command End Bit Error Signal Enable
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDIDX : Command Index Error Signal Enable
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATTEO : Data Timeout Error Signal Enable
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATCRC : Data CRC Error Signal Enable
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATEND : Data End Bit Error Signal Enable
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CURLIM : Current Limit Error Signal Enable
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ACMD : Auto CMD Error Signal Enable
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ADMA : ADMA Error Signal Enable
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BOOTAE : Boot Acknowledge Error Signal Enable
bits : 12 - 12 (1 bit)
Error Interrupt Signal Enable
address_offset : 0x3A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDTEO : Command Timeout Error Signal Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDCRC : Command CRC Error Signal Enable
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDEND : Command End Bit Error Signal Enable
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDIDX : Command Index Error Signal Enable
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATTEO : Data Timeout Error Signal Enable
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATCRC : Data CRC Error Signal Enable
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATEND : Data End Bit Error Signal Enable
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CURLIM : Current Limit Error Signal Enable
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ACMD : Auto CMD Error Signal Enable
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ADMA : ADMA Error Signal Enable
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
Error Interrupt Signal Enable
address_offset : 0x3A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : EISIER
reset_Mask : 0x0
CMDTEO : Command Timeout Error Signal Enable
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDCRC : Command CRC Error Signal Enable
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDEND : Command End Bit Error Signal Enable
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CMDIDX : Command Index Error Signal Enable
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATTEO : Data Timeout Error Signal Enable
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATCRC : Data CRC Error Signal Enable
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
DATEND : Data End Bit Error Signal Enable
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
CURLIM : Current Limit Error Signal Enable
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ACMD : Auto CMD Error Signal Enable
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
ADMA : ADMA Error Signal Enable
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : MASKED
Masked
1 : ENABLED
Enabled
End of enumeration elements list.
BOOTAE : Boot Acknowledge Error Signal Enable
bits : 12 - 12 (1 bit)
Auto CMD Error Status
address_offset : 0x3C Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ACMD12NE : Auto CMD12 Not Executed
bits : 0 - 0 (1 bit)
Enumeration: ACMD12NESelect
0 : EXEC
Executed
1 : NOT_EXEC
Not executed
End of enumeration elements list.
ACMDTEO : Auto CMD Timeout Error
bits : 1 - 1 (1 bit)
Enumeration: ACMDTEOSelect
0 : NO
No error
1 : YES
Timeout
End of enumeration elements list.
ACMDCRC : Auto CMD CRC Error
bits : 2 - 2 (1 bit)
Enumeration: ACMDCRCSelect
0 : NO
No error
1 : YES
CRC Error Generated
End of enumeration elements list.
ACMDEND : Auto CMD End Bit Error
bits : 3 - 3 (1 bit)
Enumeration: ACMDENDSelect
0 : NO
No error
1 : YES
End Bit Error Generated
End of enumeration elements list.
ACMDIDX : Auto CMD Index Error
bits : 4 - 4 (1 bit)
Enumeration: ACMDIDXSelect
0 : NO
No error
1 : YES
Error
End of enumeration elements list.
CMDNI : Command not Issued By Auto CMD12 Error
bits : 7 - 7 (1 bit)
Enumeration: CMDNISelect
0 : OK
No error
1 : NOT_ISSUED
Not Issued
End of enumeration elements list.
Auto CMD Error Status
address_offset : 0x3C Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ACMD12NE : Auto CMD12 Not Executed
bits : 0 - 0 (1 bit)
Enumeration: ACMD12NESelect
0 : EXEC
Executed
1 : NOT_EXEC
Not executed
End of enumeration elements list.
ACMDTEO : Auto CMD Timeout Error
bits : 1 - 1 (1 bit)
Enumeration: ACMDTEOSelect
0 : NO
No error
1 : YES
Timeout
End of enumeration elements list.
ACMDCRC : Auto CMD CRC Error
bits : 2 - 2 (1 bit)
Enumeration: ACMDCRCSelect
0 : NO
No error
1 : YES
CRC Error Generated
End of enumeration elements list.
ACMDEND : Auto CMD End Bit Error
bits : 3 - 3 (1 bit)
Enumeration: ACMDENDSelect
0 : NO
No error
1 : YES
End Bit Error Generated
End of enumeration elements list.
ACMDIDX : Auto CMD Index Error
bits : 4 - 4 (1 bit)
Enumeration: ACMDIDXSelect
0 : NO
No error
1 : YES
Error
End of enumeration elements list.
CMDNI : Command not Issued By Auto CMD12 Error
bits : 7 - 7 (1 bit)
Enumeration: CMDNISelect
0 : OK
No error
1 : NOT_ISSUED
Not Issued
End of enumeration elements list.
Host Control 2
address_offset : 0x3E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UHSMS : UHS Mode Select
bits : 0 - 2 (3 bit)
Enumeration: UHSMSSelect
0 : SDR12
SDR12
1 : SDR25
SDR25
2 : SDR50
SDR50
3 : SDR104
SDR104
4 : DDR50
DDR50
End of enumeration elements list.
VS18EN : 1.8V Signaling Enable
bits : 3 - 3 (1 bit)
Enumeration: VS18ENSelect
0 : S33V
3.3V Signaling
1 : S18V
1.8V Signaling
End of enumeration elements list.
DRVSEL : Driver Strength Select
bits : 4 - 5 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected (Default)
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
EXTUN : Execute Tuning
bits : 6 - 6 (1 bit)
Enumeration: EXTUNSelect
0 : NO
Not Tuned or Tuning Completed
1 : REQUESTED
Execute Tuning
End of enumeration elements list.
SLCKSEL : Sampling Clock Select
bits : 7 - 7 (1 bit)
Enumeration: SLCKSELSelect
0 : FIXED
Fixed clock is used to sample data
1 : TUNED
Tuned clock is used to sample data
End of enumeration elements list.
ASINTEN : Asynchronous Interrupt Enable
bits : 14 - 14 (1 bit)
Enumeration: ASINTENSelect
0 : DISABLED
Disabled
1 : ENABLED
Enabled
End of enumeration elements list.
PVALEN : Preset Value Enable
bits : 15 - 15 (1 bit)
Enumeration: PVALENSelect
0 : HOST
SDCLK and Driver Strength are controlled by Host Controller
1 : AUTO
Automatic Selection by Preset Value is Enabled
End of enumeration elements list.
Host Control 2
address_offset : 0x3E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : HC2R
reset_Mask : 0x0
HS200EN : HS200 Mode Enable
bits : 0 - 3 (4 bit)
Enumeration: HS200ENSelect
0 : SDR12
SDR12
1 : SDR25
SDR25
2 : SDR50
SDR50
3 : SDR104
SDR104
4 : DDR50
DDR50
End of enumeration elements list.
DRVSEL : Driver Strength Select
bits : 4 - 5 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected (Default)
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
EXTUN : Execute Tuning
bits : 6 - 6 (1 bit)
Enumeration: EXTUNSelect
0 : NO
Not Tuned or Tuning Completed
1 : REQUESTED
Execute Tuning
End of enumeration elements list.
SLCKSEL : Sampling Clock Select
bits : 7 - 7 (1 bit)
Enumeration: SLCKSELSelect
0 : FIXED
Fixed clock is used to sample data
1 : TUNED
Tuned clock is used to sample data
End of enumeration elements list.
PVALEN : Preset Value Enable
bits : 15 - 15 (1 bit)
Enumeration: PVALENSelect
0 : HOST
SDCLK and Driver Strength are controlled by Host Controller
1 : AUTO
Automatic Selection by Preset Value is Enabled
End of enumeration elements list.
Host Control 2
address_offset : 0x3E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UHSMS : UHS Mode Select
bits : 0 - 2 (3 bit)
Enumeration: UHSMSSelect
0 : SDR12
SDR12
1 : SDR25
SDR25
2 : SDR50
SDR50
3 : SDR104
SDR104
4 : DDR50
DDR50
End of enumeration elements list.
VS18EN : 1.8V Signaling Enable
bits : 3 - 3 (1 bit)
Enumeration: VS18ENSelect
0 : S33V
3.3V Signaling
1 : S18V
1.8V Signaling
End of enumeration elements list.
DRVSEL : Driver Strength Select
bits : 4 - 5 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected (Default)
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
EXTUN : Execute Tuning
bits : 6 - 6 (1 bit)
Enumeration: EXTUNSelect
0 : NO
Not Tuned or Tuning Completed
1 : REQUESTED
Execute Tuning
End of enumeration elements list.
SLCKSEL : Sampling Clock Select
bits : 7 - 7 (1 bit)
Enumeration: SLCKSELSelect
0 : FIXED
Fixed clock is used to sample data
1 : TUNED
Tuned clock is used to sample data
End of enumeration elements list.
ASINTEN : Asynchronous Interrupt Enable
bits : 14 - 14 (1 bit)
Enumeration: ASINTENSelect
0 : DISABLED
Disabled
1 : ENABLED
Enabled
End of enumeration elements list.
PVALEN : Preset Value Enable
bits : 15 - 15 (1 bit)
Enumeration: PVALENSelect
0 : HOST
SDCLK and Driver Strength are controlled by Host Controller
1 : AUTO
Automatic Selection by Preset Value is Enabled
End of enumeration elements list.
Host Control 2
address_offset : 0x3E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : HC2R
reset_Mask : 0x0
HS200EN : HS200 Mode Enable
bits : 0 - 3 (4 bit)
Enumeration: HS200ENSelect
0 : SDR12
SDR12
1 : SDR25
SDR25
2 : SDR50
SDR50
3 : SDR104
SDR104
4 : DDR50
DDR50
End of enumeration elements list.
DRVSEL : Driver Strength Select
bits : 4 - 5 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected (Default)
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
EXTUN : Execute Tuning
bits : 6 - 6 (1 bit)
Enumeration: EXTUNSelect
0 : NO
Not Tuned or Tuning Completed
1 : REQUESTED
Execute Tuning
End of enumeration elements list.
SLCKSEL : Sampling Clock Select
bits : 7 - 7 (1 bit)
Enumeration: SLCKSELSelect
0 : FIXED
Fixed clock is used to sample data
1 : TUNED
Tuned clock is used to sample data
End of enumeration elements list.
PVALEN : Preset Value Enable
bits : 15 - 15 (1 bit)
Enumeration: PVALENSelect
0 : HOST
SDCLK and Driver Strength are controlled by Host Controller
1 : AUTO
Automatic Selection by Preset Value is Enabled
End of enumeration elements list.
Block Size
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BLOCKSIZE : Transfer Block Size
bits : 0 - 9 (10 bit)
BOUNDARY : SDMA Buffer Boundary
bits : 12 - 14 (3 bit)
Enumeration: BOUNDARYSelect
0 : 4K
4k bytes
1 : 8K
8k bytes
2 : 16K
16k bytes
3 : 32K
32k bytes
4 : 64K
64k bytes
5 : 128K
128k bytes
6 : 256K
256k bytes
7 : 512K
512k bytes
End of enumeration elements list.
Block Size
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BLOCKSIZE : Transfer Block Size
bits : 0 - 9 (10 bit)
BOUNDARY : SDMA Buffer Boundary
bits : 12 - 14 (3 bit)
Enumeration: BOUNDARYSelect
0 : 4K
4k bytes
1 : 8K
8k bytes
2 : 16K
16k bytes
3 : 32K
32k bytes
4 : 64K
64k bytes
5 : 128K
128k bytes
6 : 256K
256k bytes
7 : 512K
512k bytes
End of enumeration elements list.
Capabilities 0
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TEOCLKF : Timeout Clock Frequency
bits : 0 - 5 (6 bit)
Enumeration: TEOCLKFSelect
0 : OTHER
Get information via another method
End of enumeration elements list.
TEOCLKU : Timeout Clock Unit
bits : 7 - 7 (1 bit)
Enumeration: TEOCLKUSelect
0 : KHZ
KHz
1 : MHZ
MHz
End of enumeration elements list.
BASECLKF : Base Clock Frequency
bits : 8 - 15 (8 bit)
Enumeration: BASECLKFSelect
0 : OTHER
Get information via another method
End of enumeration elements list.
MAXBLKL : Max Block Length
bits : 16 - 17 (2 bit)
Enumeration: MAXBLKLSelect
0 : 512
512 bytes
1 : 1024
1024 bytes
2 : 2048
2048 bytes
End of enumeration elements list.
ED8SUP : 8-bit Support for Embedded Device
bits : 18 - 18 (1 bit)
Enumeration: ED8SUPSelect
0 : NO
8-bit Bus Width not Supported
1 : YES
8-bit Bus Width Supported
End of enumeration elements list.
ADMA2SUP : ADMA2 Support
bits : 19 - 19 (1 bit)
Enumeration: ADMA2SUPSelect
0 : NO
ADMA2 not Supported
1 : YES
ADMA2 Supported
End of enumeration elements list.
HSSUP : High Speed Support
bits : 21 - 21 (1 bit)
Enumeration: HSSUPSelect
0 : NO
High Speed not Supported
1 : YES
High Speed Supported
End of enumeration elements list.
SDMASUP : SDMA Support
bits : 22 - 22 (1 bit)
Enumeration: SDMASUPSelect
0 : NO
SDMA not Supported
1 : YES
SDMA Supported
End of enumeration elements list.
SRSUP : Suspend/Resume Support
bits : 23 - 23 (1 bit)
Enumeration: SRSUPSelect
0 : NO
Suspend/Resume not Supported
1 : YES
Suspend/Resume Supported
End of enumeration elements list.
V33VSUP : Voltage Support 3.3V
bits : 24 - 24 (1 bit)
Enumeration: V33VSUPSelect
0 : NO
3.3V Not Supported
1 : YES
3.3V Supported
End of enumeration elements list.
V30VSUP : Voltage Support 3.0V
bits : 25 - 25 (1 bit)
Enumeration: V30VSUPSelect
0 : NO
3.0V Not Supported
1 : YES
3.0V Supported
End of enumeration elements list.
V18VSUP : Voltage Support 1.8V
bits : 26 - 26 (1 bit)
Enumeration: V18VSUPSelect
0 : NO
1.8V Not Supported
1 : YES
1.8V Supported
End of enumeration elements list.
SB64SUP : 64-Bit System Bus Support
bits : 28 - 28 (1 bit)
Enumeration: SB64SUPSelect
0 : NO
32-bit Address Descriptors and System Bus
1 : YES
64-bit Address Descriptors and System Bus
End of enumeration elements list.
ASINTSUP : Asynchronous Interrupt Support
bits : 29 - 29 (1 bit)
Enumeration: ASINTSUPSelect
0 : NO
Asynchronous Interrupt not Supported
1 : YES
Asynchronous Interrupt supported
End of enumeration elements list.
SLTYPE : Slot Type
bits : 30 - 31 (2 bit)
Enumeration: SLTYPESelect
0 : REMOVABLE
Removable Card Slot
1 : EMBEDDED
Embedded Slot for One Device
End of enumeration elements list.
Capabilities 0
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TEOCLKF : Timeout Clock Frequency
bits : 0 - 5 (6 bit)
Enumeration: TEOCLKFSelect
0 : OTHER
Get information via another method
End of enumeration elements list.
TEOCLKU : Timeout Clock Unit
bits : 7 - 7 (1 bit)
Enumeration: TEOCLKUSelect
0 : KHZ
KHz
1 : MHZ
MHz
End of enumeration elements list.
BASECLKF : Base Clock Frequency
bits : 8 - 15 (8 bit)
Enumeration: BASECLKFSelect
0 : OTHER
Get information via another method
End of enumeration elements list.
MAXBLKL : Max Block Length
bits : 16 - 17 (2 bit)
Enumeration: MAXBLKLSelect
0 : 512
512 bytes
1 : 1024
1024 bytes
2 : 2048
2048 bytes
End of enumeration elements list.
ED8SUP : 8-bit Support for Embedded Device
bits : 18 - 18 (1 bit)
Enumeration: ED8SUPSelect
0 : NO
8-bit Bus Width not Supported
1 : YES
8-bit Bus Width Supported
End of enumeration elements list.
ADMA2SUP : ADMA2 Support
bits : 19 - 19 (1 bit)
Enumeration: ADMA2SUPSelect
0 : NO
ADMA2 not Supported
1 : YES
ADMA2 Supported
End of enumeration elements list.
HSSUP : High Speed Support
bits : 21 - 21 (1 bit)
Enumeration: HSSUPSelect
0 : NO
High Speed not Supported
1 : YES
High Speed Supported
End of enumeration elements list.
SDMASUP : SDMA Support
bits : 22 - 22 (1 bit)
Enumeration: SDMASUPSelect
0 : NO
SDMA not Supported
1 : YES
SDMA Supported
End of enumeration elements list.
SRSUP : Suspend/Resume Support
bits : 23 - 23 (1 bit)
Enumeration: SRSUPSelect
0 : NO
Suspend/Resume not Supported
1 : YES
Suspend/Resume Supported
End of enumeration elements list.
V33VSUP : Voltage Support 3.3V
bits : 24 - 24 (1 bit)
Enumeration: V33VSUPSelect
0 : NO
3.3V Not Supported
1 : YES
3.3V Supported
End of enumeration elements list.
V30VSUP : Voltage Support 3.0V
bits : 25 - 25 (1 bit)
Enumeration: V30VSUPSelect
0 : NO
3.0V Not Supported
1 : YES
3.0V Supported
End of enumeration elements list.
V18VSUP : Voltage Support 1.8V
bits : 26 - 26 (1 bit)
Enumeration: V18VSUPSelect
0 : NO
1.8V Not Supported
1 : YES
1.8V Supported
End of enumeration elements list.
SB64SUP : 64-Bit System Bus Support
bits : 28 - 28 (1 bit)
Enumeration: SB64SUPSelect
0 : NO
32-bit Address Descriptors and System Bus
1 : YES
64-bit Address Descriptors and System Bus
End of enumeration elements list.
ASINTSUP : Asynchronous Interrupt Support
bits : 29 - 29 (1 bit)
Enumeration: ASINTSUPSelect
0 : NO
Asynchronous Interrupt not Supported
1 : YES
Asynchronous Interrupt supported
End of enumeration elements list.
SLTYPE : Slot Type
bits : 30 - 31 (2 bit)
Enumeration: SLTYPESelect
0 : REMOVABLE
Removable Card Slot
1 : EMBEDDED
Embedded Slot for One Device
End of enumeration elements list.
Capabilities 1
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SDR50SUP : SDR50 Support
bits : 0 - 0 (1 bit)
Enumeration: SDR50SUPSelect
0 : NO
SDR50 is Not Supported
1 : YES
SDR50 is Supported
End of enumeration elements list.
SDR104SUP : SDR104 Support
bits : 1 - 1 (1 bit)
Enumeration: SDR104SUPSelect
0 : NO
SDR104 is Not Supported
1 : YES
SDR104 is Supported
End of enumeration elements list.
DDR50SUP : DDR50 Support
bits : 2 - 2 (1 bit)
Enumeration: DDR50SUPSelect
0 : NO
DDR50 is Not Supported
1 : YES
DDR50 is Supported
End of enumeration elements list.
DRVASUP : Driver Type A Support
bits : 4 - 4 (1 bit)
Enumeration: DRVASUPSelect
0 : NO
Driver Type A is Not Supported
1 : YES
Driver Type A is Supported
End of enumeration elements list.
DRVCSUP : Driver Type C Support
bits : 5 - 5 (1 bit)
Enumeration: DRVCSUPSelect
0 : NO
Driver Type C is Not Supported
1 : YES
Driver Type C is Supported
End of enumeration elements list.
DRVDSUP : Driver Type D Support
bits : 6 - 6 (1 bit)
Enumeration: DRVDSUPSelect
0 : NO
Driver Type D is Not Supported
1 : YES
Driver Type D is Supported
End of enumeration elements list.
TCNTRT : Timer Count for Re-Tuning
bits : 8 - 11 (4 bit)
Enumeration: TCNTRTSelect
0 : DISABLED
Re-Tuning Timer disabled
1 : 1S
1 second
2 : 2S
2 seconds
3 : 4S
4 seconds
4 : 8S
8 seconds
5 : 16S
16 seconds
6 : 32S
32 seconds
7 : 64S
64 seconds
8 : 128S
128 seconds
9 : 256S
256 seconds
10 : 512S
512 seconds
11 : 1024S
1024 seconds
15 : OTHER
Get information from other source
End of enumeration elements list.
TSDR50 : Use Tuning for SDR50
bits : 13 - 13 (1 bit)
Enumeration: TSDR50Select
0 : NO
SDR50 does not require tuning
1 : YES
SDR50 requires tuning
End of enumeration elements list.
CLKMULT : Clock Multiplier
bits : 16 - 23 (8 bit)
Enumeration: CLKMULTSelect
0 : NO
Clock Multiplier is Not Supported
End of enumeration elements list.
Capabilities 1
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SDR50SUP : SDR50 Support
bits : 0 - 0 (1 bit)
Enumeration: SDR50SUPSelect
0 : NO
SDR50 is Not Supported
1 : YES
SDR50 is Supported
End of enumeration elements list.
SDR104SUP : SDR104 Support
bits : 1 - 1 (1 bit)
Enumeration: SDR104SUPSelect
0 : NO
SDR104 is Not Supported
1 : YES
SDR104 is Supported
End of enumeration elements list.
DDR50SUP : DDR50 Support
bits : 2 - 2 (1 bit)
Enumeration: DDR50SUPSelect
0 : NO
DDR50 is Not Supported
1 : YES
DDR50 is Supported
End of enumeration elements list.
DRVASUP : Driver Type A Support
bits : 4 - 4 (1 bit)
Enumeration: DRVASUPSelect
0 : NO
Driver Type A is Not Supported
1 : YES
Driver Type A is Supported
End of enumeration elements list.
DRVCSUP : Driver Type C Support
bits : 5 - 5 (1 bit)
Enumeration: DRVCSUPSelect
0 : NO
Driver Type C is Not Supported
1 : YES
Driver Type C is Supported
End of enumeration elements list.
DRVDSUP : Driver Type D Support
bits : 6 - 6 (1 bit)
Enumeration: DRVDSUPSelect
0 : NO
Driver Type D is Not Supported
1 : YES
Driver Type D is Supported
End of enumeration elements list.
TCNTRT : Timer Count for Re-Tuning
bits : 8 - 11 (4 bit)
Enumeration: TCNTRTSelect
0 : DISABLED
Re-Tuning Timer disabled
1 : 1S
1 second
2 : 2S
2 seconds
3 : 4S
4 seconds
4 : 8S
8 seconds
5 : 16S
16 seconds
6 : 32S
32 seconds
7 : 64S
64 seconds
8 : 128S
128 seconds
9 : 256S
256 seconds
10 : 512S
512 seconds
11 : 1024S
1024 seconds
15 : OTHER
Get information from other source
End of enumeration elements list.
TSDR50 : Use Tuning for SDR50
bits : 13 - 13 (1 bit)
Enumeration: TSDR50Select
0 : NO
SDR50 does not require tuning
1 : YES
SDR50 requires tuning
End of enumeration elements list.
CLKMULT : Clock Multiplier
bits : 16 - 23 (8 bit)
Enumeration: CLKMULTSelect
0 : NO
Clock Multiplier is Not Supported
End of enumeration elements list.
Maximum Current Capabilities
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MAXCUR33V : Maximum Current for 3.3V
bits : 0 - 7 (8 bit)
Enumeration: MAXCUR33VSelect
0 : OTHER
Get information via another method
1 : 4MA
4mA
2 : 8MA
8mA
3 : 12MA
12mA
End of enumeration elements list.
MAXCUR30V : Maximum Current for 3.0V
bits : 8 - 15 (8 bit)
Enumeration: MAXCUR30VSelect
0 : OTHER
Get information via another method
1 : 4MA
4mA
2 : 8MA
8mA
3 : 12MA
12mA
End of enumeration elements list.
MAXCUR18V : Maximum Current for 1.8V
bits : 16 - 23 (8 bit)
Enumeration: MAXCUR18VSelect
0 : OTHER
Get information via another method
1 : 4MA
4mA
2 : 8MA
8mA
3 : 12MA
12mA
End of enumeration elements list.
Maximum Current Capabilities
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MAXCUR33V : Maximum Current for 3.3V
bits : 0 - 7 (8 bit)
Enumeration: MAXCUR33VSelect
0 : OTHER
Get information via another method
1 : 4MA
4mA
2 : 8MA
8mA
3 : 12MA
12mA
End of enumeration elements list.
MAXCUR30V : Maximum Current for 3.0V
bits : 8 - 15 (8 bit)
Enumeration: MAXCUR30VSelect
0 : OTHER
Get information via another method
1 : 4MA
4mA
2 : 8MA
8mA
3 : 12MA
12mA
End of enumeration elements list.
MAXCUR18V : Maximum Current for 1.8V
bits : 16 - 23 (8 bit)
Enumeration: MAXCUR18VSelect
0 : OTHER
Get information via another method
1 : 4MA
4mA
2 : 8MA
8mA
3 : 12MA
12mA
End of enumeration elements list.
Response
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMDRESP : Command Response
bits : 0 - 31 (32 bit)
Force Event for Auto CMD Error Status
address_offset : 0x50 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ACMD12NE : Force Event for Auto CMD12 Not Executed
bits : 0 - 0 (1 bit)
Enumeration: ACMD12NESelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ACMDTEO : Force Event for Auto CMD Timeout Error
bits : 1 - 1 (1 bit)
Enumeration: ACMDTEOSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ACMDCRC : Force Event for Auto CMD CRC Error
bits : 2 - 2 (1 bit)
Enumeration: ACMDCRCSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ACMDEND : Force Event for Auto CMD End Bit Error
bits : 3 - 3 (1 bit)
Enumeration: ACMDENDSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ACMDIDX : Force Event for Auto CMD Index Error
bits : 4 - 4 (1 bit)
Enumeration: ACMDIDXSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
CMDNI : Force Event for Command Not Issued By Auto CMD12 Error
bits : 7 - 7 (1 bit)
Enumeration: CMDNISelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
Force Event for Auto CMD Error Status
address_offset : 0x50 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ACMD12NE : Force Event for Auto CMD12 Not Executed
bits : 0 - 0 (1 bit)
Enumeration: ACMD12NESelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ACMDTEO : Force Event for Auto CMD Timeout Error
bits : 1 - 1 (1 bit)
Enumeration: ACMDTEOSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ACMDCRC : Force Event for Auto CMD CRC Error
bits : 2 - 2 (1 bit)
Enumeration: ACMDCRCSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ACMDEND : Force Event for Auto CMD End Bit Error
bits : 3 - 3 (1 bit)
Enumeration: ACMDENDSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ACMDIDX : Force Event for Auto CMD Index Error
bits : 4 - 4 (1 bit)
Enumeration: ACMDIDXSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
CMDNI : Force Event for Command Not Issued By Auto CMD12 Error
bits : 7 - 7 (1 bit)
Enumeration: CMDNISelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
Force Event for Error Interrupt Status
address_offset : 0x52 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
CMDTEO : Force Event for Command Timeout Error
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
CMDCRC : Force Event for Command CRC Error
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
CMDEND : Force Event for Command End Bit Error
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
CMDIDX : Force Event for Command Index Error
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
DATTEO : Force Event for Data Timeout Error
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
DATCRC : Force Event for Data CRC Error
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
DATEND : Force Event for Data End Bit Error
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
CURLIM : Force Event for Current Limit Error
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ACMD : Force Event for Auto CMD Error
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ADMA : Force Event for ADMA Error
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
BOOTAE : Force Event for Boot Acknowledge Error
bits : 12 - 12 (1 bit)
Enumeration: BOOTAESelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
Force Event for Error Interrupt Status
address_offset : 0x52 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
CMDTEO : Force Event for Command Timeout Error
bits : 0 - 0 (1 bit)
Enumeration: CMDTEOSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
CMDCRC : Force Event for Command CRC Error
bits : 1 - 1 (1 bit)
Enumeration: CMDCRCSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
CMDEND : Force Event for Command End Bit Error
bits : 2 - 2 (1 bit)
Enumeration: CMDENDSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
CMDIDX : Force Event for Command Index Error
bits : 3 - 3 (1 bit)
Enumeration: CMDIDXSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
DATTEO : Force Event for Data Timeout Error
bits : 4 - 4 (1 bit)
Enumeration: DATTEOSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
DATCRC : Force Event for Data CRC Error
bits : 5 - 5 (1 bit)
Enumeration: DATCRCSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
DATEND : Force Event for Data End Bit Error
bits : 6 - 6 (1 bit)
Enumeration: DATENDSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
CURLIM : Force Event for Current Limit Error
bits : 7 - 7 (1 bit)
Enumeration: CURLIMSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ACMD : Force Event for Auto CMD Error
bits : 8 - 8 (1 bit)
Enumeration: ACMDSelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ADMA : Force Event for ADMA Error
bits : 9 - 9 (1 bit)
Enumeration: ADMASelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
BOOTAE : Force Event for Boot Acknowledge Error
bits : 12 - 12 (1 bit)
Enumeration: BOOTAESelect
0 : NO
No Interrupt
1 : YES
Interrupt is generated
End of enumeration elements list.
ADMA Error Status
address_offset : 0x54 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ERRST : ADMA Error State
bits : 0 - 1 (2 bit)
Enumeration: ERRSTSelect
0 : STOP
ST_STOP (Stop DMA)
1 : FDS
ST_FDS (Fetch Descriptor)
3 : TFR
ST_TFR (Transfer Data)
End of enumeration elements list.
LMIS : ADMA Length Mismatch Error
bits : 2 - 2 (1 bit)
Enumeration: LMISSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
ADMA Error Status
address_offset : 0x54 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ERRST : ADMA Error State
bits : 0 - 1 (2 bit)
Enumeration: ERRSTSelect
0 : STOP
ST_STOP (Stop DMA)
1 : FDS
ST_FDS (Fetch Descriptor)
3 : TFR
ST_TFR (Transfer Data)
End of enumeration elements list.
LMIS : ADMA Length Mismatch Error
bits : 2 - 2 (1 bit)
Enumeration: LMISSelect
0 : NO
No Error
1 : YES
Error
End of enumeration elements list.
ADMA System Address
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADMASA : ADMA System Address
bits : 0 - 31 (32 bit)
Block Count
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BCNT : Blocks Count for Current Transfer
bits : 0 - 15 (16 bit)
Block Count
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BCNT : Blocks Count for Current Transfer
bits : 0 - 15 (16 bit)
Preset Value n
address_offset : 0x60 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Preset Value n
address_offset : 0x62 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Preset Value n
address_offset : 0x64 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Preset Value n
address_offset : 0x66 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Response
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMDRESP : Command Response
bits : 0 - 31 (32 bit)
Preset Value n
address_offset : 0x68 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Preset Value n
address_offset : 0x6A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Preset Value n
address_offset : 0x6C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Preset Value n
address_offset : 0x6E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Argument 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ARG : Argument 1
bits : 0 - 31 (32 bit)
Argument 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ARG : Argument 1
bits : 0 - 31 (32 bit)
ADMA System Address n
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADMASA : ADMA System Address
bits : 0 - 31 (32 bit)
Transfer Mode
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAEN : DMA Enable
bits : 0 - 0 (1 bit)
Enumeration: DMAENSelect
0 : DISABLE
No data transfer or Non DMA data transfer
1 : ENABLE
DMA data transfer
End of enumeration elements list.
BCEN : Block Count Enable
bits : 1 - 1 (1 bit)
Enumeration: BCENSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
ACMDEN : Auto Command Enable
bits : 2 - 3 (2 bit)
Enumeration: ACMDENSelect
0 : DISABLED
Auto Command Disabled
1 : CMD12
Auto CMD12 Enable
2 : CMD23
Auto CMD23 Enable
End of enumeration elements list.
DTDSEL : Data Transfer Direction Selection
bits : 4 - 4 (1 bit)
Enumeration: DTDSELSelect
0 : WRITE
Write (Host to Card)
1 : READ
Read (Card to Host)
End of enumeration elements list.
MSBSEL : Multi/Single Block Selection
bits : 5 - 5 (1 bit)
Enumeration: MSBSELSelect
0 : SINGLE
Single Block
1 : MULTIPLE
Multiple Block
End of enumeration elements list.
Transfer Mode
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAEN : DMA Enable
bits : 0 - 0 (1 bit)
Enumeration: DMAENSelect
0 : DISABLE
No data transfer or Non DMA data transfer
1 : ENABLE
DMA data transfer
End of enumeration elements list.
BCEN : Block Count Enable
bits : 1 - 1 (1 bit)
Enumeration: BCENSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
ACMDEN : Auto Command Enable
bits : 2 - 3 (2 bit)
Enumeration: ACMDENSelect
0 : DISABLED
Auto Command Disabled
1 : CMD12
Auto CMD12 Enable
2 : CMD23
Auto CMD23 Enable
End of enumeration elements list.
DTDSEL : Data Transfer Direction Selection
bits : 4 - 4 (1 bit)
Enumeration: DTDSELSelect
0 : WRITE
Write (Host to Card)
1 : READ
Read (Card to Host)
End of enumeration elements list.
MSBSEL : Multi/Single Block Selection
bits : 5 - 5 (1 bit)
Enumeration: MSBSELSelect
0 : SINGLE
Single Block
1 : MULTIPLE
Multiple Block
End of enumeration elements list.
Preset Value n
address_offset : 0xC0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDCLKFSEL : SDCLK Frequency Select Value for Initialization
bits : 0 - 9 (10 bit)
CLKGSEL : Clock Generator Select Value for Initialization
bits : 10 - 10 (1 bit)
Enumeration: CLKGSELSelect
0 : DIV
Host Controller Ver2.00 Compatible Clock Generator (Divider)
1 : PROG
Programmable Clock Generator
End of enumeration elements list.
DRVSEL : Driver Strength Select Value for Initialization
bits : 14 - 15 (2 bit)
Enumeration: DRVSELSelect
0 : B
Driver Type B is Selected
1 : A
Driver Type A is Selected
2 : C
Driver Type C is Selected
3 : D
Driver Type D is Selected
End of enumeration elements list.
Command
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESPTYP : Response Type
bits : 0 - 1 (2 bit)
Enumeration: RESPTYPSelect
0 : NONE
No response
1 : 136_BIT
136-bit response
2 : 48_BIT
48-bit response
3 : 48_BIT_BUSY
48-bit response check busy after response
End of enumeration elements list.
CMDCCEN : Command CRC Check Enable
bits : 3 - 3 (1 bit)
Enumeration: CMDCCENSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
CMDICEN : Command Index Check Enable
bits : 4 - 4 (1 bit)
Enumeration: CMDICENSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
DPSEL : Data Present Select
bits : 5 - 5 (1 bit)
Enumeration: DPSELSelect
0 : NO_DATA
No Data Present
1 : DATA
Data Present
End of enumeration elements list.
CMDTYP : Command Type
bits : 6 - 7 (2 bit)
Enumeration: CMDTYPSelect
0 : NORMAL
Other commands
1 : SUSPEND
CMD52 for writing Bus Suspend in CCCR
2 : RESUME
CMD52 for writing Function Select in CCCR
3 : ABORT
CMD12, CMD52 for writing I/O Abort in CCCR
End of enumeration elements list.
CMDIDX : Command Index
bits : 8 - 13 (6 bit)
Command
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESPTYP : Response Type
bits : 0 - 1 (2 bit)
Enumeration: RESPTYPSelect
0 : NONE
No response
1 : 136_BIT
136-bit response
2 : 48_BIT
48-bit response
3 : 48_BIT_BUSY
48-bit response check busy after response
End of enumeration elements list.
CMDCCEN : Command CRC Check Enable
bits : 3 - 3 (1 bit)
Enumeration: CMDCCENSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
CMDICEN : Command Index Check Enable
bits : 4 - 4 (1 bit)
Enumeration: CMDICENSelect
0 : DISABLE
Disable
1 : ENABLE
Enable
End of enumeration elements list.
DPSEL : Data Present Select
bits : 5 - 5 (1 bit)
Enumeration: DPSELSelect
0 : NO_DATA
No Data Present
1 : DATA
Data Present
End of enumeration elements list.
CMDTYP : Command Type
bits : 6 - 7 (2 bit)
Enumeration: CMDTYPSelect
0 : NORMAL
Other commands
1 : SUSPEND
CMD52 for writing Bus Suspend in CCCR
2 : RESUME
CMD52 for writing Function Select in CCCR
3 : ABORT
CMD12, CMD52 for writing I/O Abort in CCCR
End of enumeration elements list.
CMDIDX : Command Index
bits : 8 - 13 (6 bit)
Slot Interrupt Status
address_offset : 0xFC Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INTSSL : Interrupt Signal for Each Slot
bits : 0 - 0 (1 bit)
Slot Interrupt Status
address_offset : 0xFC Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INTSSL : Interrupt Signal for Each Slot
bits : 0 - 0 (1 bit)
Host Controller Version
address_offset : 0xFE Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SVER : Spec Version
bits : 0 - 7 (8 bit)
VVER : Vendor Version
bits : 8 - 15 (8 bit)
Host Controller Version
address_offset : 0xFE Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SVER : Spec Version
bits : 0 - 7 (8 bit)
VVER : Vendor Version
bits : 8 - 15 (8 bit)
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