\n
address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
Interrupt Enable Clear
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SINGLEE : Single Bit ECC Error Interrupt Enable Clear
bits : 0 - 0 (1 bit)
DUALE : Dual Bit ECC Error Interrupt Enable Clear
bits : 1 - 1 (1 bit)
Interrupt Enable Set
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SINGLEE : Single Bit ECC Error Interrupt Enable Set
bits : 0 - 0 (1 bit)
DUALE : Dual Bit ECC Error Interrupt Enable Set
bits : 1 - 1 (1 bit)
Interrupt Flag
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SINGLEE : Single Bit ECC Error Interrupt
bits : 0 - 0 (1 bit)
DUALE : Dual Bit ECC Error Interrupt
bits : 1 - 1 (1 bit)
Status
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ECCDIS : ECC Disable
bits : 0 - 0 (1 bit)
Error Address
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ERRADDR : Error Address
bits : 0 - 16 (17 bit)
Debug Control
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ECCDIS : ECC Disable
bits : 0 - 0 (1 bit)
ECCELOG : ECC Error Log
bits : 1 - 1 (1 bit)
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