\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
control and status register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMP1EN : Comparator 1 enable
bits : 0 - 0 (1 bit)
access : read-write
COMP1_INP_DAC : COMP1_INP_DAC
bits : 1 - 1 (1 bit)
access : read-write
COMP1MODE : Comparator 1 mode
bits : 2 - 3 (2 bit)
access : read-write
COMP1INSEL : Comparator 1 inverting input selection
bits : 4 - 6 (3 bit)
access : read-write
COMP1OUTSEL : Comparator 1 output selection
bits : 8 - 10 (3 bit)
access : read-write
COMP1POL : Comparator 1 output polarity
bits : 11 - 11 (1 bit)
access : read-write
COMP1HYST : Comparator 1 hysteresis
bits : 12 - 13 (2 bit)
access : read-write
COMP1OUT : Comparator 1 output
bits : 14 - 14 (1 bit)
access : read-only
COMP1LOCK : Comparator 1 lock
bits : 15 - 15 (1 bit)
access : read-write
COMP2EN : Comparator 2 enable
bits : 16 - 16 (1 bit)
access : read-write
COMP2MODE : Comparator 2 mode
bits : 18 - 19 (2 bit)
access : read-write
COMP2INSEL : Comparator 2 inverting input selection
bits : 20 - 22 (3 bit)
access : read-write
WNDWEN : Window mode enable
bits : 23 - 23 (1 bit)
access : read-write
COMP2OUTSEL : Comparator 2 output selection
bits : 24 - 26 (3 bit)
access : read-write
COMP2POL : Comparator 2 output polarity
bits : 27 - 27 (1 bit)
access : read-write
COMP2HYST : Comparator 2 hysteresis
bits : 28 - 29 (2 bit)
access : read-write
COMP2OUT : Comparator 2 output
bits : 30 - 30 (1 bit)
access : read-only
COMP2LOCK : Comparator 2 lock
bits : 31 - 31 (1 bit)
access : read-write
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