\n

LCD0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x10000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

ID

DATA3[2]

DATA1[6]

DATA2[4]

DATA1[7]

DATA3[3]

DATA2[5]

DATA3[4]

DATA2[6]

DATA2[7]

DATA3[5]

DATA0[0]

DATA3[6]

DATA3[7]

DATA0[1]

DIVIDER

DATA1[0]

DATA0[2]

DATA0[3]

DATA2[0]

DATA1[1]

DATA0[4]

DATA0[5]

CONTROL

DATA3[0]

DATA1[2]

DATA0[6]

DATA2[1]

DATA0[7]

DATA1[3]

DATA3[1]

DATA2[2]

DATA1[4]

DATA1[5]

DATA2[3]


ID

ID and Revision
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ID ID read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID REVISION

ID : the ID of LCD controller peripheral is 0xF0F0
bits : 0 - 15 (16 bit)
access : read-only

REVISION : the version number is 0x0001
bits : 16 - 47 (32 bit)
access : read-only


DATA3[2]

LCD Pin Data Registers
address_offset : 0x100C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA3[2] DATA3[2] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 13-16 (COM13 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA1[6]

LCD Pin Data Registers
address_offset : 0x1054 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA1[6] DATA1[6] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 5-8 (COM5 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA2[4]

LCD Pin Data Registers
address_offset : 0x1228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA2[4] DATA2[4] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 9-12 (COM9 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA1[7]

LCD Pin Data Registers
address_offset : 0x1270 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA1[7] DATA1[7] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 5-8 (COM5 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA3[3]

LCD Pin Data Registers
address_offset : 0x1418 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA3[3] DATA3[3] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 13-16 (COM13 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA2[5]

LCD Pin Data Registers
address_offset : 0x153C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA2[5] DATA2[5] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 9-12 (COM9 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA3[4]

LCD Pin Data Registers
address_offset : 0x1828 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA3[4] DATA3[4] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 13-16 (COM13 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA2[6]

LCD Pin Data Registers
address_offset : 0x1854 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA2[6] DATA2[6] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 9-12 (COM9 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA2[7]

LCD Pin Data Registers
address_offset : 0x1B70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA2[7] DATA2[7] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 9-12 (COM9 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA3[5]

LCD Pin Data Registers
address_offset : 0x1C3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA3[5] DATA3[5] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 13-16 (COM13 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA0[0]

LCD Pin Data Registers
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA0[0] DATA0[0] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 1-4 (COM1 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA3[6]

LCD Pin Data Registers
address_offset : 0x2054 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA3[6] DATA3[6] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 13-16 (COM13 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA3[7]

LCD Pin Data Registers
address_offset : 0x2470 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA3[7] DATA3[7] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 13-16 (COM13 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA0[1]

LCD Pin Data Registers
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA0[1] DATA0[1] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 1-4 (COM1 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DIVIDER

LCD Divider Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIVIDER DIVIDER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SUBFR_DIV DEAD_DIV

SUBFR_DIV : Input clock frequency divide value, to generate the 1/4 sub-frame period. The sub-frame period is 4*(SUBFR_DIV+1) cycles long.
bits : 0 - 15 (16 bit)
access : read-write

DEAD_DIV : Length of the dead time period in cycles. When set to zero, no dead time period exists.
bits : 16 - 47 (32 bit)
access : read-write


DATA1[0]

LCD Pin Data Registers
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA1[0] DATA1[0] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 5-8 (COM5 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA0[2]

LCD Pin Data Registers
address_offset : 0x40C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA0[2] DATA0[2] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 1-4 (COM1 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA0[3]

LCD Pin Data Registers
address_offset : 0x518 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA0[3] DATA0[3] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 1-4 (COM1 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA2[0]

LCD Pin Data Registers
address_offset : 0x600 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA2[0] DATA2[0] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 9-12 (COM9 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA1[1]

LCD Pin Data Registers
address_offset : 0x604 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA1[1] DATA1[1] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 5-8 (COM5 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA0[4]

LCD Pin Data Registers
address_offset : 0x628 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA0[4] DATA0[4] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 1-4 (COM1 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA0[5]

LCD Pin Data Registers
address_offset : 0x73C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA0[5] DATA0[5] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 1-4 (COM1 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


CONTROL

LCD Configuration Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONTROL CONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LS_EN HS_EN LCD_MODE TYPE OP_MODE BIAS COM_NUM LS_EN_STAT

LS_EN : Low speed (LS) generator enable 1: enable 0: disable
bits : 0 - 0 (1 bit)
access : read-write

HS_EN : High speed (HS) generator enable 1: enable 0: disable
bits : 1 - 2 (2 bit)
access : read-write

LCD_MODE : HS/LS Mode selection
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LS

Select Low Speed (32kHz) Generator (Works in Active, Sleep and DeepSleep power modes).

1 : HS

Select High Speed (system clock) Generator (Works in Active and Sleep power modes only).

End of enumeration elements list.

TYPE : LCD driving waveform type configuration.
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : TYPE_A

Type A - Each frame addresses each COM pin only once with a balanced (DC=0) waveform.

1 : TYPE_B

Type B - Each frame addresses each COM pin twice in sequence with a positive and negative waveform that together are balanced (DC=0).

End of enumeration elements list.

OP_MODE : Driving mode configuration
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : PWM

PWM Mode

1 : CORRELATION

Digital Correlation Mode

End of enumeration elements list.

BIAS : PWM bias selection
bits : 5 - 11 (7 bit)
access : read-write

Enumeration:

0 : HALF

1/2 Bias

1 : THIRD

1/3 Bias

2 : FOURTH

1/4 Bias (not supported by LS generator)

3 : FIFTH

1/5 Bias (not supported by LS generator)

End of enumeration elements list.

COM_NUM : The number of COM connections minus 2. So: 0: 2 COM's 1: 3 COM's ... 13: 15 COM's 14: 16 COM's 15: undefined
bits : 8 - 19 (12 bit)
access : read-write

LS_EN_STAT : LS enable status bit. This bit is a copy of LS_EN that is synchronized to the low speed clock domain and back to the system clock domain. Firmware can use this bit to observe whether LS_EN has taken effect in the low speed clock domain. Firmware should never change the configuration for the LS generator without ensuring this bit is 0. The following procedure should be followed to disable the LS generator: 1. If LS_EN=0 we are done. Exit the procedure. 2. Check that LS_EN_STAT=1. If not, wait until it is. This will catch the case of a recent enable (LS_EN=1) that has not taken effect yet. 3. Set LS_EN=0. 4. Wait until LS_EN_STAT=0.
bits : 31 - 62 (32 bit)
access : read-only


DATA3[0]

LCD Pin Data Registers
address_offset : 0x800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA3[0] DATA3[0] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 13-16 (COM13 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA1[2]

LCD Pin Data Registers
address_offset : 0x80C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA1[2] DATA1[2] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 5-8 (COM5 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA0[6]

LCD Pin Data Registers
address_offset : 0x854 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA0[6] DATA0[6] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 1-4 (COM1 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA2[1]

LCD Pin Data Registers
address_offset : 0x904 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA2[1] DATA2[1] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 9-12 (COM9 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA0[7]

LCD Pin Data Registers
address_offset : 0x970 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA0[7] DATA0[7] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 1-4 (COM1 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA1[3]

LCD Pin Data Registers
address_offset : 0xA18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA1[3] DATA1[3] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 5-8 (COM5 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA3[1]

LCD Pin Data Registers
address_offset : 0xC04 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA3[1] DATA3[1] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 13-16 (COM13 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA2[2]

LCD Pin Data Registers
address_offset : 0xC0C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA2[2] DATA2[2] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 9-12 (COM9 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA1[4]

LCD Pin Data Registers
address_offset : 0xC28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA1[4] DATA1[4] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 5-8 (COM5 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA1[5]

LCD Pin Data Registers
address_offset : 0xE3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA1[5] DATA1[5] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 5-8 (COM5 is lsb).
bits : 0 - 31 (32 bit)
access : read-write


DATA2[3]

LCD Pin Data Registers
address_offset : 0xF18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA2[3] DATA2[3] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Bits [4i+3:4i] represent the pin data for pin [i] for COMS 9-12 (COM9 is lsb).
bits : 0 - 31 (32 bit)
access : read-write



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