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BLE

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x20000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

RCB - CTRL

RCB - - RCBLL - CTRL

BLELL - COMMAND_REGISTER

RCB - TX_CTRL

RCB - - RCBLL - INTR

BLELL - EVENT_ENABLE

BLELL - CONN_INTERVAL

BLESS - PACKET_COUNTER0

BLELL - RSLV_LIST_ENABLE[15]

BLELL - SUP_TIMEOUT

BLESS - PACKET_COUNTER2

BLELL - MMMS_DATA_MEM_DESCRIPTOR[11]

BLELL - SLAVE_LATENCY

BLESS - IV_MASTER0

BLELL - CE_LENGTH

BLESS - IV_SLAVE0

BLELL - PDU_ACCESS_ADDR_L_REGISTER

BLELL - PDU_ACCESS_ADDR_H_REGISTER

BLELL - CONN_CE_INSTANT

BLELL - MMMS_DATA_MEM_DESCRIPTOR[12]

BLELL - CE_CNFG_STS_REGISTER

BLELL - NEXT_CE_INSTANT

BLESS - MIC_IN0

BLELL - CONN_CE_COUNTER

BLESS - MIC_OUT0

BLELL - DATA_LIST_SENT_UPDATE__STATUS

BLESS - ENC_PARAMS

BLELL - CONN_1_PARAM_MEM_BASE_ADDR

BLELL - CONN_2_PARAM_MEM_BASE_ADDR

BLELL - CONN_3_PARAM_MEM_BASE_ADDR

BLELL - CONN_4_PARAM_MEM_BASE_ADDR

BLELL - DATA_LIST_ACK_UPDATE__STATUS

BLESS - ENC_CONFIG

BLELL - MMMS_DATA_MEM_DESCRIPTOR[13]

BLELL - CE_CNFG_STS_REGISTER_EXT

BLESS - ENC_INTR_EN

BLELL - CONN_EXT_INTR

BLESS - ENC_INTR

BLELL - CONN_EXT_INTR_MASK

RCB - TX_FIFO_CTRL

RCB - - RCBLL - INTR_SET

BLELL - NI_TIMER

BLELL - US_OFFSET

BLELL - NEXT_CONN

BLELL - NI_ABORT

BLELL - CONN_NI_STATUS

BLELL - NEXT_SUP_TO_STATUS

BLELL - MMMS_CONN_STATUS

BLELL - BT_SLOT_CAPT_STATUS

BLELL - US_CAPT_STATUS

BLELL - US_OFFSET_STATUS

BLELL - ACCU_WINDOW_WIDEN_STATUS

BLELL - EARLY_INTR_STATUS

BLELL - MMMS_CONFIG

BLELL - US_COUNTER

BLELL - US_CAPT_PREV

BLELL - EARLY_INTR_NI

BLELL - MMMS_MASTER_CREATE_BT_CAPT

BLELL - MMMS_SLAVE_CREATE_BT_CAPT

BLELL - MMMS_SLAVE_CREATE_US_CAPT

BLELL - MMMS_DATA_MEM_DESCRIPTOR[14]

BLELL - CONN_1_DATA_LIST_SENT

BLELL - CONN_1_DATA_LIST_ACK

BLELL - CONN_1_CE_DATA_LIST_CFG

BLELL - CONN_2_DATA_LIST_SENT

BLELL - CONN_2_DATA_LIST_ACK

BLELL - CONN_2_CE_DATA_LIST_CFG

BLELL - CONN_3_DATA_LIST_SENT

BLELL - CONN_3_DATA_LIST_ACK

BLELL - CONN_3_CE_DATA_LIST_CFG

BLELL - CONN_4_DATA_LIST_SENT

BLELL - CONN_4_DATA_LIST_ACK

BLELL - CONN_4_CE_DATA_LIST_CFG

BLELL - MMMS_ADVCH_NI_ENABLE

BLELL - MMMS_ADVCH_NI_VALID

BLELL - MMMS_ADVCH_NI_ABORT

BLELL - CONN_PARAM_NEXT_SUP_TO

BLELL - CONN_PARAM_ACC_WIN_WIDEN

BLELL - HW_LOAD_OFFSET

BLELL - ADV_RAND

BLELL - MMMS_RX_PKT_CNTR

BLELL - WHITELIST_BASE_ADDR

BLELL - RSLV_LIST_PEER_IDNTT_BASE_ADDR

BLELL - RSLV_LIST_PEER_RPA_BASE_ADDR

BLELL - RSLV_LIST_RCVD_INIT_RPA_BASE_ADDR

BLELL - RSLV_LIST_TX_INIT_RPA_BASE_ADDR

BLESS - ENC_MEM_BASE_ADDR

BLELL - MMMS_DATA_MEM_DESCRIPTOR[15]

BLELL - WINDOW_WIDEN_INTVL

BLELL - WINDOW_WIDEN_WINOFF

BLELL - LE_RF_TEST_MODE

BLELL - DTM_RX_PKT_COUNT

BLELL - LE_RF_TEST_MODE_EXT

RCB - TX_FIFO_STATUS

RCB - - RCBLL - INTR_MASK

BLELL - ADV_PARAMS

BLELL - CONN_RXMEM_BASE_ADDR_DLE

BLELL - TXRX_HOP

BLELL - TX_RX_ON_DELAY

BLELL - ADV_ACCADDR_L

BLELL - ADV_ACCADDR_H

BLELL - ADV_CH_TX_POWER_LVL_LS

BLELL - ADV_CH_TX_POWER_LVL_MS

BLELL - CONN_CH_TX_POWER_LVL_LS

BLELL - CONN_CH_TX_POWER_LVL_MS

RCB - TX_FIFO_WR

RCB - - RCBLL - INTR_MASKED

BLELL - ADV_INTERVAL_TIMEOUT

BLELL - DEV_PUB_ADDR_L

BLELL - DEV_PUB_ADDR_M

BLELL - DEV_PUB_ADDR_H

BLELL - OFFSET_TO_FIRST_INSTANT

BLELL - ADV_CONFIG

BLELL - SCAN_CONFIG

BLELL - INIT_CONFIG

BLELL - CONN_CONFIG

BLELL - RSLV_LIST_ENABLE[0]

BLESS - TRIM_MXD[0]

BLELL - CONN_PARAM1

BLELL - CONN_PARAM2

BLELL - CONN_INTR_MASK

BLELL - SLAVE_TIMING_CONTROL

BLELL - RECEIVE_TRIG_CTRL

RCB - RX_CTRL

RCB - - RCBLL - RADIO_REG1_ADDR

BLELL - ADV_INTR

BLELL - LL_DBG_1

BLELL - LL_DBG_2

BLELL - LL_DBG_3

BLELL - LL_DBG_4

BLELL - LL_DBG_5

BLELL - LL_DBG_6

BLELL - LL_DBG_7

BLELL - LL_DBG_8

BLELL - LL_DBG_9

BLESS - ENC_KEY[0]

BLELL - LL_DBG_10

BLELL - PEER_ADDR_INIT_L

BLELL - PEER_ADDR_INIT_M

BLELL - PEER_ADDR_INIT_H

BLELL - PEER_SEC_ADDR_ADV_L

RCB - RX_FIFO_CTRL

RCB - - RCBLL - RADIO_REG2_ADDR

BLELL - ADV_NEXT_INSTANT

BLELL - PEER_SEC_ADDR_ADV_M

BLELL - PEER_SEC_ADDR_ADV_H

BLELL - INIT_WINDOW_TIMER_CTRL

BLELL - CONN_CONFIG_EXT

BLELL - DPLL_CONFIG

BLELL - INIT_NI_VAL

BLELL - INIT_WINDOW_OFFSET

BLELL - INIT_WINDOW_NI_ANCHOR_PT

RCB - RX_FIFO_STATUS

RCB - - RCBLL - RADIO_REG3_ADDR

BLELL - SCAN_INTERVAL

BLELL - DATA_MEM_DESCRIPTOR[0]

BLESS - B1_DATA_REG[0]

BLELL - CONN_TXMEM_BASE_ADDR_DLE

BLELL - MMMS_DATA_MEM_DESCRIPTOR[0]

BLELL - CONN_RX_PKT_CNTR[0]

RCB - RX_FIFO_RD

RCB - - RCBLL - RADIO_REG4_ADDR

BLELL - SCAN_WINDOW

BLELL - RSLV_LIST_ENABLE[1]

BLESS - TRIM_MXD[1]

RCB - RX_FIFO_RD_SILENT

RCB - - RCBLL - RADIO_REG5_ADDR

BLELL - SCAN_PARAM

BLESS - ENC_KEY[1]

BLELL - SCAN_INTR

BLELL - CONN_UPDATE_NEW_INTERVAL

BLELL - CONN_UPDATE_NEW_LATENCY

BLELL - CONN_UPDATE_NEW_SUP_TO

BLELL - CONN_UPDATE_NEW_SL_INTERVAL

BLELL - SCAN_NEXT_INSTANT

BLELL - CONN_REQ_WORD0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[1]

BLELL - DATA_MEM_DESCRIPTOR[1]

BLELL - CONN_REQ_WORD1

BLESS - B1_DATA_REG[1]

BLELL - RSLV_LIST_ENABLE[2]

BLESS - TRIM_MXD[2]

BLELL - CONN_REQ_WORD2

BLELL - CONN_REQ_WORD3

BLELL - CONN_RX_PKT_CNTR[1]

BLELL - CONN_REQ_WORD4

BLELL - CONN_REQ_WORD5

BLELL - CONN_REQ_WORD6

BLELL - CONN_REQ_WORD7

BLELL - CONN_REQ_WORD8

BLELL - CONN_REQ_WORD9

BLELL - CONN_REQ_WORD10

BLELL - CONN_REQ_WORD11

RCB - STATUS

RCB - INTR

RCB - - RCBLL - CPU_WRITE_REG

BLELL - INIT_INTERVAL

RCB - INTR_SET

RCB - - RCBLL - CPU_READ_REG

BLELL - INIT_WINDOW

BLESS - ENC_KEY[2]

RCB - INTR_MASK

BLELL - INIT_PARAM

BLELL - RSLV_LIST_ENABLE[3]

BLESS - TRIM_MXD[3]

RCB - INTR_MASKED

BLELL - INIT_INTR

BLELL - MMMS_DATA_MEM_DESCRIPTOR[2]

BLELL - DATA_MEM_DESCRIPTOR[2]

BLESS - B1_DATA_REG[2]

BLELL - CONN_RX_PKT_CNTR[2]

BLELL - INIT_NEXT_INSTANT

BLESS - ENC_KEY[3]

BLELL - DEVICE_RAND_ADDR_L

BLELL - RSLV_LIST_ENABLE[4]

BLELL - DEVICE_RAND_ADDR_M

BLELL - DEVICE_RAND_ADDR_H

BLESS - DDFT_CONFIG

BLESS - XTAL_CLK_DIV_CONFIG

BLELL - MMMS_DATA_MEM_DESCRIPTOR[3]

BLELL - CONN_RX_PKT_CNTR[3]

BLELL - DATA_MEM_DESCRIPTOR[3]

BLESS - B1_DATA_REG[3]

BLELL - PEER_ADDR_L

BLESS - INTR_STAT

BLELL - RSLV_LIST_ENABLE[5]

BLELL - PEER_ADDR_M

BLESS - INTR_MASK

BLELL - PEER_ADDR_H

BLESS - LL_CLK_EN

BLESS - LF_CLK_CTRL

BLELL - WL_ADDR_TYPE

BLESS - EXT_PA_LNA_CTRL

BLELL - MMMS_DATA_MEM_DESCRIPTOR[4]

BLELL - RSLV_LIST_ENABLE[6]

BLELL - CONN_RX_PKT_CNTR[4]

BLELL - DATA_MEM_DESCRIPTOR[4]

BLELL - WL_ENABLE

BLELL - EVENT_INTR

BLELL - TRANSMIT_WINDOW_OFFSET

BLESS - LL_PKT_RSSI_CH_ENERGY

BLELL - TRANSMIT_WINDOW_SIZE

BLESS - BT_CLOCK_CAPT

BLELL - DATA_CHANNELS_L0

BLELL - RSLV_LIST_ENABLE[7]

BLELL - DATA_CHANNELS_M0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[5]

BLELL - CONN_RX_PKT_CNTR[5]

BLELL - DATA_CHANNELS_H0

BLELL - RSLV_LIST_ENABLE[8]

BLELL - DATA_CHANNELS_L1

BLELL - DATA_CHANNELS_M1

BLELL - DATA_CHANNELS_H1

BLESS - MT_CFG

BLELL - PDU_RESP_TIMER

BLELL - NEXT_RESP_TIMER_EXP

BLELL - MMMS_DATA_MEM_DESCRIPTOR[6]

BLELL - NEXT_SUP_TO

BLELL - LLH_FEATURE_CONFIG

BLELL - WIN_MIN_STEP_SIZE

BLELL - SLV_WIN_ADJ

BLELL - SL_CONN_INTERVAL

BLELL - LE_PING_TIMER_ADDR

BLELL - CONN_RX_PKT_CNTR[6]

BLELL - LE_PING_TIMER_OFFSET

BLELL - LE_PING_TIMER_NEXT_EXP

BLELL - LE_PING_TIMER_WRAP_COUNT

BLESS - MT_DELAY_CFG

BLELL - RSLV_LIST_ENABLE[9]

BLELL - CONN_INTR

BLESS - MT_DELAY_CFG2

BLELL - CONN_STATUS

BLESS - MT_DELAY_CFG3

BLELL - CONN_INDEX

BLESS - MT_VIO_CTRL

BLESS - MT_STATUS

BLELL - MMMS_DATA_MEM_DESCRIPTOR[7]

BLELL - RSLV_LIST_ENABLE[10]

BLELL - CONN_RX_PKT_CNTR[7]

BLELL - WAKEUP_CONFIG

BLESS - PWR_CTRL_SM_ST

BLELL - WAKEUP_CONTROL

BLESS - HVLDO_CTRL

BLELL - CLOCK_CONFIG

BLESS - MISC_EN_CTRL

BLELL - RSLV_LIST_ENABLE[11]

BLELL - TIM_COUNTER_L

BLELL - MMMS_DATA_MEM_DESCRIPTOR[8]

BLELL - WAKEUP_CONFIG_EXTD

BLESS - EFUSE_CONFIG

BLESS - EFUSE_TIM_CTRL1

BLELL - RSLV_LIST_ENABLE[12]

BLELL - POC_REG__TIM_CONTROL

BLESS - EFUSE_TIM_CTRL2

BLESS - EFUSE_TIM_CTRL3

BLELL - MMMS_DATA_MEM_DESCRIPTOR[9]

BLELL - ADV_TX_DATA_FIFO

BLESS - EFUSE_RDATA_L

BLELL - TX_EN_EXT_DELAY

BLELL - TX_RX_SYNTH_DELAY

BLELL - EXT_PA_LNA_DLY_CNFG

BLELL - LL_CONFIG

BLELL - RSLV_LIST_ENABLE[13]

BLESS - EFUSE_RDATA_H

BLELL - ADV_SCN_RSP_TX_FIFO

BLESS - EFUSE_WDATA_L

BLESS - EFUSE_WDATA_H

BLESS - DIV_BY_625_CFG

BLELL - LL_CONTROL

BLESS - TRIM_LDO_0

BLELL - DEV_PA_ADDR_L

BLESS - TRIM_LDO_1

BLELL - DEV_PA_ADDR_M

BLESS - TRIM_LDO_2

BLELL - DEV_PA_ADDR_H

BLESS - TRIM_LDO_3

BLELL - MMMS_DATA_MEM_DESCRIPTOR[10]

BLELL - RSLV_LIST_ENABLE[14]

BLESS - TRIM_LDO_4

BLESS - TRIM_LDO_5

BLESS - DIV_BY_625_STS

BLELL - INIT_SCN_ADV_RX_FIFO

BLELL - WL_CONNECTION_STATUS


RCB - CTRL

Radio Control Bus (RCB) controller - - RCB control register.
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - CTRL RCB - CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TX_CLK_EDGE RX_CLK_EDGE RX_CLK_SRC SCLK_CONTINUOUS SSEL_POLARITY LEAD LAG DIV_ENABLED DIV ADDR_WIDTH DATA_WIDTH ENABLED

TX_CLK_EDGE : N/A
bits : 1 - 2 (2 bit)
access : read-write

RX_CLK_EDGE : N/A
bits : 2 - 4 (3 bit)
access : read-write

RX_CLK_SRC : N/A
bits : 3 - 6 (4 bit)
access : read-write

SCLK_CONTINUOUS : N/A
bits : 4 - 8 (5 bit)
access : read-write

SSEL_POLARITY : N/A
bits : 5 - 10 (6 bit)
access : read-write

LEAD : N/A
bits : 8 - 17 (10 bit)
access : read-write

LAG : N/A
bits : 10 - 21 (12 bit)
access : read-write

DIV_ENABLED : N/A
bits : 12 - 24 (13 bit)
access : read-write

DIV : N/A
bits : 13 - 31 (19 bit)
access : read-write

ADDR_WIDTH : N/A
bits : 19 - 41 (23 bit)
access : read-write

DATA_WIDTH : N/A
bits : 23 - 46 (24 bit)
access : read-write

ENABLED : N/A
bits : 31 - 62 (32 bit)
access : read-write


RCB - - RCBLL - CTRL

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - RCB LL control register.
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - CTRL RCB - - RCBLL - CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCBLL_CTRL RCBLL_CPU_REQ CPU_SINGLE_WRITE CPU_SINGLE_READ ALLOW_CPU_ACCESS_TX_RX ENABLE_RADIO_BOD

RCBLL_CTRL : N/A
bits : 0 - 0 (1 bit)
access : read-write

RCBLL_CPU_REQ : N/A
bits : 1 - 2 (2 bit)
access : read-write

CPU_SINGLE_WRITE : N/A
bits : 2 - 4 (3 bit)
access : read-write

CPU_SINGLE_READ : N/A
bits : 3 - 6 (4 bit)
access : read-write

ALLOW_CPU_ACCESS_TX_RX : N/A
bits : 4 - 8 (5 bit)
access : read-write

ENABLE_RADIO_BOD : N/A
bits : 5 - 10 (6 bit)
access : read-write


BLELL - COMMAND_REGISTER

Bluetooth Low Energy Link Layer - - Instruction Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - COMMAND_REGISTER BLELL - COMMAND_REGISTER write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMMAND

COMMAND : N/A
bits : 0 - 7 (8 bit)
access : write-only


RCB - TX_CTRL

Radio Control Bus (RCB) controller - - Transmitter control register.
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - TX_CTRL RCB - TX_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MSB_FIRST FIFO_RECONFIG TX_ENTRIES

MSB_FIRST : Least significant bit first ('0') or most significant bit first ('1'). This field also affects the Address field When MSB_FIRST = 1, then [15:0] is data and [(ADDR_WIDTH+15):16] is used for address When MSB_FIRST = 0, then [15:0] is for data. No address field
bits : 0 - 0 (1 bit)
access : read-write

FIFO_RECONFIG : Setting this bit, clears the FIFO and resets the pointer
bits : 1 - 2 (2 bit)
access : read-write

TX_ENTRIES : This field determines the depth of the TX_FIFO. Allowed legal values are 8 and 16 only
bits : 2 - 8 (7 bit)
access : read-write


RCB - - RCBLL - INTR

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - Master interrupt request register.
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - INTR RCB - - RCBLL - INTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCB_LL_DONE SINGLE_WRITE_DONE SINGLE_READ_DONE

RCB_LL_DONE : RCB_LL is done and the access is given back to CPU
bits : 0 - 0 (1 bit)
access : read-write

SINGLE_WRITE_DONE : N/A
bits : 2 - 4 (3 bit)
access : read-write

SINGLE_READ_DONE : N/A
bits : 3 - 6 (4 bit)
access : read-write


BLELL - EVENT_ENABLE

Bluetooth Low Energy Link Layer - - Event indications enable.
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - EVENT_ENABLE BLELL - EVENT_ENABLE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_INT_EN SCN_INT_EN INIT_INT_EN CONN_INT_EN SM_INT_EN DSM_INT_EN ENC_INT_EN RSSI_RX_DONE_INT_EN

ADV_INT_EN : Advertiser interrupt enable. 1 - enable advertiser procedure to interrupt the firmware. 0 - disable advertiser procedure interrupt to firmware.
bits : 0 - 0 (1 bit)
access : read-write

SCN_INT_EN : Scanner interrupt enable. 1 - enable scan procedure to interrupt the firmware. 0 - disable scan procedure interrupt to firmware.
bits : 1 - 2 (2 bit)
access : read-write

INIT_INT_EN : Initiator interrupt enable. 1 - enable initiator procedure to interrupt the firmware. 0 - disable initiator procedure interrupt to firmware.
bits : 2 - 4 (3 bit)
access : read-write

CONN_INT_EN : Connection interrupt enable. 1 - enable connection procedure to interrupt the firmware. 0 - disable connection procedure interrupt to firmware.
bits : 3 - 6 (4 bit)
access : read-write

SM_INT_EN : Sleep-mode-exit interrupt enable. 1 - enable sleep mode exit event to interrupt the firmware. 0 - disable sleep mode exit interrupt to firmware. This interrupt is deprecated and should not be used.
bits : 4 - 8 (5 bit)
access : read-write

DSM_INT_EN : Deep Sleep-mode-exit interrupt enable. 1 - enable deep sleep mode exit event to interrupt the firmware. 0 - disable deep sleep mode exit interrupt to firmware.
bits : 5 - 10 (6 bit)
access : read-write

ENC_INT_EN : Encryption module interrupt enable. 1 - Enable encryption module interrupt to firmware. 0 - disable encryption module interrupt to firmware. This interrupt is deprecated and should not be used
bits : 6 - 12 (7 bit)
access : read-write

RSSI_RX_DONE_INT_EN : RSSI Rx interrupt enable. 1 - Enable RSSI Rx done interrupt to firmware. 0 - Disable RSSI Rx done interrupt to firmware.
bits : 7 - 14 (8 bit)
access : read-write


BLELL - CONN_INTERVAL

Bluetooth Low Energy Link Layer - - Connection Interval
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_INTERVAL BLELL - CONN_INTERVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONNECTION_INTERVAL

CONNECTION_INTERVAL : The value configured in this register determines the spacing be-tween the connection events. This shall be a multiple of 1.25 ms in the range of 7.5 ms to 4.0 s.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - PACKET_COUNTER0

Bluetooth Low Energy Subsystem Miscellaneous - - Packet counter 0
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - PACKET_COUNTER0 BLESS - PACKET_COUNTER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PACKET_COUNTER_LOWER

PACKET_COUNTER_LOWER : Lower 32-bits of the packet counter value passed as part of Nonce for the packet to be encrypted.
bits : 0 - 31 (32 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[15]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0x101F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[15] BLELL - RSLV_LIST_ENABLE[15] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLELL - SUP_TIMEOUT

Bluetooth Low Energy Link Layer - - Supervision timeout
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - SUP_TIMEOUT BLELL - SUP_TIMEOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SUPERVISION_TIMEOUT

SUPERVISION_TIMEOUT : This field defines the maximum time between two received Data packet PDUs before the connection is considered lost. This shall be a multiple of 10 ms in the range of 100 ms to 32.0 s and it shall be larger than (1+connSlaveLatency)*connInterval.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - PACKET_COUNTER2

Bluetooth Low Energy Subsystem Miscellaneous - - Packet counter 2
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - PACKET_COUNTER2 BLESS - PACKET_COUNTER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PACKET_COUNTER_UPPER

PACKET_COUNTER_UPPER : Upper 8 bits of the packet counter value passed as part of Nonce for the packet to be encrypted.
bits : 0 - 7 (8 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[11]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0x104E08 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[11] BLELL - MMMS_DATA_MEM_DESCRIPTOR[11] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - SLAVE_LATENCY

Bluetooth Low Energy Link Layer - - Slave Latency
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - SLAVE_LATENCY BLELL - SLAVE_LATENCY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLAVE_LATENCY

SLAVE_LATENCY : The value configured in this field defines the number of consecutive connection events that the slave device is not required to listen for master. The value of connSlaveLatency should not cause a Supervision Timeout. This shall be an integer in the range of 0 to ((connSupervision Timeout/connInterval)-1). connSlaveLatency shall also be less than 500.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - IV_MASTER0

Bluetooth Low Energy Subsystem Miscellaneous - - Master Initialization Vector 0
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - IV_MASTER0 BLESS - IV_MASTER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IV_MASTER

IV_MASTER : This is the IVm field, which contains the master's portion of the initialization vector.
bits : 0 - 31 (32 bit)
access : read-write


BLELL - CE_LENGTH

Bluetooth Low Energy Link Layer - - Connection event length
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CE_LENGTH BLELL - CE_LENGTH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONNECTION_EVENT_LENGTH

CONNECTION_EVENT_LENGTH : This field defines the length of Connection event. This value is derived from the CE length HCI parameters received from the host. This determines the number of master transmit slots in a connection event, subject to either of the MD bits being set. If both MD bits are set to 0, this has no effect. Units: 625us Note: The connection event length as specified by the CE_LENGTH shall not exceed CONN_INTERVAL - 1.25 ms. The CE-length parameter, according to the Bluetooth specification, is the length of the connection event. Take an example to illustrate this scenario: Assume a connection with interval = 100ms. that the application has put allowed 20ms of CE-length. Here, the CE-length can be upto 100ms (100ms - 150us to be exact). If the connection is maintained for 5 minutes, there could be 10*60*5 = 3000 connection-intervals. The CE-length need not be maintained constant during all the 3000 connection events. Here are the typical cases that determine the value of CE-length: (1) No data packets exchanged. we are just maintaining time and frequency synchronization. In this case, only a packet pair will be exchanged every connection interval. Here, CE-length = 1. (2) Average of 10 packets to be sent per connection event. We can pump data in multiple ways here: 2.1: Send data at uniform rate : In this case, the CE-length will be enough to accommodate 10 packets, which will take about 7ms. As this is less than application enforced limit of 20ms, we can comfortably push all the 10 data packets in this connection interval. So data will be pumped to the other BT device at the same rate as is received from my application. 2.2: Can send data in bursts. Assume that we accumulate data for 1 second and pump out at the end of 1 second(this is not done by our Bluetooth stack, the application needs to buffer the data). So, at 10th connection interval, we have 100 packets accumulated. We are now ready to pump this data. 100 packets take about 70 ms. This is above the application enforced 20ms. So, the hardware can pump data that can fill up 20ms. The remaining data will be deferred to the next connection interval. So, in this case, you would see a CE-length spread over time like this (Per connection interval): 0,0,0,0,0,0,0,0,0,0, 20,20,20,10,0,0,0,0,0,0, 20,20,20,10,0,0,0,0,0,0, 20,20,20,10,0,0,0,0,0,0, and so on. (3) We are receiving data at the same rate as in (2). This case is to honor data sent by the other BT-device by giving it more time in the current connection interval. In (2) and (3) you will see non-empty packets either transmitted or received. We can also utilize the CE-length for different reasons: (4) A transaction is in progress, and we are expecting a response packet very soon. In this case, we may be exchanging only empty packets now, and in the next few packet-pairs. In this case, you will the CE-length to be large, and a non-empty packet may not be exchanged in all the slots.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - IV_SLAVE0

Bluetooth Low Energy Subsystem Miscellaneous - - Slave Initialization Vector 0
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - IV_SLAVE0 BLESS - IV_SLAVE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IV_SLAVE

IV_SLAVE : This is the IVs field, which contains the slave's portion of the initialization vector.
bits : 0 - 31 (32 bit)
access : read-write


BLELL - PDU_ACCESS_ADDR_L_REGISTER

Bluetooth Low Energy Link Layer - - Access address (lower)
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PDU_ACCESS_ADDR_L_REGISTER BLELL - PDU_ACCESS_ADDR_L_REGISTER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PDU_ACCESS_ADDRESS_LOWER_BITS

PDU_ACCESS_ADDRESS_LOWER_BITS : This field defines the lower 16 bits of the access address for each Link layer connection between any two devices.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - PDU_ACCESS_ADDR_H_REGISTER

Bluetooth Low Energy Link Layer - - Access address (upper)
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PDU_ACCESS_ADDR_H_REGISTER BLELL - PDU_ACCESS_ADDR_H_REGISTER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PDU_ACCESS_ADDRESS_HIGHER_BITS

PDU_ACCESS_ADDRESS_HIGHER_BITS : This field defines the higher 16 bits of the access address for each Link layer connection between any two devices.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_CE_INSTANT

Bluetooth Low Energy Link Layer - - Connection event instant
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_CE_INSTANT BLELL - CONN_CE_INSTANT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CE_INSTANT

CE_INSTANT : This is the value of the free running Connection Event counter when the new parameters of 'connection update' and/or 'Channel map update' will be effective. Range : 0x0000 to 0xFFFF
bits : 0 - 15 (16 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[12]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0x118F38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[12] BLELL - MMMS_DATA_MEM_DESCRIPTOR[12] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - CE_CNFG_STS_REGISTER

Bluetooth Low Energy Link Layer - - connection configuration and status register
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CE_CNFG_STS_REGISTER BLELL - CE_CNFG_STS_REGISTER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_LIST_INDEX_LAST_ACK_INDEX DATA_LIST_HEAD_UP SPARE MD MAP_INDEX__CURR_INDEX PAUSE_DATA CONN_ACTIVE CURRENT_PDU_INDEX

DATA_LIST_INDEX_LAST_ACK_INDEX : Data list index for start/resume. This field must be valid along with data_list_head_up and indicate the transmit packet buffer index at which the data is loaded. The default number of buffers in the IP is 5,but may be customized for a customer. The buffers are in-dexed 0 to 4. Hardware will start the next data transmission from the index indicated by this field.
bits : 0 - 3 (4 bit)
access : read-write

DATA_LIST_HEAD_UP : Update the first packet buffer index ready for transmis-sion to start/resume data transfer after a pause. The bit must be toggled every time the firmware needs to indicate the start/resume. This requires a read modify write operation.
bits : 4 - 8 (5 bit)
access : read-write

SPARE : This bit is unused
bits : 5 - 10 (6 bit)
access : read-write

MD : MD bit set to '1' indicates device has more data to be sent.
bits : 6 - 12 (7 bit)
access : read-write

MAP_INDEX__CURR_INDEX : Written by firmware to select the map index to be used by hardware for this connection. 1 - use channel map register set 1. 0 - use channel map register set 0. When firmware reads this field, it returns the current map index being used in hardware.
bits : 7 - 14 (8 bit)
access : read-write

PAUSE_DATA : Pause data. 1 - pause data, 0 - do not pause. The current_pdu_index in hardware does not move to next in-dex until pause_data is cleared. But if the SENT bit is set for the current_pdu_index as which pause is set, data will be sent out
bits : 8 - 16 (9 bit)
access : read-write

CONN_ACTIVE : This bit is '1' whenever the connection is active.
bits : 10 - 20 (11 bit)
access : read-only

CURRENT_PDU_INDEX : The index of the transmit packet buffer that is currently in transmission/waiting for transmission.
bits : 12 - 27 (16 bit)
access : read-only


BLELL - NEXT_CE_INSTANT

Bluetooth Low Energy Link Layer - - Next connection event instant
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - NEXT_CE_INSTANT BLELL - NEXT_CE_INSTANT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NEXT_CE_INSTANT

NEXT_CE_INSTANT : 16-bit internal reference clock value at which the next connection event will occur on a connection. The connection index register must be programmed with index of the connection, before reading the register. The reset value is 0x0000. After reset deassertion, then the very next clock, the value assigned to the registers is 0xFFFF.
bits : 0 - 15 (16 bit)
access : read-only


BLESS - MIC_IN0

Bluetooth Low Energy Subsystem Miscellaneous - - MIC input register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - MIC_IN0 BLESS - MIC_IN0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MIC_IN

MIC_IN : This is the MIC field used for CCM decryption.
bits : 0 - 31 (32 bit)
access : read-write


BLELL - CONN_CE_COUNTER

Bluetooth Low Energy Link Layer - - connection event counter
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_CE_COUNTER BLELL - CONN_CE_COUNTER read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONNECTION_EVENT_COUNTER

CONNECTION_EVENT_COUNTER : This is the free running counter, connEventCounter as defined by Bluetooth spec. Firmware will read the instantaneous Event counter from this register, during connection update and channel map update procedure. Firmware will use this value to calculate the instant from which the new parameters (for connection update and channel map update) will be effective.
bits : 0 - 15 (16 bit)
access : read-only


BLESS - MIC_OUT0

Bluetooth Low Energy Subsystem Miscellaneous - - MIC output register
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - MIC_OUT0 BLESS - MIC_OUT0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MIC_OUT

MIC_OUT : This is the MIC generated during CCM encryption.
bits : 0 - 31 (32 bit)
access : read-only


BLELL - DATA_LIST_SENT_UPDATE__STATUS

Bluetooth Low Energy Link Layer - - data list sent update and status
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_LIST_SENT_UPDATE__STATUS BLELL - DATA_LIST_SENT_UPDATE__STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIST_INDEX__TX_SENT_3_0 SET_CLEAR

LIST_INDEX__TX_SENT_3_0 : Write:Indicates the buffer index for which the SENT bit is being updated by firmware. The default number of buffers in the IP is 4. The index range is 0-3. Read: Reads TX_SENT[3:0]. The bits in this field indicate the status of the SENT bit in the hard-ware for each packet buffer. The bit values are 1 - queued 0 - no packet / packet ack received by hardware Example1: If the read value is : 0x03, then packets in buffer 0 and buffer 1 are in the queue to be transmitted. All the other FIFOs are empty or hardware has cleared them after receiving acknowledgement. NOTE: The SENT status bit and ACK status bit have to be taken together to understand the meaning of packet status. The table below describes how the two bits are sequentially updated by either hardware/firmware to complete one data transmission. SENT ACK Description 0 0 Buffer is empty. No packet is queued in the buffer 1 0 Packet is queued by firmware. 1 1 Packet is transmitted by hardware. Hardware is waiting for acknowledgement. 0 1 Hardware has received ACK. Firmware has not yet processed the ACK. 0 0 Firmware has processed the ack. The buffer is again empty.
bits : 0 - 3 (4 bit)
access : read-write

SET_CLEAR : Write: Used to set the SENT bit in hardware for the selected packet buffer. 1 - packet queued When firmware has a packet to send, firmware first loads the next available packet buffer. Then the hardware SENT bit is set by writing 1 to this bit field along with the list_index field that identified the buffer index. This indicates that a packet has been queued in the data buffer for sending. This packet is now ready to be transmitted. The SENT bit in hardware is cleared by hardware only when it has received an acknowledgement from the remote device. Firmware typically does not clear the bit. However, It only clears the bit on its own if it needs to 'flush' a packet from the buffer, without waiting to receive acknowledgement from the remote device, firmware clears BIT7 along with the list_index specified.
bits : 7 - 14 (8 bit)
access : write-only


BLESS - ENC_PARAMS

Bluetooth Low Energy Subsystem Miscellaneous - - Encryption Parameter register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - ENC_PARAMS BLESS - ENC_PARAMS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_PDU_HEADER PAYLOAD_LENGTH_LSB DIRECTION PAYLOAD_LENGTH_LSB_EXT MEM_LATENCY_HIDE

DATA_PDU_HEADER : LLID of the packet.
bits : 0 - 1 (2 bit)
access : read-write

PAYLOAD_LENGTH_LSB : Length of the input data.
bits : 2 - 8 (7 bit)
access : read-write

DIRECTION : The directionBit shall be set to '1' for Data Channel PDUs sent by the master and set to '0' for Data Channel PDUs sent by the slave.
bits : 7 - 14 (8 bit)
access : read-write

PAYLOAD_LENGTH_LSB_EXT : 3 Most significant bits of the LS byte of the length of the input data. Valid only when DLE is enabled. When DLE is enabled total ENC payload length = {PAYLOAD_LENGTH_LSB_EXT, PAYLOAD_LENGTH_LSB}
bits : 8 - 18 (11 bit)
access : read-write

MEM_LATENCY_HIDE : Controls the encryption memory access mode. Valid only when DLE is enabled. 0 - The AES is idle while memory fetch/store in progress. 1- The AES is pipelined while memory fetch/store in progress.
bits : 11 - 22 (12 bit)
access : read-write


BLELL - CONN_1_PARAM_MEM_BASE_ADDR

Bluetooth Low Energy Link Layer - - Connection Parameter memory base address for connection 1
address_offset : 0x12800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_1_PARAM_MEM_BASE_ADDR BLELL - CONN_1_PARAM_MEM_BASE_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_1_PARAM

CONN_1_PARAM : N/A
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_2_PARAM_MEM_BASE_ADDR

Bluetooth Low Energy Link Layer - - Connection Parameter memory base address for connection 2
address_offset : 0x12880 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_2_PARAM_MEM_BASE_ADDR BLELL - CONN_2_PARAM_MEM_BASE_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_2_PARAM

CONN_2_PARAM : N/A
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_3_PARAM_MEM_BASE_ADDR

Bluetooth Low Energy Link Layer - - Connection Parameter memory base address for connection 3
address_offset : 0x12900 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_3_PARAM_MEM_BASE_ADDR BLELL - CONN_3_PARAM_MEM_BASE_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_3_PARAM

CONN_3_PARAM : N/A
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_4_PARAM_MEM_BASE_ADDR

Bluetooth Low Energy Link Layer - - Connection Parameter memory base address for connection 4
address_offset : 0x12980 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_4_PARAM_MEM_BASE_ADDR BLELL - CONN_4_PARAM_MEM_BASE_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_4_PARAM

CONN_4_PARAM : N/A
bits : 0 - 15 (16 bit)
access : read-write


BLELL - DATA_LIST_ACK_UPDATE__STATUS

Bluetooth Low Energy Link Layer - - data list ack update and status
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_LIST_ACK_UPDATE__STATUS BLELL - DATA_LIST_ACK_UPDATE__STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIST_INDEX__TX_ACK_3_0 SET_CLEAR

LIST_INDEX__TX_ACK_3_0 : Write: Indicates the buffer index for which the ACK bit is being updated by firmware. The default number of buffers in the IP is 5. The index range is 0-4. Read: Reads TX_ACK[3:0] If a particular bit is set, then the packet in the selected buffer has been transmitted (at least once) by the hardware and hardware is waiting for acknowledgement. Example1 : If the read value is : 0x03, then packets in FIFO-0 and FIFO-1 are acknowledged by the remote device. These acknowledgements are pending to be processed by firmware. Example2 : If the read value is : 0x02, then packet FIFO-1 is acknowledged by the remote device. This acknowledgement is pending to be processed by firmware. NOTE: The SENT status bit and ACK status bit have to be taken together to understand the meaning of packet status. The table below describes how the two bits are sequentially updated by either hardware/firmware to complete one data transmission. SENT ACK Description 0 0 Buffer is empty. No packet is queued in the buffer 1 0 Packet is queued by firmware. 1 1 Packet is transmitted by hardware. Hardware is waiting for acknowledgement. 0 1 Hardware has received ACK. Firmware has not yet processed the ACK. 0 0 Firmware has processed the ack. The buffer is again empty.
bits : 0 - 3 (4 bit)
access : read-write

SET_CLEAR : Write: Firmware uses the field to clear and ACK bit in the hardware to indicate that the acknowledgement for the transmit packet has been received and processed by firmware. Firmware clears the ACK bit in the hardware by writing in this register only after the acknowledgement is processed successfully by firmware. For clearing ack for a packet transmitted in fifo-index : '3', firm-ware will write '3' in the 'list-index' field and set this bit (BIT7) to 0. This is the indication that the corresponding packet buffer identi-fied by List-Index is cleared of previous transmission and can be re-used for another packet from now on. The ACK bit in hardware is set by hardware when it has success-fully transmitted a packet.
bits : 7 - 14 (8 bit)
access : write-only


BLESS - ENC_CONFIG

Bluetooth Low Energy Subsystem Miscellaneous - - Encryption Configuration
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - ENC_CONFIG BLESS - ENC_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 START_PROC ECB_CCM DEC_ENC PAYLOAD_LENGTH_MSB B0_FLAGS AES_B0_DATA_OVERRIDE

START_PROC : 1 Start the AES processing
bits : 0 - 0 (1 bit)
access : read-write

ECB_CCM : 0 - CCM 1 - ECB
bits : 1 - 2 (2 bit)
access : read-write

DEC_ENC : Decryption/Encryption 0 - Encrypt 1 - Decrypt
bits : 2 - 4 (3 bit)
access : read-write

PAYLOAD_LENGTH_MSB : MS byte of the length of the input data when B0 needs to be completely configurable. Valid only when AES_B0_DATA_OVERRIDE is enabled. When AES_B0_DATA_OVERRIDE is enabled total ENC payload length = {PAYLOAD_LENGTH_MSB, PAYLOAD_LENGTH_MSB, PAYLOAD_LENGTH}
bits : 8 - 23 (16 bit)
access : read-write

B0_FLAGS : LS byte of the input data when B0 needs to be completely configurable. Valid only when AES_B0_DATA_OVERRIDE is enabled.
bits : 16 - 39 (24 bit)
access : read-write

AES_B0_DATA_OVERRIDE : Configuration to use B0 DATA provided by FW for CCM computation
bits : 24 - 48 (25 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[13]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0x12D06C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[13] BLELL - MMMS_DATA_MEM_DESCRIPTOR[13] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - CE_CNFG_STS_REGISTER_EXT

Bluetooth Low Energy Link Layer - - connection configuration and status register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CE_CNFG_STS_REGISTER_EXT BLELL - CE_CNFG_STS_REGISTER_EXT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TX_2M RX_2M SN NESN LAST_UNMAPPED_CHANNEL

TX_2M : transmittion on 2M
bits : 0 - 0 (1 bit)
access : read-write

RX_2M : receiving on 2M
bits : 1 - 2 (2 bit)
access : read-write

SN : Sequence number for next scheduled connection index
bits : 2 - 4 (3 bit)
access : read-write

NESN : Next Sequence number for next scheduled connection index
bits : 3 - 6 (4 bit)
access : read-write

LAST_UNMAPPED_CHANNEL : Last unmapped channel for next scheduled connection index
bits : 8 - 21 (14 bit)
access : read-write


BLESS - ENC_INTR_EN

Bluetooth Low Energy Subsystem Miscellaneous - - Encryption Interrupt enable
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - ENC_INTR_EN BLESS - ENC_INTR_EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AUTH_PASS_INTR_EN ECB_PROC_INTR_EN CCM_PROC_INTR_EN

AUTH_PASS_INTR_EN : Authentication interrupt enable 0 - Disable 1 - Enable
bits : 0 - 0 (1 bit)
access : read-write

ECB_PROC_INTR_EN : ECB processed interrupt enable 0 - Disable 1 - Enable
bits : 1 - 2 (2 bit)
access : read-write

CCM_PROC_INTR_EN : CCM processed interupt enable 0 - Disable 1 - Enable
bits : 2 - 4 (3 bit)
access : read-write


BLELL - CONN_EXT_INTR

Bluetooth Low Energy Link Layer - - Connection extended interrupt status and Clear register
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_EXT_INTR BLELL - CONN_EXT_INTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATARATE_UPDATE EARLY_INTR GEN_TIMER_INTR

DATARATE_UPDATE : If this bit is set it indicates that the data rate is updated If this bit is written with 1, it clears the interrupt status bit
bits : 0 - 0 (1 bit)
access : read-write

EARLY_INTR : For master this bit is set on start_ce For Slave this bit is set on slave_timer_adj
bits : 1 - 2 (2 bit)
access : read-write

GEN_TIMER_INTR : If this bit is set it indicates that the generic timer (PDU response timer reconfigured in MMMS mode) has expired If this bit is written with 1, it clears the interrupt status bit
bits : 2 - 4 (3 bit)
access : read-write


BLESS - ENC_INTR

Bluetooth Low Energy Subsystem Miscellaneous - - Encryption Interrupt status and clear register
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - ENC_INTR BLESS - ENC_INTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AUTH_PASS_INTR ECB_PROC_INTR CCM_PROC_INTR IN_DATA_CLEAR

AUTH_PASS_INTR : Authentication interrupt. 0x1- indicates MIC matched 0x0 -indicated MIC mismatched Writing 1 to this register clears the interrupt.
bits : 0 - 0 (1 bit)
access : read-write

ECB_PROC_INTR : ECB processed interrupt. Writing 1 to this register clears the interrupt.
bits : 1 - 2 (2 bit)
access : read-write

CCM_PROC_INTR : CCM processed interrupt. Writing 1 to this register clears the interrupt
bits : 2 - 4 (3 bit)
access : read-write

IN_DATA_CLEAR : Clears the input data. Used for Zero padding of encryption for less than block sized data.
bits : 3 - 6 (4 bit)
access : read-write


BLELL - CONN_EXT_INTR_MASK

Bluetooth Low Energy Link Layer - - Connection Extended Interrupt mask
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_EXT_INTR_MASK BLELL - CONN_EXT_INTR_MASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATARATE_UPDATE EARLY_INTR GEN_TIMER_INTR

DATARATE_UPDATE : If this bit is set connection data rate update interrupt is enabled.
bits : 0 - 0 (1 bit)
access : read-write

EARLY_INTR : If this bit is set connection early interrupt is enabled.
bits : 1 - 2 (2 bit)
access : read-write

GEN_TIMER_INTR : Generic timer (PDU response timer reconfigured in MMMS mode) expiry interrupt
bits : 2 - 4 (3 bit)
access : read-write


RCB - TX_FIFO_CTRL

Radio Control Bus (RCB) controller - - Transmitter FIFO control register.
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - TX_FIFO_CTRL RCB - TX_FIFO_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TX_TRIGGER_LEVEL CLEAR

TX_TRIGGER_LEVEL : Trigger level. When the transmitter FIFO has less entries than the number of this field, a transmitter trigger event is generated.
bits : 0 - 4 (5 bit)
access : read-write

CLEAR : When '1', the transmitter FIFO and transmitter shift register are cleared/invalidated. Invalidation will last for as long as this field is '1'. If a quick clear/invalidation is required, the field should be set to '1' and be followed by a set to '0'. If a clear/invalidation is required for an extended time period, the field should be set to '1' during the complete time period.
bits : 16 - 32 (17 bit)
access : read-write


RCB - - RCBLL - INTR_SET

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - Master interrupt set request register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - INTR_SET RCB - - RCBLL - INTR_SET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCB_LL_DONE SINGLE_WRITE_DONE SINGLE_READ_DONE

RCB_LL_DONE : Write with '1' to set corresponding bit in interrupt request register.
bits : 0 - 0 (1 bit)
access : read-write

SINGLE_WRITE_DONE : N/A
bits : 2 - 4 (3 bit)
access : read-write

SINGLE_READ_DONE : N/A
bits : 3 - 6 (4 bit)
access : read-write


BLELL - NI_TIMER

Bluetooth Low Energy Link Layer - - Next Instant Timer
address_offset : 0x14000 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - NI_TIMER BLELL - NI_TIMER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NI_TIMER

NI_TIMER : BT Slot at which the next connection has to be serviced, granularity is 625us. The NI timer has to be programmed 1.25ms before the connection event
bits : 0 - 15 (16 bit)
access : read-write


BLELL - US_OFFSET

Bluetooth Low Energy Link Layer - - Micro-second Offset
address_offset : 0x14004 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - US_OFFSET BLELL - US_OFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 US_OFFSET_SLOT_BOUNDARY

US_OFFSET_SLOT_BOUNDARY : Micro Second Offset from the Slot Bounday at which the connection programmed in NEXT_CONN has to be serviced. This register along with NI_TIMER has to be programmed 1.25ms before the connection event. The granularity is 1us
bits : 0 - 9 (10 bit)
access : read-write


BLELL - NEXT_CONN

Bluetooth Low Energy Link Layer - - Next Connection
address_offset : 0x14008 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - NEXT_CONN BLELL - NEXT_CONN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NEXT_CONN_INDEX NEXT_CONN_TYPE NI_VALID

NEXT_CONN_INDEX : Connection Index to be serviced. Allowed values are 0,1,2,3.
bits : 0 - 4 (5 bit)
access : read-write

NEXT_CONN_TYPE : Connection type 1 - Master Connection 0 - Slave Connection
bits : 5 - 10 (6 bit)
access : read-write

NI_VALID : Flag indication if programmed NI_TIMER is valid. FW sets this bit to indicate that the NI_TIMER is programmed. HW clears this bit on servicing the connection of if NI_TIMER is pointing to past value
bits : 6 - 12 (7 bit)
access : read-write


BLELL - NI_ABORT

Bluetooth Low Energy Link Layer - - Abort next scheduled connection
address_offset : 0x1400C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - NI_ABORT BLELL - NI_ABORT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NI_ABORT ABORT_ACK

NI_ABORT : Setting this bit clears the schedule NI
bits : 0 - 0 (1 bit)
access : read-write

ABORT_ACK : This bit will set if the scheduled NI is aborted
bits : 1 - 2 (2 bit)
access : read-write


BLELL - CONN_NI_STATUS

Bluetooth Low Energy Link Layer - - Connection NI Status
address_offset : 0x14020 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_NI_STATUS BLELL - CONN_NI_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_NI

CONN_NI : HW updates this register with the next Connection Instant for current serviced connection, granularity is 625us. The reset value is 0x0000. After reset deassertion, then the very next clock, the value assigned to the registers is 0xFFFF.
bits : 0 - 15 (16 bit)
access : read-only


BLELL - NEXT_SUP_TO_STATUS

Bluetooth Low Energy Link Layer - - Next Supervision timeout Status
address_offset : 0x14024 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - NEXT_SUP_TO_STATUS BLELL - NEXT_SUP_TO_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NEXT_SUP_TO

NEXT_SUP_TO : HW updates this register for the SuperVision timeout next instant, granularity is 625us
bits : 0 - 15 (16 bit)
access : read-only


BLELL - MMMS_CONN_STATUS

Bluetooth Low Energy Link Layer - - Connection Status
address_offset : 0x14028 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_CONN_STATUS BLELL - MMMS_CONN_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURR_CONN_INDEX CURR_CONN_TYPE SN_CURR NESN_CURR LAST_UNMAPPED_CHANNEL PKT_MISS ANCHOR_PT_STATE

CURR_CONN_INDEX : Connection Index that was serviced. Legal values are 0,1,2,3.
bits : 0 - 4 (5 bit)
access : read-only

CURR_CONN_TYPE : Connection type 1 - Master Connection 0 - Slave Connection
bits : 5 - 10 (6 bit)
access : read-only

SN_CURR : Sequence Number of Packets exchanged
bits : 6 - 12 (7 bit)
access : read-only

NESN_CURR : Next Sequence Number
bits : 7 - 14 (8 bit)
access : read-only

LAST_UNMAPPED_CHANNEL : Last Unmapped Channel
bits : 8 - 21 (14 bit)
access : read-only

PKT_MISS : 1 - Packet Missed 0 - Connection exchanged packets
bits : 14 - 28 (15 bit)
access : read-only

ANCHOR_PT_STATE : Anchor Point State 0 - Anchor point missed 1 - Anchor point established
bits : 15 - 30 (16 bit)
access : read-only


BLELL - BT_SLOT_CAPT_STATUS

Bluetooth Low Energy Link Layer - - BT Slot Captured Status
address_offset : 0x1402C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - BT_SLOT_CAPT_STATUS BLELL - BT_SLOT_CAPT_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BT_SLOT

BT_SLOT : During slave connection event, HW updates this register with the captured BT_SLOT at anchor point, granularity is 625us
bits : 0 - 15 (16 bit)
access : read-only


BLELL - US_CAPT_STATUS

Bluetooth Low Energy Link Layer - - Micro-second Capture Status
address_offset : 0x14030 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - US_CAPT_STATUS BLELL - US_CAPT_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 US_CAPT

US_CAPT : During slave connection event, HW updates this register with the captured microsecond at anchor point, granularity is 1us
bits : 0 - 9 (10 bit)
access : read-only


BLELL - US_OFFSET_STATUS

Bluetooth Low Energy Link Layer - - Micro-second Offset Status
address_offset : 0x14034 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - US_OFFSET_STATUS BLELL - US_OFFSET_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 US_OFFSET

US_OFFSET : During slave connection event, HW updates this register with the calculated us_offset at anchor point, granularity is 1us. The reset value is 0x0000. After reset deassertion, then the very next clock, the value assigned to the registers is 0x00D5.
bits : 0 - 15 (16 bit)
access : read-only


BLELL - ACCU_WINDOW_WIDEN_STATUS

Bluetooth Low Energy Link Layer - - Accumulated Window Widen Status
address_offset : 0x14038 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - ACCU_WINDOW_WIDEN_STATUS BLELL - ACCU_WINDOW_WIDEN_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACCU_WINDOW_WIDEN

ACCU_WINDOW_WIDEN : Accumulated Window Widen Value. HW updates this register at the close of slave connection event
bits : 0 - 15 (16 bit)
access : read-only


BLELL - EARLY_INTR_STATUS

Bluetooth Low Energy Link Layer - - Status when early interrupt is raised
address_offset : 0x1403C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - EARLY_INTR_STATUS BLELL - EARLY_INTR_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_INDEX_FOR_EARLY_INTR CONN_TYPE_FOR_EARLY_INTR US_FOR_EARLY_INTR

CONN_INDEX_FOR_EARLY_INTR : Connection Index for which early interrupt is raised
bits : 0 - 4 (5 bit)
access : read-only

CONN_TYPE_FOR_EARLY_INTR : Connection type for which early interrupt is raised.
bits : 5 - 10 (6 bit)
access : read-only

US_FOR_EARLY_INTR : US offset when early interrupt is raised
bits : 6 - 21 (16 bit)
access : read-only


BLELL - MMMS_CONFIG

Bluetooth Low Energy Link Layer - - Multi-Master Multi-Slave Config
address_offset : 0x14040 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_CONFIG BLELL - MMMS_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MMMS_ENABLE DISABLE_CONN_REQ_PARAM_IN_MEM DISABLE_CONN_PARAM_MEM_WR CONN_PARAM_FROM_REG ADV_CONN_INDEX CE_LEN_IMMEDIATE_EXPIRE RESET_RX_FIFO_PTR

MMMS_ENABLE : Configuration bit to enable MMMS functionality
bits : 0 - 0 (1 bit)
access : read-write

DISABLE_CONN_REQ_PARAM_IN_MEM : If set to 1'b1 and MMMS enabled, then the parameters received in connection request are not stored in CONN_REQ_PARAM memory. By default this bit is 1'b0 and the connection request parameters are stored in connection memory. This bit is intended as a fail-safe. Should not be changed dynamically during runtime
bits : 1 - 2 (2 bit)
access : read-write

DISABLE_CONN_PARAM_MEM_WR : By default on end_ce, the connection parameters memory is loaded with the updated connection parameters. Setting this bit prevent's this update. This bit is intended as a fail-safe. Should not be changed dynamically during runtime
bits : 2 - 4 (3 bit)
access : read-write

CONN_PARAM_FROM_REG : By default the parameters for the connection are picked up from the connection parameters memory. Setting this bit disables this and the parameters are picked up from registers 0 - HW loads the parameters from connection memory 1 - Firmware should program the paramters for the connection event This bit is intended as a fail-safe. Should not be changed dynamically during runtime
bits : 3 - 6 (4 bit)
access : read-write

ADV_CONN_INDEX : This field specifies the connection index for which ADV is enabled
bits : 4 - 12 (9 bit)
access : read-write

CE_LEN_IMMEDIATE_EXPIRE : Enable for CE length immediate expiry
bits : 9 - 18 (10 bit)
access : read-write

RESET_RX_FIFO_PTR : Setting this bit resets the receive FIFO pointers
bits : 10 - 20 (11 bit)
access : read-write


BLELL - US_COUNTER

Bluetooth Low Energy Link Layer - - Running US of the current BT Slot
address_offset : 0x14044 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - US_COUNTER BLELL - US_COUNTER read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 US_COUNTER

US_COUNTER : Current value of the US Counter
bits : 0 - 9 (10 bit)
access : read-only


BLELL - US_CAPT_PREV

Bluetooth Low Energy Link Layer - - Previous captured US of the BT Slot
address_offset : 0x14048 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - US_CAPT_PREV BLELL - US_CAPT_PREV read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 US_CAPT_LOAD

US_CAPT_LOAD : HW uses this register to load the us_offset from connection parameter memory. This can be used by firmware as a fail safe option if the HW load from memory is disabled. In alll other conditions firmware should not use this register.
bits : 0 - 9 (10 bit)
access : read-write


BLELL - EARLY_INTR_NI

Bluetooth Low Energy Link Layer - - NI at early interrupt
address_offset : 0x1404C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - EARLY_INTR_NI BLELL - EARLY_INTR_NI read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EARLY_INTR_NI

EARLY_INTR_NI : Connection Next instant when the early interrupt is triggered
bits : 0 - 15 (16 bit)
access : read-only


BLELL - MMMS_MASTER_CREATE_BT_CAPT

Bluetooth Low Energy Link Layer - - BT slot capture for master connection creation
address_offset : 0x14080 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_MASTER_CREATE_BT_CAPT BLELL - MMMS_MASTER_CREATE_BT_CAPT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BT_SLOT

BT_SLOT : This register captures the BT_SLOT when master connection is created, granularity is 625us
bits : 0 - 15 (16 bit)
access : read-only


BLELL - MMMS_SLAVE_CREATE_BT_CAPT

Bluetooth Low Energy Link Layer - - BT slot capture for slave connection creation
address_offset : 0x14084 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_SLAVE_CREATE_BT_CAPT BLELL - MMMS_SLAVE_CREATE_BT_CAPT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 US_CAPT

US_CAPT : This register captures the BT_SLOT when slave connection is created, granularity is 625us
bits : 0 - 9 (10 bit)
access : read-only


BLELL - MMMS_SLAVE_CREATE_US_CAPT

Bluetooth Low Energy Link Layer - - Micro second capture for slave connection creation
address_offset : 0x14088 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_SLAVE_CREATE_US_CAPT BLELL - MMMS_SLAVE_CREATE_US_CAPT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 US_OFFSET_SLAVE_CREATED

US_OFFSET_SLAVE_CREATED : This register captures the us when slave connection is created, granularity is 1us
bits : 0 - 15 (16 bit)
access : read-only


BLELL - MMMS_DATA_MEM_DESCRIPTOR[14]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0x1411A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[14] BLELL - MMMS_DATA_MEM_DESCRIPTOR[14] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - CONN_1_DATA_LIST_SENT

Bluetooth Low Energy Link Layer - - data list sent update and status for connection 1
address_offset : 0x14200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_1_DATA_LIST_SENT BLELL - CONN_1_DATA_LIST_SENT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIST_INDEX__TX_SENT_3_0_C1 SET_CLEAR_C1 BUFFER_NUM_TX_SENT_3_0_C1

LIST_INDEX__TX_SENT_3_0_C1 : Write:Indicates the buffer index for which the SENT bit is being updated by firmware. The default number of buffers in the IP is 5. The index range is 0-3. Read: Reads TX_SENT[3:0]. The bits in this field indicate the status of the SENT bit in the hard-ware for each packet buffer. The bit values are 1 - queued 0 - no packet / packet ack received by hardware Example1: If the read value is : 0x03, then packets in buffer 0 and buffer 1 are in the queue to be transmitted. All the other FIFOs are empty or hardware has cleared them after receiving acknowledgement.
bits : 0 - 3 (4 bit)
access : read-write

SET_CLEAR_C1 : Write: Used to set the SENT bit in hardware for the selected packet buffer. 1 - packet queued When firmware has a packet to send, firmware first loads the next available packet buffer. Then the hardware SENT bit is set by writing 1 to this bit field along with the list_index field that identified the buffer index. This indicates that a packet has been queued in the data buffer for sending. This packet is now ready to be transmitted. The SENT bit in hardware is cleared by hardware only when it has received an acknowledgement from the remote device. Firmware typically does not clear the bit. However, It only clears the bit on its own if it needs to 'flush' a packet from the buffer, without waiting to receive acknowledgement from the remote device, firmware clears BIT7 along with the list_index specified.
bits : 7 - 14 (8 bit)
access : write-only

BUFFER_NUM_TX_SENT_3_0_C1 : Write: Indicates the buffer number for which SENT bit is updated by firmware. This is the mapping of the list index to the physical transmit buffer. The total number of transmit buffers is 16, can be shared with up to 8 connections
bits : 8 - 19 (12 bit)
access : read-write


BLELL - CONN_1_DATA_LIST_ACK

Bluetooth Low Energy Link Layer - - data list ack update and status for connection 1
address_offset : 0x14204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_1_DATA_LIST_ACK BLELL - CONN_1_DATA_LIST_ACK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIST_INDEX__TX_ACK_3_0_C1 SET_CLEAR_C1

LIST_INDEX__TX_ACK_3_0_C1 : Write: Indicates the buffer index for which the ACK bit is being updated by firmware. The default number of buffers in the IP is 5. The index range is 0-3. Read: Reads TX_ACK[3:0] If a particular bit is set, then the packet in the selected buffer has been transmitted (at least once) by the hardware and hardware is waiting for acknowledgement. Example1 : If the read value is : 0x03, then packets in FIFO-0 and FIFO-1 are acknowledged by the remote device. These acknowledgements are pending to be processed by firmware. Example2 : If the read value is : 0x02, then packet FIFO-1 is acknowledged by the remote device. This acknowledgement is pending to be processed by firmware.
bits : 0 - 3 (4 bit)
access : read-write

SET_CLEAR_C1 : Write: Firmware uses the field to clear and ACK bit in the hardware to indicate that the acknowledgement for the transmit packet has been received and processed by firmware. Firmware clears the ACK bit in the hardware by writing in this register only after the acknowledgement is processed successfully by firmware. For clearing ack for a packet transmitted in fifo-index : '3', firm-ware will write '3' in the 'list-index' field and set this bit (BIT7) to 0. This is the indication that the corresponding packet buffer identi-fied by List-Index is cleared of previous transmission and can be re-used for another packet from now on. The ACK bit in hardware is set by hardware when it has success-fully transmitted a packet.
bits : 7 - 14 (8 bit)
access : write-only


BLELL - CONN_1_CE_DATA_LIST_CFG

Bluetooth Low Energy Link Layer - - Connection specific pause resume for connection 1
address_offset : 0x14208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_1_CE_DATA_LIST_CFG BLELL - CONN_1_CE_DATA_LIST_CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_LIST_INDEX_LAST_ACK_INDEX_C1 DATA_LIST_HEAD_UP_C1 SLV_MD_CONFIG_C1 MD_C1 MD_BIT_CLEAR_C1 PAUSE_DATA_C1 KILL_CONN KILL_CONN_AFTER_TX EMPTYPDU_SENT CURRENT_PDU_INDEX_C1

DATA_LIST_INDEX_LAST_ACK_INDEX_C1 : Data list index for start/resume. This field must be valid along with data_list_head_up and indicate the transmit packet buffer index at which the data is loaded. The default number of buffers in the IP is 5,but may be customized for a customer. The buffers are in-dexed 0 to 4. Hardware will start the next data transmission from the index indicated by this field.
bits : 0 - 3 (4 bit)
access : read-write

DATA_LIST_HEAD_UP_C1 : Update the first packet buffer index ready for transmis-sion to start/resume data transfer after a pause. The bit must be set every time the firmware needs to indicate the start/resume.
bits : 4 - 8 (5 bit)
access : read-write

SLV_MD_CONFIG_C1 : This bit is set to configure the MD bit control when the design is in slave mode. 1 - MD bit will be decided on packet pending status 0 - MD bit will be decided on packet queued in next buffer status This bit has valid only when MD_BIT_CLEAR bit is not set
bits : 5 - 10 (6 bit)
access : read-write

MD_C1 : MD bit set to '1' indicates device has more data to be sent.
bits : 6 - 12 (7 bit)
access : read-write

MD_BIT_CLEAR_C1 : This register field indicates whether the MD (More Data) bit needs to be controlled by 'software' or, 'hardware and software logic combined' 1 - MD bit is exclusively controlled by software, based on status of bit [6]. 0 - MD Bit in the transmitted PDU is controlled by software and hardware logic. MD bit is set in transmitted packet, only if the software has set the MD in bit [6] and either of the following conditions is true, a) If there are packets queued for transmission. b) If there is an acknowledgement awaited from the remote side for the packet transmitted.
bits : 7 - 14 (8 bit)
access : read-write

PAUSE_DATA_C1 : Pause data. 1 - pause data, 0 - do not pause. The current_pdu_index in hardware does not move to next in-dex until pause_data is cleared. But if the SENT bit is set for the current_pdu_index as which pause is set, data will be sent out
bits : 8 - 16 (9 bit)
access : read-write

KILL_CONN : Kills the connection immediately when the connection event is active
bits : 9 - 18 (10 bit)
access : read-write

KILL_CONN_AFTER_TX : Kills the connection when the connection event is active and a TX is completed
bits : 10 - 20 (11 bit)
access : read-write

EMPTYPDU_SENT : This bit indicates if EMPTYPDU has been sent. IF ACK is received this bit will be cleared by HW
bits : 11 - 22 (12 bit)
access : read-write

CURRENT_PDU_INDEX_C1 : The index of the transmit packet buffer that is currently in transmission/waiting for transmission.
bits : 12 - 27 (16 bit)
access : read-only


BLELL - CONN_2_DATA_LIST_SENT

Bluetooth Low Energy Link Layer - - data list sent update and status for connection 2
address_offset : 0x14210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_2_DATA_LIST_SENT BLELL - CONN_2_DATA_LIST_SENT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIST_INDEX__TX_SENT_3_0_C1 SET_CLEAR_C1 BUFFER_NUM_TX_SENT_3_0_C1

LIST_INDEX__TX_SENT_3_0_C1 : Write:Indicates the buffer index for which the SENT bit is being updated by firmware. The default number of buffers in the IP is 5. The index range is 0-3. Read: Reads TX_SENT[3:0]. The bits in this field indicate the status of the SENT bit in the hard-ware for each packet buffer. The bit values are 1 - queued 0 - no packet / packet ack received by hardware Example1: If the read value is : 0x03, then packets in buffer 0 and buffer 1 are in the queue to be transmitted. All the other FIFOs are empty or hardware has cleared them after receiving acknowledgement.
bits : 0 - 3 (4 bit)
access : read-write

SET_CLEAR_C1 : Write: Used to set the SENT bit in hardware for the selected packet buffer. 1 - packet queued When firmware has a packet to send, firmware first loads the next available packet buffer. Then the hardware SENT bit is set by writing 1 to this bit field along with the list_index field that identified the buffer index. This indicates that a packet has been queued in the data buffer for sending. This packet is now ready to be transmitted. The SENT bit in hardware is cleared by hardware only when it has received an acknowledgement from the remote device. Firmware typically does not clear the bit. However, It only clears the bit on its own if it needs to 'flush' a packet from the buffer, without waiting to receive acknowledgement from the remote device, firmware clears BIT7 along with the list_index specified.
bits : 7 - 14 (8 bit)
access : write-only

BUFFER_NUM_TX_SENT_3_0_C1 : Write: Indicates the buffer number for which SENT bit is updated by firmware. This is the mapping of the list index to the physical transmit buffer. The total number of transmit buffers is 16, can be shared with up to 8 connections
bits : 8 - 19 (12 bit)
access : read-write


BLELL - CONN_2_DATA_LIST_ACK

Bluetooth Low Energy Link Layer - - data list ack update and status for connection 2
address_offset : 0x14214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_2_DATA_LIST_ACK BLELL - CONN_2_DATA_LIST_ACK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIST_INDEX__TX_ACK_3_0_C1 SET_CLEAR_C1

LIST_INDEX__TX_ACK_3_0_C1 : Write: Indicates the buffer index for which the ACK bit is being updated by firmware. The default number of buffers in the IP is 5. The index range is 0-3. Read: Reads TX_ACK[3:0] If a particular bit is set, then the packet in the selected buffer has been transmitted (at least once) by the hardware and hardware is waiting for acknowledgement. Example1 : If the read value is : 0x03, then packets in FIFO-0 and FIFO-1 are acknowledged by the remote device. These acknowledgements are pending to be processed by firmware. Example2 : If the read value is : 0x02, then packet FIFO-1 is acknowledged by the remote device. This acknowledgement is pending to be processed by firmware.
bits : 0 - 3 (4 bit)
access : read-write

SET_CLEAR_C1 : Write: Firmware uses the field to clear and ACK bit in the hardware to indicate that the acknowledgement for the transmit packet has been received and processed by firmware. Firmware clears the ACK bit in the hardware by writing in this register only after the acknowledgement is processed successfully by firmware. For clearing ack for a packet transmitted in fifo-index : '3', firm-ware will write '3' in the 'list-index' field and set this bit (BIT7) to 0. This is the indication that the corresponding packet buffer identi-fied by List-Index is cleared of previous transmission and can be re-used for another packet from now on. The ACK bit in hardware is set by hardware when it has success-fully transmitted a packet.
bits : 7 - 14 (8 bit)
access : write-only


BLELL - CONN_2_CE_DATA_LIST_CFG

Bluetooth Low Energy Link Layer - - Connection specific pause resume for connection 2
address_offset : 0x14218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_2_CE_DATA_LIST_CFG BLELL - CONN_2_CE_DATA_LIST_CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_LIST_INDEX_LAST_ACK_INDEX_C1 DATA_LIST_HEAD_UP_C1 SLV_MD_CONFIG_C1 MD_C1 MD_BIT_CLEAR_C1 PAUSE_DATA_C1 KILL_CONN KILL_CONN_AFTER_TX EMPTYPDU_SENT CURRENT_PDU_INDEX_C1

DATA_LIST_INDEX_LAST_ACK_INDEX_C1 : Data list index for start/resume. This field must be valid along with data_list_head_up and indicate the transmit packet buffer index at which the data is loaded. The default number of buffers in the IP is 5,but may be customized for a customer. The buffers are in-dexed 0 to 4. Hardware will start the next data transmission from the index indicated by this field.
bits : 0 - 3 (4 bit)
access : read-write

DATA_LIST_HEAD_UP_C1 : Update the first packet buffer index ready for transmis-sion to start/resume data transfer after a pause. The bit must be set every time the firmware needs to indicate the start/resume.
bits : 4 - 8 (5 bit)
access : read-write

SLV_MD_CONFIG_C1 : This bit is set to configure the MD bit control when the design is in slave mode. 1 - MD bit will be decided on packet pending status 0 - MD bit will be decided on packet queued in next buffer status This bit has valid only when MD_BIT_CLEAR bit is not set
bits : 5 - 10 (6 bit)
access : read-write

MD_C1 : MD bit set to '1' indicates device has more data to be sent.
bits : 6 - 12 (7 bit)
access : read-write

MD_BIT_CLEAR_C1 : This register field indicates whether the MD (More Data) bit needs to be controlled by 'software' or, 'hardware and software logic combined' 1 - MD bit is exclusively controlled by software, based on status of bit [6]. 0 - MD Bit in the transmitted PDU is controlled by software and hardware logic. MD bit is set in transmitted packet, only if the software has set the MD in bit [6] and either of the following conditions is true, a) If there are packets queued for transmission. b) If there is an acknowledgement awaited from the remote side for the packet transmitted.
bits : 7 - 14 (8 bit)
access : read-write

PAUSE_DATA_C1 : Pause data. 1 - pause data, 0 - do not pause. The current_pdu_index in hardware does not move to next in-dex until pause_data is cleared. But if the SENT bit is set for the current_pdu_index as which pause is set, data will be sent out
bits : 8 - 16 (9 bit)
access : read-write

KILL_CONN : Kills the connection immediately when the connection event is active
bits : 9 - 18 (10 bit)
access : read-write

KILL_CONN_AFTER_TX : Kills the connection when the connection event is active and a TX is completed
bits : 10 - 20 (11 bit)
access : read-write

EMPTYPDU_SENT : This bit indicates if EMPTYPDU has been sent. IF ACK is received this bit will be cleared by HW
bits : 11 - 22 (12 bit)
access : read-write

CURRENT_PDU_INDEX_C1 : The index of the transmit packet buffer that is currently in transmission/waiting for transmission.
bits : 12 - 27 (16 bit)
access : read-only


BLELL - CONN_3_DATA_LIST_SENT

Bluetooth Low Energy Link Layer - - data list sent update and status for connection 3
address_offset : 0x14220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_3_DATA_LIST_SENT BLELL - CONN_3_DATA_LIST_SENT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIST_INDEX__TX_SENT_3_0_C1 SET_CLEAR_C1 BUFFER_NUM_TX_SENT_3_0_C1

LIST_INDEX__TX_SENT_3_0_C1 : Write:Indicates the buffer index for which the SENT bit is being updated by firmware. The default number of buffers in the IP is 5. The index range is 0-3. Read: Reads TX_SENT[3:0]. The bits in this field indicate the status of the SENT bit in the hard-ware for each packet buffer. The bit values are 1 - queued 0 - no packet / packet ack received by hardware Example1: If the read value is : 0x03, then packets in buffer 0 and buffer 1 are in the queue to be transmitted. All the other FIFOs are empty or hardware has cleared them after receiving acknowledgement.
bits : 0 - 3 (4 bit)
access : read-write

SET_CLEAR_C1 : Write: Used to set the SENT bit in hardware for the selected packet buffer. 1 - packet queued When firmware has a packet to send, firmware first loads the next available packet buffer. Then the hardware SENT bit is set by writing 1 to this bit field along with the list_index field that identified the buffer index. This indicates that a packet has been queued in the data buffer for sending. This packet is now ready to be transmitted. The SENT bit in hardware is cleared by hardware only when it has received an acknowledgement from the remote device. Firmware typically does not clear the bit. However, It only clears the bit on its own if it needs to 'flush' a packet from the buffer, without waiting to receive acknowledgement from the remote device, firmware clears BIT7 along with the list_index specified.
bits : 7 - 14 (8 bit)
access : write-only

BUFFER_NUM_TX_SENT_3_0_C1 : Write: Indicates the buffer number for which SENT bit is updated by firmware. This is the mapping of the list index to the physical transmit buffer. The total number of transmit buffers is 16, can be shared with up to 8 connections
bits : 8 - 19 (12 bit)
access : read-write


BLELL - CONN_3_DATA_LIST_ACK

Bluetooth Low Energy Link Layer - - data list ack update and status for connection 3
address_offset : 0x14224 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_3_DATA_LIST_ACK BLELL - CONN_3_DATA_LIST_ACK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIST_INDEX__TX_ACK_3_0_C1 SET_CLEAR_C1

LIST_INDEX__TX_ACK_3_0_C1 : Write: Indicates the buffer index for which the ACK bit is being updated by firmware. The default number of buffers in the IP is 5. The index range is 0-3. Read: Reads TX_ACK[3:0] If a particular bit is set, then the packet in the selected buffer has been transmitted (at least once) by the hardware and hardware is waiting for acknowledgement. Example1 : If the read value is : 0x03, then packets in FIFO-0 and FIFO-1 are acknowledged by the remote device. These acknowledgements are pending to be processed by firmware. Example2 : If the read value is : 0x02, then packet FIFO-1 is acknowledged by the remote device. This acknowledgement is pending to be processed by firmware.
bits : 0 - 3 (4 bit)
access : read-write

SET_CLEAR_C1 : Write: Firmware uses the field to clear and ACK bit in the hardware to indicate that the acknowledgement for the transmit packet has been received and processed by firmware. Firmware clears the ACK bit in the hardware by writing in this register only after the acknowledgement is processed successfully by firmware. For clearing ack for a packet transmitted in fifo-index : '3', firm-ware will write '3' in the 'list-index' field and set this bit (BIT7) to 0. This is the indication that the corresponding packet buffer identi-fied by List-Index is cleared of previous transmission and can be re-used for another packet from now on. The ACK bit in hardware is set by hardware when it has success-fully transmitted a packet.
bits : 7 - 14 (8 bit)
access : write-only


BLELL - CONN_3_CE_DATA_LIST_CFG

Bluetooth Low Energy Link Layer - - Connection specific pause resume for connection 3
address_offset : 0x14228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_3_CE_DATA_LIST_CFG BLELL - CONN_3_CE_DATA_LIST_CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_LIST_INDEX_LAST_ACK_INDEX_C1 DATA_LIST_HEAD_UP_C1 SLV_MD_CONFIG_C1 MD_C1 MD_BIT_CLEAR_C1 PAUSE_DATA_C1 KILL_CONN KILL_CONN_AFTER_TX EMPTYPDU_SENT CURRENT_PDU_INDEX_C1

DATA_LIST_INDEX_LAST_ACK_INDEX_C1 : Data list index for start/resume. This field must be valid along with data_list_head_up and indicate the transmit packet buffer index at which the data is loaded. The default number of buffers in the IP is 5,but may be customized for a customer. The buffers are in-dexed 0 to 4. Hardware will start the next data transmission from the index indicated by this field.
bits : 0 - 3 (4 bit)
access : read-write

DATA_LIST_HEAD_UP_C1 : Update the first packet buffer index ready for transmis-sion to start/resume data transfer after a pause. The bit must be set every time the firmware needs to indicate the start/resume.
bits : 4 - 8 (5 bit)
access : read-write

SLV_MD_CONFIG_C1 : This bit is set to configure the MD bit control when the design is in slave mode. 1 - MD bit will be decided on packet pending status 0 - MD bit will be decided on packet queued in next buffer status This bit has valid only when MD_BIT_CLEAR bit is not set
bits : 5 - 10 (6 bit)
access : read-write

MD_C1 : MD bit set to '1' indicates device has more data to be sent.
bits : 6 - 12 (7 bit)
access : read-write

MD_BIT_CLEAR_C1 : This register field indicates whether the MD (More Data) bit needs to be controlled by 'software' or, 'hardware and software logic combined' 1 - MD bit is exclusively controlled by software, based on status of bit [6]. 0 - MD Bit in the transmitted PDU is controlled by software and hardware logic. MD bit is set in transmitted packet, only if the software has set the MD in bit [6] and either of the following conditions is true, a) If there are packets queued for transmission. b) If there is an acknowledgement awaited from the remote side for the packet transmitted.
bits : 7 - 14 (8 bit)
access : read-write

PAUSE_DATA_C1 : Pause data. 1 - pause data, 0 - do not pause. The current_pdu_index in hardware does not move to next in-dex until pause_data is cleared. But if the SENT bit is set for the current_pdu_index as which pause is set, data will be sent out
bits : 8 - 16 (9 bit)
access : read-write

KILL_CONN : Kills the connection immediately when the connection event is active
bits : 9 - 18 (10 bit)
access : read-write

KILL_CONN_AFTER_TX : Kills the connection when the connection event is active and a TX is completed
bits : 10 - 20 (11 bit)
access : read-write

EMPTYPDU_SENT : This bit indicates if EMPTYPDU has been sent. IF ACK is received this bit will be cleared by HW
bits : 11 - 22 (12 bit)
access : read-write

CURRENT_PDU_INDEX_C1 : The index of the transmit packet buffer that is currently in transmission/waiting for transmission.
bits : 12 - 27 (16 bit)
access : read-only


BLELL - CONN_4_DATA_LIST_SENT

Bluetooth Low Energy Link Layer - - data list sent update and status for connection 4
address_offset : 0x14230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_4_DATA_LIST_SENT BLELL - CONN_4_DATA_LIST_SENT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIST_INDEX__TX_SENT_3_0_C1 SET_CLEAR_C1 BUFFER_NUM_TX_SENT_3_0_C1

LIST_INDEX__TX_SENT_3_0_C1 : Write:Indicates the buffer index for which the SENT bit is being updated by firmware. The default number of buffers in the IP is 5. The index range is 0-3. Read: Reads TX_SENT[3:0]. The bits in this field indicate the status of the SENT bit in the hard-ware for each packet buffer. The bit values are 1 - queued 0 - no packet / packet ack received by hardware Example1: If the read value is : 0x03, then packets in buffer 0 and buffer 1 are in the queue to be transmitted. All the other FIFOs are empty or hardware has cleared them after receiving acknowledgement.
bits : 0 - 3 (4 bit)
access : read-write

SET_CLEAR_C1 : Write: Used to set the SENT bit in hardware for the selected packet buffer. 1 - packet queued When firmware has a packet to send, firmware first loads the next available packet buffer. Then the hardware SENT bit is set by writing 1 to this bit field along with the list_index field that identified the buffer index. This indicates that a packet has been queued in the data buffer for sending. This packet is now ready to be transmitted. The SENT bit in hardware is cleared by hardware only when it has received an acknowledgement from the remote device. Firmware typically does not clear the bit. However, It only clears the bit on its own if it needs to 'flush' a packet from the buffer, without waiting to receive acknowledgement from the remote device, firmware clears BIT7 along with the list_index specified.
bits : 7 - 14 (8 bit)
access : write-only

BUFFER_NUM_TX_SENT_3_0_C1 : Write: Indicates the buffer number for which SENT bit is updated by firmware. This is the mapping of the list index to the physical transmit buffer. The total number of transmit buffers is 16, can be shared with up to 8 connections
bits : 8 - 19 (12 bit)
access : read-write


BLELL - CONN_4_DATA_LIST_ACK

Bluetooth Low Energy Link Layer - - data list ack update and status for connection 4
address_offset : 0x14234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_4_DATA_LIST_ACK BLELL - CONN_4_DATA_LIST_ACK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LIST_INDEX__TX_ACK_3_0_C1 SET_CLEAR_C1

LIST_INDEX__TX_ACK_3_0_C1 : Write: Indicates the buffer index for which the ACK bit is being updated by firmware. The default number of buffers in the IP is 5. The index range is 0-3. Read: Reads TX_ACK[3:0] If a particular bit is set, then the packet in the selected buffer has been transmitted (at least once) by the hardware and hardware is waiting for acknowledgement. Example1 : If the read value is : 0x03, then packets in FIFO-0 and FIFO-1 are acknowledged by the remote device. These acknowledgements are pending to be processed by firmware. Example2 : If the read value is : 0x02, then packet FIFO-1 is acknowledged by the remote device. This acknowledgement is pending to be processed by firmware.
bits : 0 - 3 (4 bit)
access : read-write

SET_CLEAR_C1 : Write: Firmware uses the field to clear and ACK bit in the hardware to indicate that the acknowledgement for the transmit packet has been received and processed by firmware. Firmware clears the ACK bit in the hardware by writing in this register only after the acknowledgement is processed successfully by firmware. For clearing ack for a packet transmitted in fifo-index : '3', firm-ware will write '3' in the 'list-index' field and set this bit (BIT7) to 0. This is the indication that the corresponding packet buffer identi-fied by List-Index is cleared of previous transmission and can be re-used for another packet from now on. The ACK bit in hardware is set by hardware when it has success-fully transmitted a packet.
bits : 7 - 14 (8 bit)
access : write-only


BLELL - CONN_4_CE_DATA_LIST_CFG

Bluetooth Low Energy Link Layer - - Connection specific pause resume for connection 4
address_offset : 0x14238 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_4_CE_DATA_LIST_CFG BLELL - CONN_4_CE_DATA_LIST_CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_LIST_INDEX_LAST_ACK_INDEX_C1 DATA_LIST_HEAD_UP_C1 SLV_MD_CONFIG_C1 MD_C1 MD_BIT_CLEAR_C1 PAUSE_DATA_C1 KILL_CONN KILL_CONN_AFTER_TX EMPTYPDU_SENT CURRENT_PDU_INDEX_C1

DATA_LIST_INDEX_LAST_ACK_INDEX_C1 : Data list index for start/resume. This field must be valid along with data_list_head_up and indicate the transmit packet buffer index at which the data is loaded. The default number of buffers in the IP is 5,but may be customized for a customer. The buffers are in-dexed 0 to 4. Hardware will start the next data transmission from the index indicated by this field.
bits : 0 - 3 (4 bit)
access : read-write

DATA_LIST_HEAD_UP_C1 : Update the first packet buffer index ready for transmis-sion to start/resume data transfer after a pause. The bit must be set every time the firmware needs to indicate the start/resume.
bits : 4 - 8 (5 bit)
access : read-write

SLV_MD_CONFIG_C1 : This bit is set to configure the MD bit control when the design is in slave mode. 1 - MD bit will be decided on packet pending status 0 - MD bit will be decided on packet queued in next buffer status This bit has valid only when MD_BIT_CLEAR bit is not set
bits : 5 - 10 (6 bit)
access : read-write

MD_C1 : MD bit set to '1' indicates device has more data to be sent.
bits : 6 - 12 (7 bit)
access : read-write

MD_BIT_CLEAR_C1 : This register field indicates whether the MD (More Data) bit needs to be controlled by 'software' or, 'hardware and software logic combined' 1 - MD bit is exclusively controlled by software, based on status of bit [6]. 0 - MD Bit in the transmitted PDU is controlled by software and hardware logic. MD bit is set in transmitted packet, only if the software has set the MD in bit [6] and either of the following conditions is true, a) If there are packets queued for transmission. b) If there is an acknowledgement awaited from the remote side for the packet transmitted.
bits : 7 - 14 (8 bit)
access : read-write

PAUSE_DATA_C1 : Pause data. 1 - pause data, 0 - do not pause. The current_pdu_index in hardware does not move to next in-dex until pause_data is cleared. But if the SENT bit is set for the current_pdu_index as which pause is set, data will be sent out
bits : 8 - 16 (9 bit)
access : read-write

KILL_CONN : Kills the connection immediately when the connection event is active
bits : 9 - 18 (10 bit)
access : read-write

KILL_CONN_AFTER_TX : Kills the connection when the connection event is active and a TX is completed
bits : 10 - 20 (11 bit)
access : read-write

EMPTYPDU_SENT : This bit indicates if EMPTYPDU has been sent. IF ACK is received this bit will be cleared by HW
bits : 11 - 22 (12 bit)
access : read-write

CURRENT_PDU_INDEX_C1 : The index of the transmit packet buffer that is currently in transmission/waiting for transmission.
bits : 12 - 27 (16 bit)
access : read-only


BLELL - MMMS_ADVCH_NI_ENABLE

Bluetooth Low Energy Link Layer - - Enable bits for ADV_NI, SCAN_NI and INIT_NI
address_offset : 0x14400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_ADVCH_NI_ENABLE BLELL - MMMS_ADVCH_NI_ENABLE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_NI_ENABLE SCAN_NI_ENABLE INIT_NI_ENABLE

ADV_NI_ENABLE : This bit is used to enable the Advertisement NI timer and is valid when MMMS_ENABLE=1. 0 - ADV_NI timer is disabled 1 - ADV_NI timer is enabled In this mode, the adv engine next instant is scheduled by firmware
bits : 0 - 0 (1 bit)
access : read-write

SCAN_NI_ENABLE : This bit is used to enable the SCAN NI timer and is valid when MMMS_ENABLE=1. 0 - SCAN_NI timer is disabled 1 - SCAN_NI timer is enabled In this mode, the scan engine next instant is scheduled by firmware
bits : 1 - 2 (2 bit)
access : read-write

INIT_NI_ENABLE : This bit is used to enable the INIT NI timer and is valid when MMMS_ENABLE=1. 0 - INIT_NI timer is disabled 1 - INIT_NI timer is enabled In this mode, the init engine next instant is scheduled by firmware
bits : 2 - 4 (3 bit)
access : read-write


BLELL - MMMS_ADVCH_NI_VALID

Bluetooth Low Energy Link Layer - - Next instant valid for ADV, SCAN, INIT
address_offset : 0x14404 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_ADVCH_NI_VALID BLELL - MMMS_ADVCH_NI_VALID read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_NI_VALID SCAN_NI_VALID INIT_NI_VALID

ADV_NI_VALID : This bit indicates if the programmed advertisement NI_TIMER is valid. FW sets this bit to indicate that the NI_TIMER is programmed. HW clears this bit on servicing the advertisment event 0 - ADV_NI timer is not valid 1 - ADV_NI timer is valid
bits : 0 - 0 (1 bit)
access : read-write

SCAN_NI_VALID : This bit indicates if the programmed scan NI_TIMER is valid. FW sets this bit to indicate that the NI_TIMER is programmed. HW clears this bit on servicing the scanner event 0 - SCAN_NI timer is not valid 1 - SCAN_NI timer is valid
bits : 1 - 2 (2 bit)
access : read-write

INIT_NI_VALID : This bit indicates if the programmed initiator NI_TIMER is valid. FW sets this bit to indicate that the NI_TIMER is programmed. HW clears this bit on servicing the initiator event 0 - INIT_NI timer is not valid 1 - INIT_NI timer is valid
bits : 2 - 4 (3 bit)
access : read-write


BLELL - MMMS_ADVCH_NI_ABORT

Bluetooth Low Energy Link Layer - - Abort the next instant of ADV, SCAN, INIT
address_offset : 0x14408 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_ADVCH_NI_ABORT BLELL - MMMS_ADVCH_NI_ABORT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADVCH_NI_ABORT ADVCH_ABORT_STATUS

ADVCH_NI_ABORT : FW can use this bit to clear an unserviced NI_VALID for Advertisement or scanner or initiator. HW will clear NI_VALID for ADV/SCAN/INIT if the event has not yet started
bits : 0 - 0 (1 bit)
access : write-only

ADVCH_ABORT_STATUS : The link layer hardware logic will set this bit when the NI_TIMER is aborted. Firmware to clear this by writing 1'b1 to this register bit
bits : 1 - 2 (2 bit)
access : read-write


BLELL - CONN_PARAM_NEXT_SUP_TO

Bluetooth Low Energy Link Layer - - Register to configure the supervision timeout for next scheduled connection
address_offset : 0x14410 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_PARAM_NEXT_SUP_TO BLELL - CONN_PARAM_NEXT_SUP_TO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NEXT_SUP_TO_LOAD

NEXT_SUP_TO_LOAD : HW uses this register to load the Supervision timeout Next instant from the connection memory. This can be used by firmware as a failsafe option when the hardware load is disabled. In all other conditions, this register should not be updated by firmware.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_PARAM_ACC_WIN_WIDEN

Bluetooth Low Energy Link Layer - - Register to configure Accumulated window widening for next scheduled connection
address_offset : 0x14414 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_PARAM_ACC_WIN_WIDEN BLELL - CONN_PARAM_ACC_WIN_WIDEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACC_WINDOW_WIDEN

ACC_WINDOW_WIDEN : HW uses this register to load the accumulated window windeing value from the connection memory. This can be used by firmware as a failsafe option when the hardware load is disabled. In all other conditions, this register should not be updated by firmware.
bits : 0 - 9 (10 bit)
access : read-write


BLELL - HW_LOAD_OFFSET

Bluetooth Low Energy Link Layer - - Register to configure offset from connection anchor point at which connection parameter memory should be read
address_offset : 0x14420 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - HW_LOAD_OFFSET BLELL - HW_LOAD_OFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOAD_OFFSET

LOAD_OFFSET : Load Offset in us before connection event at which the connection parameters are loaded from memory, granularity is in 1us
bits : 0 - 4 (5 bit)
access : read-write


BLELL - ADV_RAND

Bluetooth Low Energy Link Layer - - Random number generated by Hardware for ADV NI calculation
address_offset : 0x14424 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_RAND BLELL - ADV_RAND read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_RAND

ADV_RAND : Random ADV delay, to be used for ADV next instant calculation. The granularity is in BT slot
bits : 0 - 3 (4 bit)
access : read-only


BLELL - MMMS_RX_PKT_CNTR

Bluetooth Low Energy Link Layer - - Packet Counter of packets in RX FIFO in MMMS mode
address_offset : 0x14428 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_RX_PKT_CNTR BLELL - MMMS_RX_PKT_CNTR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MMMS_RX_PKT_CNT

MMMS_RX_PKT_CNT : Count of all packets in the RX FIFO in MMMS mode
bits : 0 - 5 (6 bit)
access : read-only


BLELL - WHITELIST_BASE_ADDR

Bluetooth Low Energy Link Layer - - Whitelist base address
address_offset : 0x14800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - WHITELIST_BASE_ADDR BLELL - WHITELIST_BASE_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WL_BASE_ADDR

WL_BASE_ADDR : Device address values written to white list memory are written as 16-bit wide address.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - RSLV_LIST_PEER_IDNTT_BASE_ADDR

Bluetooth Low Energy Link Layer - - Resolving list base address for storing Peer Identity address
address_offset : 0x148C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_PEER_IDNTT_BASE_ADDR BLELL - RSLV_LIST_PEER_IDNTT_BASE_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RSLV_LIST_PEER_IDNTT_BASE_ADDR

RSLV_LIST_PEER_IDNTT_BASE_ADDR : Device address values written to the list are written as 16-bit wide address.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - RSLV_LIST_PEER_RPA_BASE_ADDR

Bluetooth Low Energy Link Layer - - Resolving list base address for storing resolved Peer RPA address
address_offset : 0x14980 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_PEER_RPA_BASE_ADDR BLELL - RSLV_LIST_PEER_RPA_BASE_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RSLV_LIST_PEER_RPA_BASE_ADDR

RSLV_LIST_PEER_RPA_BASE_ADDR : Device address values written to the list are written as 16-bit wide address.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - RSLV_LIST_RCVD_INIT_RPA_BASE_ADDR

Bluetooth Low Energy Link Layer - - Resolving list base address for storing Resolved received INITA RPA
address_offset : 0x14A40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_RCVD_INIT_RPA_BASE_ADDR BLELL - RSLV_LIST_RCVD_INIT_RPA_BASE_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RSLV_LIST_RCVD_INIT_RPA_BASE_ADDR

RSLV_LIST_RCVD_INIT_RPA_BASE_ADDR : Device address values written to the list are written as 16-bit wide address.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - RSLV_LIST_TX_INIT_RPA_BASE_ADDR

Bluetooth Low Energy Link Layer - - Resolving list base address for storing generated TX INITA RPA
address_offset : 0x14B00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_TX_INIT_RPA_BASE_ADDR BLELL - RSLV_LIST_TX_INIT_RPA_BASE_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RSLV_LIST_TX_INIT_RPA_BASE_ADDR

RSLV_LIST_TX_INIT_RPA_BASE_ADDR : Device address values written to the list are written as 16-bit wide address.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - ENC_MEM_BASE_ADDR

Bluetooth Low Energy Subsystem Miscellaneous - - Encryption memory base address
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - ENC_MEM_BASE_ADDR BLESS - ENC_MEM_BASE_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENC_MEM

ENC_MEM : Data values written to Enc memory are written as 16-bit wide data. This memory is valid only if DLE is set.
bits : 0 - 31 (32 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[15]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0x1552E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[15] BLELL - MMMS_DATA_MEM_DESCRIPTOR[15] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - WINDOW_WIDEN_INTVL

Bluetooth Low Energy Link Layer - - Window widen for interval
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - WINDOW_WIDEN_INTVL BLELL - WINDOW_WIDEN_INTVL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WINDOW_WIDEN_INTVL

WINDOW_WIDEN_INTVL : This value defines the increased listening time for the slave. The window widening shall be smaller than ((connInterval/2)-T_IFS us) This value is calculated by firmware based on the drift, the connec-tion interval value. The value is the unit widening value for one con-nection interval duration. In case of slave latency, this value is accu-mulated till the next anchor point at which the slave will listen.
bits : 0 - 11 (12 bit)
access : read-write


BLELL - WINDOW_WIDEN_WINOFF

Bluetooth Low Energy Link Layer - - Window widen for offset
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - WINDOW_WIDEN_WINOFF BLELL - WINDOW_WIDEN_WINOFF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WINDOW_WIDEN_WINOFF

WINDOW_WIDEN_WINOFF : This field stores the additional number of microseconds the slave must extend its listening window to listen for a master packet. This value is calculated based on the window offset value. This is used at connection setup directly. During connection setup, this value is added with window_widen_intvl register value to calculate the win-dow widening size.
bits : 0 - 11 (12 bit)
access : read-write


BLELL - LE_RF_TEST_MODE

Bluetooth Low Energy Link Layer - - Direct Test Mode control
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - LE_RF_TEST_MODE BLELL - LE_RF_TEST_MODE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEST_FREQUENCY DTM_STATUS__DTM_CONT_RXEN PKT_PAYLOAD DTM_CONT_TXEN DTM_DATA_2MBPS

TEST_FREQUENCY : N = (F - 2402) / 2 Range: 0x00 - 0x27. Frequency Range : 2402 MHz to 2480 MHz
bits : 0 - 5 (6 bit)
access : read-write

DTM_STATUS__DTM_CONT_RXEN : This bit is overloaded. The read operation returns the staus of the DTM 1 - DTM test ON 0 - DTM test OFF The write operation contrls the DTM RX mode 0: DTM run at normal DTMRX burst mode 1: DTM run at continuous RX DTM mode
bits : 6 - 12 (7 bit)
access : read-write

PKT_PAYLOAD : N/A
bits : 7 - 16 (10 bit)
access : read-write

DTM_CONT_TXEN : 0: DTM run at normal DTMTX burst mode 1: DTM run at continuous TX DTM mode
bits : 13 - 26 (14 bit)
access : read-write

DTM_DATA_2MBPS : 0: DTM run at 1M bps data rate 1: DTM run at 2M bps data rate
bits : 15 - 30 (16 bit)
access : read-write


BLELL - DTM_RX_PKT_COUNT

Bluetooth Low Energy Link Layer - - Direct Test Mode receive packet count
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - DTM_RX_PKT_COUNT BLELL - DTM_RX_PKT_COUNT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_PACKET_COUNT

RX_PACKET_COUNT : Number of packets received in receive test mode.
bits : 0 - 15 (16 bit)
access : read-only


BLELL - LE_RF_TEST_MODE_EXT

Bluetooth Low Energy Link Layer - - Direct Test Mode control
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - LE_RF_TEST_MODE_EXT BLELL - LE_RF_TEST_MODE_EXT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DTM_PACKET_LENGTH

DTM_PACKET_LENGTH : DTM TX packet length. Bits [7:6] are accessible onle when DLE is enabled
bits : 0 - 7 (8 bit)
access : read-write


RCB - TX_FIFO_STATUS

Radio Control Bus (RCB) controller - - Transmitter FIFO status register.
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RCB - TX_FIFO_STATUS RCB - TX_FIFO_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USED SR_VALID RD_PTR WR_PTR

USED : Amount of enties in the transmitter FIFO. The value of this field ranges from 0 to 16
bits : 0 - 4 (5 bit)
access : read-only

SR_VALID : Indicates whether the TX shift registers holds a valid data frame ('1') or not ('0'). The shift register can be considered the top of the TX FIFO (the data frame is not included in the USED field of the TX FIFO). The shift register is a working register and holds the data frame that is currently transmitted (when the protocol state machine is transmitting a data frame) or the data frame that is tranmitted next (when the protocol state machine is not transmitting a data frame).
bits : 15 - 30 (16 bit)
access : read-only

RD_PTR : FIFO read pointer: FIFO location from which a data frame is read by the hardware.
bits : 16 - 35 (20 bit)
access : read-only

WR_PTR : FIFO write pointer: FIFO location at which a new data frame is written.
bits : 24 - 51 (28 bit)
access : read-only


RCB - - RCBLL - INTR_MASK

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - Master interrupt mask register.
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - INTR_MASK RCB - - RCBLL - INTR_MASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCB_LL_DONE SINGLE_WRITE_DONE SINGLE_READ_DONE

RCB_LL_DONE : Mask bit for corresponding bit in interrupt request register.
bits : 0 - 0 (1 bit)
access : read-write

SINGLE_WRITE_DONE : N/A
bits : 2 - 4 (3 bit)
access : read-write

SINGLE_READ_DONE : N/A
bits : 3 - 6 (4 bit)
access : read-write


BLELL - ADV_PARAMS

Bluetooth Low Energy Link Layer - - Advertising parameters register.
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_PARAMS BLELL - ADV_PARAMS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TX_ADDR ADV_TYPE ADV_FILT_POLICY ADV_CHANNEL_MAP RX_ADDR RX_SEC_ADDR ADV_LOW_DUTY_CYCLE INITA_RPA_CHECK TX_ADDR_PRIV ADV_RCV_IA_IN_PRIV ADV_RPT_PEER_NRPA_ADDR_IN_PRIV RCV_TX_ADDR

TX_ADDR : Device own address type. 1 - Address type is random. 0 - Address type is public.
bits : 0 - 0 (1 bit)
access : read-write

ADV_TYPE : The Advertising type is used to determine the packet type that is used for advertising when advertising is enabled. 0x0 - Connectable undirected advertising. (adv_ind) 0x1 - Connectable directed advertising (adv_direct_ind). 0x2 - Discoverable undirected advertising (adv_discover_ind) 0x3 - Non connectable undirected advertising (adv_nonconn_ind).
bits : 1 - 3 (3 bit)
access : read-write

ADV_FILT_POLICY : Advertising filter policy. The set of devices that the advertising procedure uses for device filtering is called the White List. 0x0 - Allow scan request from any device, allow connect request from any device. 0x1 - Allow scan request from devices in white list only, allow connect request from any device. 0x2 - Allow scan request from any device, allow connect request from devices in white list only. 0x3 - Allow scan request from devices in white list only, allow connect request from devices in white list only.
bits : 3 - 7 (5 bit)
access : read-write

ADV_CHANNEL_MAP : Advertising channel map indicates the advertising channels used for advertising. By setting the bit, corresponding channel is enabled for use. Atleast one channel bit should be set. 7 - enable channel 39. 6 - enable channel 38. 5 - enable channel 37.
bits : 5 - 12 (8 bit)
access : read-write

RX_ADDR : Peer addresses type. This is the Direct_Address_type field programmed, only if ADV_DIRECT_IND type is sent. 1 - Rx addr type is random. 0 - Rx addr type is public
bits : 8 - 16 (9 bit)
access : read-write

RX_SEC_ADDR : Peer secondary addresses type. This is the Direct_Address_type field programmed, only if ADV_DIRECT_IND type is sent. This address type corresponds to the PEER_SERC_ADDR register. Valid only if PRIV_1_2_ADV is set. 1 - Rx secondary addr type is random. 0 - Rx secondary addr type is public
bits : 9 - 18 (10 bit)
access : read-write

ADV_LOW_DUTY_CYCLE : This bit field is used to specify to the Controller the Low Duty Cycle connectable directed advertising variant being used. 1 - Low Duty Cycle Connectable Directed Advertising. 0 - High Duty Cycle Connectable Directed Advertising.
bits : 10 - 20 (11 bit)
access : read-write

INITA_RPA_CHECK : This bit field is used to specify the Advertiser behavior on receiving the same INITA in the connect_req as in the ADV_DIRECT_IND packet it sent. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set. 0 - Accept the connect_req packet 1 - Reject the connect_req packet
bits : 11 - 22 (12 bit)
access : read-write

TX_ADDR_PRIV : Device own address type subtype when Address type is random. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set. 1 - Random Address type is private. 0 - Random Address type is static.
bits : 12 - 24 (13 bit)
access : read-write

ADV_RCV_IA_IN_PRIV : Advertiser behavior when a peer Identity address is received in privacy mode. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set. 1 - Accept packets with peer identity address not in the Resolving list in privacy mode 0 - Reject packets with peer identity address not in the Resolving list in privacy mode
bits : 13 - 26 (14 bit)
access : read-write

ADV_RPT_PEER_NRPA_ADDR_IN_PRIV : Advertiser behavior when a peer Non Resolvable Private Address is received in privacy mode. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set. This is applicable when whitelist is disabled. 1 - Only report the packets with peer NRPA address in privacy mode 0 - Respond to packets with peer NRPA address in privacy mode
bits : 14 - 28 (15 bit)
access : read-write

RCV_TX_ADDR : Transmit address field of the received packet extracted from the receive packet. This field is used by firmware to report peer_addr_type parameter in the connection complete event.
bits : 15 - 30 (16 bit)
access : read-only


BLELL - CONN_RXMEM_BASE_ADDR_DLE

Bluetooth Low Energy Link Layer - - DLE Connection RX memory base address
address_offset : 0x1800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_RXMEM_BASE_ADDR_DLE BLELL - CONN_RXMEM_BASE_ADDR_DLE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_RX_MEM_BASE_ADDR_DLE

CONN_RX_MEM_BASE_ADDR_DLE : Data from Rx memory are read as 32-bit wide data. This memory is valid only if DLE is set.
bits : 0 - 31 (32 bit)
access : read-write


BLELL - TXRX_HOP

Bluetooth Low Energy Link Layer - - Channel Address register
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - TXRX_HOP BLELL - TXRX_HOP read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HOP_CH_TX HOP_CH_RX

HOP_CH_TX : Transmit channel index. Channel index on which previous packet is transmitted.
bits : 0 - 6 (7 bit)
access : read-only

HOP_CH_RX : Receive channel index. Channel index on which previous packet is received.
bits : 8 - 22 (15 bit)
access : read-only


BLELL - TX_RX_ON_DELAY

Bluetooth Low Energy Link Layer - - Transmit/Receive data delay
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - TX_RX_ON_DELAY BLELL - TX_RX_ON_DELAY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RXON_DELAY TXON_DELAY

RXON_DELAY : Receive delay - Delay from start of receive to expected first bit of receive packet at the controller. Used to control the turn on time of radio to optimize on power. The delay is in resolution of 1 microsecond.
bits : 0 - 7 (8 bit)
access : read-write

TXON_DELAY : Transmit delay - Delay from start of transmit to transmission of first bit on air. It is used to control the T_IFS. The delay is in resolution of 1 microsecond.
bits : 8 - 23 (16 bit)
access : read-write


BLELL - ADV_ACCADDR_L

Bluetooth Low Energy Link Layer - - ADV packet access code low word
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_ACCADDR_L BLELL - ADV_ACCADDR_L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_ACCADDR_L

ADV_ACCADDR_L : Lower 16 bit of ADV packet access code
bits : 0 - 15 (16 bit)
access : read-write


BLELL - ADV_ACCADDR_H

Bluetooth Low Energy Link Layer - - ADV packet access code high word
address_offset : 0x1AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_ACCADDR_H BLELL - ADV_ACCADDR_H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_ACCADDR_H

ADV_ACCADDR_H : higher 16 bit of ADV packet access code
bits : 0 - 15 (16 bit)
access : read-write


BLELL - ADV_CH_TX_POWER_LVL_LS

Bluetooth Low Energy Link Layer - - Advertising channel transmit power setting
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_CH_TX_POWER_LVL_LS BLELL - ADV_CH_TX_POWER_LVL_LS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_TRANSMIT_POWER_LVL_LS

ADV_TRANSMIT_POWER_LVL_LS : When LL_CONFIG.TX_PA_PWR_LVL_TYPE is 1, this field represents the Advertising channel transmit power setting Least Significant 16 bits. When LL_CONFIG.TX_PA_PWR_LVL_TYPE is 0, the LS 4 bits represents the Advertising channel transmit power code 4 bits.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - ADV_CH_TX_POWER_LVL_MS

Bluetooth Low Energy Link Layer - - Advertising channel transmit power setting extension
address_offset : 0x1B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_CH_TX_POWER_LVL_MS BLELL - ADV_CH_TX_POWER_LVL_MS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_TRANSMIT_POWER_LVL_MS

ADV_TRANSMIT_POWER_LVL_MS : Advertising channel transmit power setting Most Significant 2 bits.
bits : 0 - 1 (2 bit)
access : read-write


BLELL - CONN_CH_TX_POWER_LVL_LS

Bluetooth Low Energy Link Layer - - Connection channel transmit power setting
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_CH_TX_POWER_LVL_LS BLELL - CONN_CH_TX_POWER_LVL_LS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONNCH_TRANSMIT_POWER_LVL_LS

CONNCH_TRANSMIT_POWER_LVL_LS : When LL_CONFIG.TX_PA_PWR_LVL_TYPE is 1, this field represents the Connection channel transmit power setting Least Significant 16 bits. When LL_CONFIG.TX_PA_PWR_LVL_TYPE is 0, the LS 4 bits represents the Connection channel transmit power code 4 bits.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_CH_TX_POWER_LVL_MS

Bluetooth Low Energy Link Layer - - Connection channel transmit power setting extension
address_offset : 0x1BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_CH_TX_POWER_LVL_MS BLELL - CONN_CH_TX_POWER_LVL_MS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONNCH_TRANSMIT_POWER_LVL_MS

CONNCH_TRANSMIT_POWER_LVL_MS : Connection channel transmit power setting Most Significant 2 bits.
bits : 0 - 1 (2 bit)
access : read-write


RCB - TX_FIFO_WR

Radio Control Bus (RCB) controller - - Transmitter FIFO write register.
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

RCB - TX_FIFO_WR RCB - TX_FIFO_WR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data frame written into the transmitter FIFO. Behavior is similar to that of a PUSH operation. A write to a full TX FIFO sets INTR_TX.OVERFLOW to '1'.
bits : 0 - 31 (32 bit)
access : write-only


RCB - - RCBLL - INTR_MASKED

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - Master interrupt masked request register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - INTR_MASKED RCB - - RCBLL - INTR_MASKED read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCB_LL_DONE SINGLE_WRITE_DONE SINGLE_READ_DONE

RCB_LL_DONE : Logical and of corresponding request and mask bits.
bits : 0 - 0 (1 bit)
access : read-only

SINGLE_WRITE_DONE : N/A
bits : 2 - 4 (3 bit)
access : read-only

SINGLE_READ_DONE : N/A
bits : 3 - 6 (4 bit)
access : read-only


BLELL - ADV_INTERVAL_TIMEOUT

Bluetooth Low Energy Link Layer - - Advertising interval register.
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_INTERVAL_TIMEOUT BLELL - ADV_INTERVAL_TIMEOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_INTERVAL

ADV_INTERVAL : Range: 0x0020 to 0x4000 (For ADV_IND) 0x00A0 to 0x4000 (For ADV_SCAN_IND and NONCONN_IND) Invalid for ADV_DIRECT_IND Time = N * 0.625 msec Time Range: 20 ms to 10.24 sec. For directed advertising, firmware programs the default value of 1.28 seconds. In MMMS mode, this register is used as ADV_NI_TIMER when the ADV_NI_VALID is set by firmware
bits : 0 - 14 (15 bit)
access : read-write


BLELL - DEV_PUB_ADDR_L

Bluetooth Low Energy Link Layer - - Device public address lower register
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DEV_PUB_ADDR_L BLELL - DEV_PUB_ADDR_L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEV_PUB_ADDR_L

DEV_PUB_ADDR_L : Lower 16 bit of 48-bit public address of the device.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - DEV_PUB_ADDR_M

Bluetooth Low Energy Link Layer - - Device public address middle register
address_offset : 0x1C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DEV_PUB_ADDR_M BLELL - DEV_PUB_ADDR_M read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEV_PUB_ADDR_M

DEV_PUB_ADDR_M : Middle 16 bit of 48-bit public address of the device.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - DEV_PUB_ADDR_H

Bluetooth Low Energy Link Layer - - Device public address higher register
address_offset : 0x1C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DEV_PUB_ADDR_H BLELL - DEV_PUB_ADDR_H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEV_PUB_ADDR_H

DEV_PUB_ADDR_H : Higher 16 bit of 48-bit public address of the device.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - OFFSET_TO_FIRST_INSTANT

Bluetooth Low Energy Link Layer - - Offset to first instant
address_offset : 0x1D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - OFFSET_TO_FIRST_INSTANT BLELL - OFFSET_TO_FIRST_INSTANT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OFFSET_TO_FIRST_EVENT

OFFSET_TO_FIRST_EVENT : The offset w.r.t the internal reference clock at which instant the first event occurs. This register will give flexibility to the firmware to position the con-nection at a desired point with respect to the internal free running clock. It is optional to be updated by firmware. This is not updated in the current firmware.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - ADV_CONFIG

Bluetooth Low Energy Link Layer - - Advertiser configuration register
address_offset : 0x1D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_CONFIG BLELL - ADV_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_STRT_EN ADV_CLS_EN ADV_TX_EN SCN_RSP_TX_EN ADV_SCN_REQ_RX_EN ADV_CONN_REQ_RX_EN SLV_CONNECTED_EN ADV_TIMEOUT_EN ADV_RAND_DISABLE ADV_SCN_PEER_RPA_UNMCH_EN ADV_CONN_PEER_RPA_UNMCH_EN ADV_PKT_INTERVAL

ADV_STRT_EN : Enable advertising event start interrupt.
bits : 0 - 0 (1 bit)
access : read-write

ADV_CLS_EN : Enable advertising event stop interrupt.
bits : 1 - 2 (2 bit)
access : read-write

ADV_TX_EN : Enable adv packet transmitted interrupt.
bits : 2 - 4 (3 bit)
access : read-write

SCN_RSP_TX_EN : Enable scan response packet transmitted interrupt.
bits : 3 - 6 (4 bit)
access : read-write

ADV_SCN_REQ_RX_EN : Enable scan request packet received interrupt.
bits : 4 - 8 (5 bit)
access : read-write

ADV_CONN_REQ_RX_EN : Enable connect request packet received interrupt.
bits : 5 - 10 (6 bit)
access : read-write

SLV_CONNECTED_EN : Enable slave connected interrupt.
bits : 6 - 12 (7 bit)
access : read-write

ADV_TIMEOUT_EN : Enable adv_timeout interrupt. Applicable in adv_direct_ind advertising.
bits : 7 - 14 (8 bit)
access : read-write

ADV_RAND_DISABLE : Disable randomization of adv interval. When disabled, interval is same as programmed in adv_interval register.
bits : 8 - 16 (9 bit)
access : read-write

ADV_SCN_PEER_RPA_UNMCH_EN : Enable scan request packet received with peer device address unmatched interrupt. This bit is valid only if PRIV_1_2 PRIV_1_2 and PRIV_1_2_ADV are set.
bits : 9 - 18 (10 bit)
access : read-write

ADV_CONN_PEER_RPA_UNMCH_EN : Enable connect request packet received with peer device address unmatched interrupt. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set.
bits : 10 - 20 (11 bit)
access : read-write

ADV_PKT_INTERVAL : Time between the beginning of two consecutive advertising PDU's. Time = N * 0.625 msec Time Range: <=10msec.
bits : 11 - 26 (16 bit)
access : read-write


BLELL - SCAN_CONFIG

Bluetooth Low Energy Link Layer - - Scan configuration register
address_offset : 0x1D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - SCAN_CONFIG BLELL - SCAN_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCN_STRT_EN SCN_CLOSE_EN SCN_TX_EN ADV_RX_EN SCN_RSP_RX_EN SCN_ADV_RX_INTR_PEER_RPA_UNMCH_EN SCN_ADV_RX_INTR_SELF_RPA_UNMCH_EN SCANA_TX_ADDR_NOT_SET_INTR_EN RPT_SELF_ADDR_MATCH_PRIV_MISMATCH_SCN BACKOFF_ENABLE SCAN_CHANNEL_MAP

SCN_STRT_EN : Enable scan event start interrupt.
bits : 0 - 0 (1 bit)
access : read-write

SCN_CLOSE_EN : Enable scan event close interrupt.
bits : 1 - 2 (2 bit)
access : read-write

SCN_TX_EN : Enable scan request packet transmitted interrupt.
bits : 2 - 4 (3 bit)
access : read-write

ADV_RX_EN : Enable adv packet received interrupt .
bits : 3 - 6 (4 bit)
access : read-write

SCN_RSP_RX_EN : Enable scan_rsp packet received interrupt .
bits : 4 - 8 (5 bit)
access : read-write

SCN_ADV_RX_INTR_PEER_RPA_UNMCH_EN : Enable ADV peer address unmatched interrupt. This bit is valid only if PRIV_1_2 PRIV_1_2 and PRIV_1_2_SCAN are set.
bits : 5 - 10 (6 bit)
access : read-write

SCN_ADV_RX_INTR_SELF_RPA_UNMCH_EN : Enable ADV self address unmatched interrupt. This bit is valid only if PRIV_1_2 PRIV_1_2 and PRIV_1_2_SCAN are set.
bits : 6 - 12 (7 bit)
access : read-write

SCANA_TX_ADDR_NOT_SET_INTR_EN : Enable SCANA RPA TX not set interrupt. This bit is valid only if PRIV_1_2 and PRIV_1_2_SCAN are set.
bits : 7 - 14 (8 bit)
access : read-write

RPT_SELF_ADDR_MATCH_PRIV_MISMATCH_SCN : This bit controls the SCAN engine behavior when an self address match occurs but a privacy mismatch occurs 0 - The packet is aborted 1 - The packet is received and reported to the Link Layer firmware This bit is valid only if PRIV_1_2 and PRIV_1_2_SCAN are set.
bits : 8 - 16 (9 bit)
access : read-write

BACKOFF_ENABLE : Enable random backoff feature in scanner. 1 - enable 0 - disable
bits : 11 - 22 (12 bit)
access : read-write

SCAN_CHANNEL_MAP : Advertising channels that are enabled for scanning operation. Bit 15: setting 1 - enables channel 39 for use. Bit 14: setting 1 - enables channel 38 for use. Bit 13: setting 1 - enables channel 37 for use.
bits : 13 - 28 (16 bit)
access : read-write


BLELL - INIT_CONFIG

Bluetooth Low Energy Link Layer - - Initiator configuration register
address_offset : 0x1DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - INIT_CONFIG BLELL - INIT_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INIT_STRT_EN INIT_CLOSE_EN CONN_REQ_TX_EN CONN_CREATED INIT_ADV_RX_INTR_SELF_RPA_UNRES_EN INIT_ADV_RX_INTR_PEER_RPA_UNRES_EN INITA_TX_ADDR_NOT_SET_INTR_EN INIT_CHANNEL_MAP

INIT_STRT_EN : Enable Initiator event start interrupt.
bits : 0 - 0 (1 bit)
access : read-write

INIT_CLOSE_EN : Enable Initiator event close interrupt.
bits : 1 - 2 (2 bit)
access : read-write

CONN_REQ_TX_EN : Enables connection request packet transmission start interrupt.
bits : 2 - 4 (3 bit)
access : read-write

CONN_CREATED : Enable master connection created interrupt
bits : 4 - 8 (5 bit)
access : read-write

INIT_ADV_RX_INTR_SELF_RPA_UNRES_EN : Enable ADV self address RPA unresolved interrupt. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set.
bits : 5 - 10 (6 bit)
access : read-write

INIT_ADV_RX_INTR_PEER_RPA_UNRES_EN : Enable ADV peer address RPA unresolved interrupt. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set.
bits : 6 - 12 (7 bit)
access : read-write

INITA_TX_ADDR_NOT_SET_INTR_EN : Enable INITA RPA TX not set interrupt. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set.
bits : 7 - 14 (8 bit)
access : read-write

INIT_CHANNEL_MAP : Advertising channels that are enabled for initiator scanning operation. Bit 15: setting 1 - enables channel 39 for use. Bit 14: setting 1 - enables channel 38 for use. Bit 13: setting 1 - enables channel 37 for use.
bits : 13 - 28 (16 bit)
access : read-write


BLELL - CONN_CONFIG

Bluetooth Low Energy Link Layer - - Connection configuration register
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_CONFIG BLELL - CONN_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_PKT_LIMIT RX_INTR_THRESHOLD MD_BIT_CLEAR DSM_SLOT_VARIANCE SLV_MD_CONFIG EXTEND_CU_TX_WIN MASK_SUTO_AT_UPDT CONN_REQ_1SLOT_EARLY

RX_PKT_LIMIT : Defines a limit for the number of Rx packets that can be re-ceived by the LLH. Default maximum value is 0xF.Minimum value shall be '1' or no packet will be stored in the Rx FIFO.
bits : 0 - 3 (4 bit)
access : read-write

RX_INTR_THRESHOLD : This register field allows setting a threshold for the packet received interrupt to the firmware. For example if the value programmed is 0x2 - then HW will generate interrupt only on receiving the second packet. In any case if the received number of packets in a conn event is less than the threshold or there are still packets (less than threshold) pending in the Rx FIFO, HW will generate the interrupt at the ce_close. Min value possible is 1. Max value depends on the Rx FIFO capacity.
bits : 4 - 11 (8 bit)
access : read-write

MD_BIT_CLEAR : This register field indicates whether the MD (More Data) bit needs to be controlled by 'software' or, 'hardware and soft-ware logic combined'. 1 - MD bit is exclusively controlled by software, ie based on status of CE_CNFG_STS_REGISTER[6] - md bit. 0 - MD Bit in the transmitted pdu is controlled by software and hardware logic. MD bit is set in transmitted packet, only if the software has set the md bit in CE_CNFG_STS_REGISTER[6] and either of the following conditions is true, a) If there are packets queued for transmission. b) If there is an acknowledgement awaited from the remote side for the packet transmitted.
bits : 8 - 16 (9 bit)
access : read-write

DSM_SLOT_VARIANCE : This bit configures the DSM slot counting mode. 0 - The DSM slot count variance with respect to actual time is less than 1 slot 1 - The DSM slot count variance with respect to actual time is more than 1 slot &less that 2 slots
bits : 11 - 22 (12 bit)
access : read-write

SLV_MD_CONFIG : This bit is set to configure the MD bit control when IUT is in slave role. 1 - MD bit will be decided on packet pending status 0 - MD bit will be decided on packet queued in next buffer status This bit has effect only when 'CONN_CONFIG.md_bit_ctr' bit is not set .
bits : 12 - 24 (13 bit)
access : read-write

EXTEND_CU_TX_WIN : This bit is used to enable/disable extending the additional rx window on slave side during connection update in event of packet miss at the update instant. 1 - Enable 0 - Disable
bits : 13 - 26 (14 bit)
access : read-write

MASK_SUTO_AT_UPDT : This bit is used to enable/disable masking of internal hardware supervision timeout trigger when switching from old connection parameters to new parameters. 1 - Enable 0 - Disable
bits : 14 - 28 (15 bit)
access : read-write

CONN_REQ_1SLOT_EARLY : This bit is used to enable extension of the Conn Request to arbiter to 1 slot early. When enabled the request length is 2 slots. 1 - Enable 0 - Disable
bits : 15 - 30 (16 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[0]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0x1E20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[0] BLELL - RSLV_LIST_ENABLE[0] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLESS - TRIM_MXD[0]

Bluetooth Low Energy Subsystem Miscellaneous - - MXD die Trim registers
address_offset : 0x1E20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - TRIM_MXD[0] BLESS - TRIM_MXD[0] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MXD_TRIM_BITS

MXD_TRIM_BITS : MXD trim bits
bits : 0 - 7 (8 bit)
access : read-write


BLELL - CONN_PARAM1

Bluetooth Low Energy Link Layer - - Connection parameter 1
address_offset : 0x1E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_PARAM1 BLELL - CONN_PARAM1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCA_PARAM HOP_INCREMENT_PARAM CRC_INIT_L

SCA_PARAM : Sleep Clock Accuracy
bits : 0 - 2 (3 bit)
access : read-write

HOP_INCREMENT_PARAM : Hop increment for connection channel.
bits : 3 - 10 (8 bit)
access : read-write

CRC_INIT_L : This field defines the lower byte (7:0) of the CRC initialization vector.
bits : 8 - 23 (16 bit)
access : read-write


BLELL - CONN_PARAM2

Bluetooth Low Energy Link Layer - - Connection parameter 2
address_offset : 0x1EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_PARAM2 BLELL - CONN_PARAM2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CRC_INIT_H

CRC_INIT_H : This field defines the upper two bytes (23:8) of the CRC initialization vector.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_INTR_MASK

Bluetooth Low Energy Link Layer - - Connection Interrupt mask
address_offset : 0x1F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_INTR_MASK BLELL - CONN_INTR_MASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_CL_INT_EN CONN_ESTB_INT_EN MAP_UPDT_INT_EN START_CE_INT_EN CLOSE_CE_INT_EN CE_TX_ACK_INT_EN CE_RX_INT_EN CONN_UPDATE_INTR_EN RX_GOOD_PDU_INT_EN RX_BAD_PDU_INT_EN CE_CLOSE_NULL_RX_INT_EN PING_TIMER_EXPIRD_INTR PING_NEARLY_EXPIRD_INTR

CONN_CL_INT_EN : If this bit is set connection closed interrupt is enabled.
bits : 0 - 0 (1 bit)
access : read-write

CONN_ESTB_INT_EN : If this bit is set connection establishment interrupt is enabled.
bits : 1 - 2 (2 bit)
access : read-write

MAP_UPDT_INT_EN : If this bit is set, channel map update interrupt is enabled.
bits : 2 - 4 (3 bit)
access : read-write

START_CE_INT_EN : If this bit is set connection event start interrupt is enabled
bits : 3 - 6 (4 bit)
access : read-write

CLOSE_CE_INT_EN : If this bit is set connection event closed interrupt is enabled.
bits : 4 - 8 (5 bit)
access : read-write

CE_TX_ACK_INT_EN : If this bit is set transmission acknowledgement interrupt is enabled: This interrupt is generated to indicate to the firmware that a non-empty packet transmitted is successfully acknowledged by the remote device. For negative acknowledgements from remote device, this interrupt indication is not generated.
bits : 5 - 10 (6 bit)
access : read-write

CE_RX_INT_EN : If this bit is set interrupt is enabled for reception of packet in a connection event.
bits : 6 - 12 (7 bit)
access : read-write

CONN_UPDATE_INTR_EN : If this bit is set connection update interrupt is enabled.
bits : 7 - 14 (8 bit)
access : read-write

RX_GOOD_PDU_INT_EN : If this bit is set packet receive good pdu interrupt is enabled. Effective only when bit 6 is set.
bits : 8 - 16 (9 bit)
access : read-write

RX_BAD_PDU_INT_EN : If this bit is set packet receive bad pdu interrupt is enabled. Effective only when bit 6 is set.
bits : 9 - 18 (10 bit)
access : read-write

CE_CLOSE_NULL_RX_INT_EN : If this but us set, the RX interrupt is triggerred for an end of connection event with a null packet
bits : 13 - 26 (14 bit)
access : read-write

PING_TIMER_EXPIRD_INTR : If this bit is set ping timer expired interrupt is enabled.
bits : 14 - 28 (15 bit)
access : read-write

PING_NEARLY_EXPIRD_INTR : If this bit is set ping timer nearly expired interrupt is enabled
bits : 15 - 30 (16 bit)
access : read-write


BLELL - SLAVE_TIMING_CONTROL

Bluetooth Low Energy Link Layer - - slave timing control
address_offset : 0x1F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - SLAVE_TIMING_CONTROL BLELL - SLAVE_TIMING_CONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLAVE_TIME_SET_VAL SLAVE_TIME_ADJ_VAL

SLAVE_TIME_SET_VAL : Programmable adjust value to the clock counter when slave is connected
bits : 0 - 7 (8 bit)
access : read-write

SLAVE_TIME_ADJ_VAL : Timing adjust value. The internal micro second counter is adjusted to this value whenever slave receives a good access address match at connection anchor point. This will ensure the slave gets synchronized to master timing.
bits : 8 - 23 (16 bit)
access : read-write


BLELL - RECEIVE_TRIG_CTRL

Bluetooth Low Energy Link Layer - - Receive trigger control
address_offset : 0x1F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RECEIVE_TRIG_CTRL BLELL - RECEIVE_TRIG_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACC_TRIGGER_THRESHOLD ACC_TRIGGER_TIMEOUT

ACC_TRIGGER_THRESHOLD : Access address match threshold value. Number of bits of ac-cess address that should match with the expected access ad-dress to trigger an access code match. Max value : 32 (for 32-bit access address) Lower values may be programmed for bad radios or channels but care must be taken to ensure there are no 'false' matches due to reduced number of bits required to match.
bits : 0 - 5 (6 bit)
access : read-write

ACC_TRIGGER_TIMEOUT : If access address match does not occur then within this time from the start of receive operation, the receive operation times out and stops. An internal counter value of 1usec resolution is continuously compared with the value programmed. Max value :0xFF
bits : 8 - 23 (16 bit)
access : read-write


RCB - RX_CTRL

Radio Control Bus (RCB) controller - - Receiver control register.
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - RX_CTRL RCB - RX_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MSB_FIRST

MSB_FIRST : Least significant bit first ('0') or most significant bit first ('1'). This field also affects the Address field When MSB_FIRST = 1, then [15:0] is data and [(ADDR_WIDTH+15):16] is used for address When MSB_FIRST = 0, then [15:0] is for data. No address field
bits : 0 - 0 (1 bit)
access : read-write


RCB - - RCBLL - RADIO_REG1_ADDR

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - Address of Register#1 in Radio (MDON)
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - RADIO_REG1_ADDR RCB - - RCBLL - RADIO_REG1_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REG_ADDR

REG_ADDR : N/A
bits : 0 - 15 (16 bit)
access : read-write


BLELL - ADV_INTR

Bluetooth Low Energy Link Layer - - Advertising interrupt status and Clear register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_INTR BLELL - ADV_INTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_STRT_INTR ADV_CLOSE_INTR ADV_TX_INTR SCAN_RSP_TX_INTR SCAN_REQ_RX_INTR CONN_REQ_RX_INTR SLV_CONNECTED ADV_TIMEOUT ADV_ON SLV_CONN_PEER_RPA_UNMCH_INTR SCAN_REQ_RX_PEER_RPA_UNMCH_INTR INIT_ADDR_MATCH_PRIV_MISMATCH_INTR SCAN_ADDR_MATCH_PRIV_MISMATCH_INTR

ADV_STRT_INTR : If this bit is set it indicates a new advertising event started after interval expiry. Write to the register with this bit set to 1, clears the interrupt source.
bits : 0 - 0 (1 bit)
access : read-write

ADV_CLOSE_INTR : If this bit is set it indicates current advertising event is closed. Write to the register with this bit set to 1, clears the interrupt source.
bits : 1 - 2 (2 bit)
access : read-write

ADV_TX_INTR : If this bit is set it indicates ADV packet is transmitted. Write to the register with this bit set to 1, clears the interrupt source.
bits : 2 - 4 (3 bit)
access : read-write

SCAN_RSP_TX_INTR : If this bit is set it indicates scan response packet transmitted in response to previous scan request packet received. Write to the register with this bit set to 1, clears the interrupt source.
bits : 3 - 6 (4 bit)
access : read-write

SCAN_REQ_RX_INTR : If this bit is set it indicates scan request packet received. Write to the register with this bit set to 1, clears the interrupt source.
bits : 4 - 8 (5 bit)
access : read-write

CONN_REQ_RX_INTR : If this bit is set it indicates connect request packet is received. Write to the register with this bit set to 1, clears the interrupt source.
bits : 5 - 10 (6 bit)
access : read-write

SLV_CONNECTED : If this bit is set it indicates that connection is created as slave. Write to the register with this bit set to 1, clears the interrupt source. Note: On a slave connection creation, the link layer cannot enter deepsleep mode in the same slot . It can enter deepsleep mode only in the subsequent slots.
bits : 6 - 12 (7 bit)
access : read-write

ADV_TIMEOUT : If this bit is set it indicates that the directed advertising event has timed out after 1.28 seconds. Applicable in adv_direct_ind advertising. Write to the register with this bit set to 1, clears the interrupt source.
bits : 7 - 14 (8 bit)
access : read-write

ADV_ON : Advertiser procedure is ON in hardware. Indicates that advertiser procedure is ON in hardware. 1 - ON 0 - OFF
bits : 8 - 16 (9 bit)
access : read-only

SLV_CONN_PEER_RPA_UNMCH_INTR : If this bit is set it indicates that connection is created as slave, but the peer device Resolvable Private Address is not resolved/ ID or NRPA are not matched yet. If the address is not resolved prior to connection establishment, the connection will be terminated. Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set.
bits : 9 - 18 (10 bit)
access : read-write

SCAN_REQ_RX_PEER_RPA_UNMCH_INTR : If this bit is set it indicates scan request packet received, but the peer device Resolvable Private Address is not resolved/ ID or NRPA are not matched yet. Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set.
bits : 10 - 20 (11 bit)
access : read-write

INIT_ADDR_MATCH_PRIV_MISMATCH_INTR : If this bit is set it indicates that an Identity address is received from a Scanner and matches an entry in the resolving list, but peer IRK is set and hence a corresponding RPA is expected from the Scanner Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set.
bits : 11 - 22 (12 bit)
access : read-write

SCAN_ADDR_MATCH_PRIV_MISMATCH_INTR : If this bit is set it indicates that an Identity address is received from an initiator and matches an entry in the resolving list, but peer IRK is set and hence a corresponding RPA is expected from the initiator Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_ADV are set.
bits : 12 - 24 (13 bit)
access : read-write


BLELL - LL_DBG_1

Bluetooth Low Energy Link Layer - - LL debug register 1
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_DBG_1 BLELL - LL_DBG_1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_RX_WR_PTR

CONN_RX_WR_PTR : Connection receive FIFO write pointer
bits : 0 - 9 (10 bit)
access : read-only


BLELL - LL_DBG_2

Bluetooth Low Energy Link Layer - - LL debug register 2
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_DBG_2 BLELL - LL_DBG_2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_RX_RD_PTR

CONN_RX_RD_PTR : Connection receive FIFO read pointer
bits : 0 - 9 (10 bit)
access : read-only


BLELL - LL_DBG_3

Bluetooth Low Energy Link Layer - - LL debug register 3
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_DBG_3 BLELL - LL_DBG_3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_RX_WR_PTR_STORE

CONN_RX_WR_PTR_STORE : Connection receive FIFO stored write pointer for pointer restore
bits : 0 - 9 (10 bit)
access : read-only


BLELL - LL_DBG_4

Bluetooth Low Energy Link Layer - - LL debug register 4
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_DBG_4 BLELL - LL_DBG_4 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONNECTION_FSM_STATE SLAVE_LATENCY_FSM_STATE ADVERTISER_FSM_STATE

CONNECTION_FSM_STATE : Connection FSM state
bits : 0 - 3 (4 bit)
access : read-only

SLAVE_LATENCY_FSM_STATE : Slave Latency FSM state
bits : 4 - 9 (6 bit)
access : read-only

ADVERTISER_FSM_STATE : Advertiser FSM state
bits : 6 - 16 (11 bit)
access : read-only


BLELL - LL_DBG_5

Bluetooth Low Energy Link Layer - - LL debug register 5
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_DBG_5 BLELL - LL_DBG_5 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INIT_FSM_STATE SCAN_FSM_STATE

INIT_FSM_STATE : Initiator FSM state
bits : 0 - 4 (5 bit)
access : read-only

SCAN_FSM_STATE : Scanner FSM state
bits : 5 - 14 (10 bit)
access : read-only


BLELL - LL_DBG_6

Bluetooth Low Energy Link Layer - - LL debug register 6
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_DBG_6 BLELL - LL_DBG_6 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_TX_WR_PTR SCAN_RSP_TX_WR_PTR ADV_TX_RD_PTR

ADV_TX_WR_PTR : Advertiser Transmit FIFO write pointer
bits : 0 - 3 (4 bit)
access : read-only

SCAN_RSP_TX_WR_PTR : Scan Response Transmit FIFO write pointer
bits : 4 - 11 (8 bit)
access : read-only

ADV_TX_RD_PTR : Advertiser/ Scan Response FIFO read pointer
bits : 8 - 21 (14 bit)
access : read-only


BLELL - LL_DBG_7

Bluetooth Low Energy Link Layer - - LL debug register 7
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_DBG_7 BLELL - LL_DBG_7 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_RX_WR_PTR ADV_RX_RD_PTR

ADV_RX_WR_PTR : Advertiser Receive FIFO write pointer
bits : 0 - 6 (7 bit)
access : read-only

ADV_RX_RD_PTR : Advertiser Receive FIFO read pointer
bits : 7 - 20 (14 bit)
access : read-only


BLELL - LL_DBG_8

Bluetooth Low Energy Link Layer - - LL debug register 8
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_DBG_8 BLELL - LL_DBG_8 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_RX_WR_PTR_STORE WLF_PTR

ADV_RX_WR_PTR_STORE : Advertiser Receive FIFO stored write pointer for pointer restore
bits : 0 - 6 (7 bit)
access : read-only

WLF_PTR : Whitelist FIFO pointer
bits : 7 - 20 (14 bit)
access : read-only


BLELL - LL_DBG_9

Bluetooth Low Energy Link Layer - - LL debug register 9
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_DBG_9 BLELL - LL_DBG_9 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WINDOW_WIDEN

WINDOW_WIDEN : Window Widening value in us. The reset value of this register is 0x0000. After reset de-assertion, at the first clock cycle, the value 0x0010 is assigned to the register.
bits : 0 - 15 (16 bit)
access : read-only


BLESS - ENC_KEY[0]

Bluetooth Low Energy Subsystem Miscellaneous - - Encryption Key register 0-3
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - ENC_KEY[0] BLESS - ENC_KEY[0] write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENC_KEY

ENC_KEY : The encryption key / session key which is used in ECB encryption, CCM encryption and CCM decryption.
bits : 0 - 31 (32 bit)
access : write-only


BLELL - LL_DBG_10

Bluetooth Low Energy Link Layer - - LL debug register 10
address_offset : 0x224 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_DBG_10 BLELL - LL_DBG_10 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RF_CHANNEL_NUM

RF_CHANNEL_NUM : Active channel number
bits : 0 - 5 (6 bit)
access : read-only


BLELL - PEER_ADDR_INIT_L

Bluetooth Low Energy Link Layer - - Lower 16 bit address of the peer device for INIT.
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PEER_ADDR_INIT_L BLELL - PEER_ADDR_INIT_L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEER_ADDR_L

PEER_ADDR_L : Lower 16 bit of 48-bit address of the peer device. This is used only in MMMS mode The peer address registers are used for multiple purposes. The register is written by firmware to provide the peer address to be used for a hardware procedure. When firmware reads the register, it reads back peer address values updated by hardware. While device is configured as an initiator without white list filtering, the peer address specified in the peer_address field of the create connection command is programmed into this register, which is used by hard-ware procedures. While device is configured as an initiator and white list is enabled, firmware can read this register to get the address of the peer device from which connectable ADV packet was received and to which the connection is created.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - PEER_ADDR_INIT_M

Bluetooth Low Energy Link Layer - - Middle 16 bit address of the peer device for INIT.
address_offset : 0x234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PEER_ADDR_INIT_M BLELL - PEER_ADDR_INIT_M read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEER_ADDR_M

PEER_ADDR_M : Middle 16 bit of 48-bit address of the peer device. This is used only in MMMS mode The peer address registers are used for multiple purposes. The register is written by firmware to provide the peer address to be used for a hardware procedure. When firmware reads the register, it reads back peer address values updated by hardware. While device is configured as an initiator without white list filtering, the peer address specified in the peer_address field of the create connection command is programmed into this register, which is used by hard-ware procedures. While device is configured as an initiator and white list is enabled, firmware can read this register to get the address of the peer device from which connectable ADV packet was received and to which the connection is created.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - PEER_ADDR_INIT_H

Bluetooth Low Energy Link Layer - - Higher 16 bit address of the peer device for INIT.
address_offset : 0x238 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PEER_ADDR_INIT_H BLELL - PEER_ADDR_INIT_H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEER_ADDR_H

PEER_ADDR_H : Higher 16 bit of 48-bit address of the peer device. This is used only in MMMS mode The peer address registers are used for multiple purposes. The register is written by firmware to provide the peer address to be used for a hardware procedure. When firmware reads the register, it reads back peer address values updated by hardware. While device is configured as an initiator without white list filtering, the peer address specified in the peer_address field of the create connection command is programmed into this register, which is used by hard-ware procedures. While device is configured as an initiator and white list is enabled, firmware can read this register to get the address of the peer device from which connectable ADV packet was received and to which the connection is created.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - PEER_SEC_ADDR_ADV_L

Bluetooth Low Energy Link Layer - - Lower 16 bits of the secondary address of the peer device for ADV_DIR.
address_offset : 0x23C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PEER_SEC_ADDR_ADV_L BLELL - PEER_SEC_ADDR_ADV_L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEER_SEC_ADDR_L

PEER_SEC_ADDR_L : Lower 16 bit of 48-bit secondary address of the peer device for ADV_DIR.
bits : 0 - 15 (16 bit)
access : read-write


RCB - RX_FIFO_CTRL

Radio Control Bus (RCB) controller - - Receiver FIFO control register.
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - RX_FIFO_CTRL RCB - RX_FIFO_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIGGER_LEVEL CLEAR

TRIGGER_LEVEL : Trigger level. When the receiver FIFO has more entries than the number of this field, a receiver trigger event is generated.
bits : 0 - 3 (4 bit)
access : read-write

CLEAR : When '1', the receiver FIFO and receiver shift register are cleared/invalidated. Invalidation will last for as long as this field is '1'. If a quick clear/invalidation is required, the field should be set to '1' and be followed by a set to '0'. If a clear/invalidation is required for an extended time period, the field should be set to '1' during the complete time period.
bits : 16 - 32 (17 bit)
access : read-write


RCB - - RCBLL - RADIO_REG2_ADDR

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - Address of Register#2 in Radio (RSSI)
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - RADIO_REG2_ADDR RCB - - RCBLL - RADIO_REG2_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REG_ADDR

REG_ADDR : N/A
bits : 0 - 15 (16 bit)
access : read-write


BLELL - ADV_NEXT_INSTANT

Bluetooth Low Energy Link Layer - - Advertising next instant.
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_NEXT_INSTANT BLELL - ADV_NEXT_INSTANT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_NEXT_INSTANT

ADV_NEXT_INSTANT : Shows the next start of advertising event with reference to the internal reference clock.
bits : 0 - 15 (16 bit)
access : read-only


BLELL - PEER_SEC_ADDR_ADV_M

Bluetooth Low Energy Link Layer - - Middle 16 bits of the secondary address of the peer device for ADV_DIR.
address_offset : 0x240 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PEER_SEC_ADDR_ADV_M BLELL - PEER_SEC_ADDR_ADV_M read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEER_SEC_ADDR_M

PEER_SEC_ADDR_M : Middle 16 bit of 48-bit secondary address of the peer device for ADV_DIR.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - PEER_SEC_ADDR_ADV_H

Bluetooth Low Energy Link Layer - - Higher 16 bits of the secondary address of the peer device for ADV_DIR.
address_offset : 0x244 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PEER_SEC_ADDR_ADV_H BLELL - PEER_SEC_ADDR_ADV_H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEER_SEC_ADDR_H

PEER_SEC_ADDR_H : Higher 16 bit of 48-bit secondary address of the peer device for ADV_DIR. While doing directed Advertising in device privacy mode, if the peer device has shared its IRK, then the peer device RPA is written into the PEER_ADDR registers and the peer device identity address is written into this register. If the peer device has not shared its IRK, then the peer identity address is written into the PEER_ADDR registers and this register must be cleared.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - INIT_WINDOW_TIMER_CTRL

Bluetooth Low Energy Link Layer - - Initiator Window NI timer control
address_offset : 0x248 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - INIT_WINDOW_TIMER_CTRL BLELL - INIT_WINDOW_TIMER_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INIT_WINDOW_OFFSET_SEL

INIT_WINDOW_OFFSET_SEL : Controls the INIT Window offset source 1 - Pick INIT Window Offset from HW calculated INIT_WINDOW_OFFSET 0 - Pick INIT Window Offset from FW loaded register
bits : 0 - 0 (1 bit)
access : read-write


BLELL - CONN_CONFIG_EXT

Bluetooth Low Energy Link Layer - - Connection extended configuration register
address_offset : 0x24C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_CONFIG_EXT BLELL - CONN_CONFIG_EXT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_REQ_2SLOT_EARLY CONN_REQ_3SLOT_EARLY FW_PKT_RCV_CONN_INDEX MMMS_RX_PKT_LIMIT DEBUG_CE_EXPIRE MT_PDU_CE_EXPIRE

CONN_REQ_2SLOT_EARLY : This bit is used to enable extension of the Conn Request to arbiter to 2 slot early. When enabled the request length is 3 slots, irrespective of the status of CONN_REQ_1SLOT_EARLY bit. 1 - Enable 0 - Disable
bits : 0 - 0 (1 bit)
access : read-write

CONN_REQ_3SLOT_EARLY : This bit is used to enable extension of the Conn Request to arbiter to 3 slot early. When enabled the request length is 4 slots, irrespective of the status of CONN_REQ_1SLOT_EARLY & CONN_REQ_2SLOT_EARLY bits. 1 - Enable 0 - Disable
bits : 1 - 2 (2 bit)
access : read-write

FW_PKT_RCV_CONN_INDEX : Connection Index for which the FW generates Packet Received Command. In MMMS mode, FW should write this field before giving PKT_RECEIVE_COMMAND to HW.
bits : 2 - 8 (7 bit)
access : read-write

MMMS_RX_PKT_LIMIT : Receive Packet Limit for MMMS mode. This is the RX_FIFO Limit and applies to all connections together
bits : 8 - 21 (14 bit)
access : read-write

DEBUG_CE_EXPIRE : MMMS CE expire control bit
bits : 14 - 28 (15 bit)
access : read-write

MT_PDU_CE_EXPIRE : MMMS empty PDU CE expire handling control bit
bits : 15 - 30 (16 bit)
access : read-write


BLELL - DPLL_CONFIG

Bluetooth Low Energy Link Layer - - DPLL and CY Correlator configuration register
address_offset : 0x258 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DPLL_CONFIG BLELL - DPLL_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DPLL_CORREL_CONFIG

DPLL_CORREL_CONFIG : If MXD_IF_OPTION is 0: Not used If CY_CORREL_EN is 1: [11:0] CY correl Access address compare mask for LSB 12 bits. Ideal value is 0xFFF [15:12] CY correl maximum number of allowed mismatched bits in access address. Ideal value is 0x0.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - INIT_NI_VAL

Bluetooth Low Energy Link Layer - - Initiator Window NI instant
address_offset : 0x260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - INIT_NI_VAL BLELL - INIT_NI_VAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INIT_NI_VAL

INIT_NI_VAL : Initiator window Next Instant value used for spacing Master connections in time, to minimize connection contention. This value is in 625us slots. The read value corresponds to the hardware updated Interval value
bits : 0 - 15 (16 bit)
access : read-write


BLELL - INIT_WINDOW_OFFSET

Bluetooth Low Energy Link Layer - - Initiator Window offset captured at conn request
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - INIT_WINDOW_OFFSET BLELL - INIT_WINDOW_OFFSET read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INIT_WINDOW_NI

INIT_WINDOW_NI : Initiator Window offset captured at conn request. This value is in 1.25ms slots
bits : 0 - 15 (16 bit)
access : read-only


BLELL - INIT_WINDOW_NI_ANCHOR_PT

Bluetooth Low Energy Link Layer - - Initiator Window NI anchor point captured at conn request
address_offset : 0x268 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - INIT_WINDOW_NI_ANCHOR_PT BLELL - INIT_WINDOW_NI_ANCHOR_PT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INIT_INT_OFF_CAPT

INIT_INT_OFF_CAPT : Initiator interval offset captured at conn request. The value indicates the master connection anchor point. This value is in 625us slots
bits : 0 - 15 (16 bit)
access : read-only


RCB - RX_FIFO_STATUS

Radio Control Bus (RCB) controller - - Receiver FIFO status register.
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RCB - RX_FIFO_STATUS RCB - RX_FIFO_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USED SR_VALID RD_PTR WR_PTR

USED : Amount of enties in the receiver FIFO. The value of this field ranges from 0 to FF_DATA_NR.
bits : 0 - 4 (5 bit)
access : read-only

SR_VALID : Indicates whether the RX shift registers holds a (partial) valid data frame ('1') or not ('0'). The shift register can be considered the bottom of the RX FIFO (the data frame is not included in the USED field of the RX FIFO). The shift register is a working register and holds the data frame that is currently being received (when the protocol state machine is receiving a data frame).
bits : 15 - 30 (16 bit)
access : read-only

RD_PTR : FIFO read pointer: FIFO location from which a data frame is read.
bits : 16 - 35 (20 bit)
access : read-only

WR_PTR : FIFO write pointer: FIFO location at which a new data frame is written by the hardware.
bits : 24 - 51 (28 bit)
access : read-only


RCB - - RCBLL - RADIO_REG3_ADDR

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - Address of Register#3 in Radio (ACCL)
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - RADIO_REG3_ADDR RCB - - RCBLL - RADIO_REG3_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REG_ADDR

REG_ADDR : N/A
bits : 0 - 15 (16 bit)
access : read-write


BLELL - SCAN_INTERVAL

Bluetooth Low Energy Link Layer - - Scan Interval Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - SCAN_INTERVAL BLELL - SCAN_INTERVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCAN_INTERVAL

SCAN_INTERVAL : Scan interval register. Interval between two consecutive scanning events. Firmware sets the scanning interval value to this register before issuing start scan command. Range: 0x0004 to 0x4000 Default: 0x0010 (10 ms) Time = N * 0.625 msec Time Range: 2.5 msec to 10.24 sec. In MMMS mode, this register is used as SCAN_NI_TIMER when the SCAN_NI_VALID is set by firmware
bits : 0 - 15 (16 bit)
access : read-write


BLELL - DATA_MEM_DESCRIPTOR[0]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 4
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_MEM_DESCRIPTOR[0] BLELL - DATA_MEM_DESCRIPTOR[0] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID DATA_LENGTH

LLID : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLESS - B1_DATA_REG[0]

Bluetooth Low Energy Subsystem Miscellaneous - - Programmable B1 Data register (0-3)
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - B1_DATA_REG[0] BLESS - B1_DATA_REG[0] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B1_DATA

B1_DATA : Programmable B1 Data register
bits : 0 - 31 (32 bit)
access : read-write


BLELL - CONN_TXMEM_BASE_ADDR_DLE

Bluetooth Low Energy Link Layer - - DLE Connection TX memory base address
address_offset : 0x2800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_TXMEM_BASE_ADDR_DLE BLELL - CONN_TXMEM_BASE_ADDR_DLE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_TX_MEM_BASE_ADDR_DLE

CONN_TX_MEM_BASE_ADDR_DLE : Data to Tx memory are written as 32-bit wide data. This memory is valid only if DLE is set.
bits : 0 - 31 (32 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[0]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0x28200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[0] BLELL - MMMS_DATA_MEM_DESCRIPTOR[0] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - CONN_RX_PKT_CNTR[0]

Bluetooth Low Energy Link Layer - - Packet Counter for Individual connection index
address_offset : 0x28860 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_RX_PKT_CNTR[0] BLELL - CONN_RX_PKT_CNTR[0] read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_PKT_CNT

RX_PKT_CNT : Number of packets received for the connection. Incremented when the packet is received during the connection event and decremented when firmware has processed the packet. The register field FW_PKT_RCV_CONN_INDEX should be programmed before firmware issues the packet received command
bits : 0 - 5 (6 bit)
access : read-only


RCB - RX_FIFO_RD

Radio Control Bus (RCB) controller - - Receiver FIFO read register.
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RCB - RX_FIFO_RD RCB - RX_FIFO_RD read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : N/A
bits : 0 - 31 (32 bit)
access : read-only


RCB - - RCBLL - RADIO_REG4_ADDR

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - Address of Register#4 in Radio (ACCH)
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - RADIO_REG4_ADDR RCB - - RCBLL - RADIO_REG4_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REG_ADDR

REG_ADDR : N/A
bits : 0 - 15 (16 bit)
access : read-write


BLELL - SCAN_WINDOW

Bluetooth Low Energy Link Layer - - Scan window Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - SCAN_WINDOW BLELL - SCAN_WINDOW read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCAN_WINDOW

SCAN_WINDOW : Duration of scan in a scanning event, which should be less than or equal to scan interval value. Firmware sets the scan window value to this register before issuing start scan command. Range: 0x0004 to 0x4000 Default: 0x0010 (10 ms) Time = N * 0.625 msec Time Range: 2.5 msec to 10.24 sec. (To prevent ADV RX - SCAN REQ TX - SCAN RSP RX spilling over across the scan window, when not in continuous scan, the scan window must be 2 slots less that the scan interval.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[1]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0x2D34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[1] BLELL - RSLV_LIST_ENABLE[1] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLESS - TRIM_MXD[1]

Bluetooth Low Energy Subsystem Miscellaneous - - MXD die Trim registers
address_offset : 0x2D34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - TRIM_MXD[1] BLESS - TRIM_MXD[1] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MXD_TRIM_BITS

MXD_TRIM_BITS : MXD trim bits
bits : 0 - 7 (8 bit)
access : read-write


RCB - RX_FIFO_RD_SILENT

Radio Control Bus (RCB) controller - - Receiver FIFO read register.
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RCB - RX_FIFO_RD_SILENT RCB - RX_FIFO_RD_SILENT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data read from the receiver FIFO. Reading a data frame will NOT remove the data frame from the FIFO; i.e. behavior is similar to that of a PEEK operation. A read from an empty RX FIFO sets INTR_RX.UNDERFLOW to '1'.
bits : 0 - 31 (32 bit)
access : read-only


RCB - - RCBLL - RADIO_REG5_ADDR

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - Address of Register#5 in Radio (RSSI ENERGY)
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - RADIO_REG5_ADDR RCB - - RCBLL - RADIO_REG5_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REG_ADDR

REG_ADDR : N/A
bits : 0 - 15 (16 bit)
access : read-write


BLELL - SCAN_PARAM

Bluetooth Low Energy Link Layer - - Scanning parameters register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - SCAN_PARAM BLELL - SCAN_PARAM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TX_ADDR SCAN_TYPE SCAN_FILT_POLICY DUP_FILT_EN DUP_FILT_CHK_ADV_DIR SCAN_RSP_ADVA_CHECK SCAN_RCV_IA_IN_PRIV SCAN_RPT_PEER_NRPA_ADDR_IN_PRIV

TX_ADDR : Device's own address type. 1 - addr type is random. 0 - addr type is public.
bits : 0 - 0 (1 bit)
access : read-write

SCAN_TYPE : 0x00 - passive scanning.(default) 0x01 - active scanning. 0x10 - RFU 0x11 - RFU
bits : 1 - 3 (3 bit)
access : read-write

SCAN_FILT_POLICY : The scanner filter policy determines how the scanner processes advertising packets. 0x00 - Accept advertising packets from any device. 0x01 - Accept advertising packets from only devices in the whitelist. In the above 2 policies, the directed advertising packets which are not addressed to this device are ignored. 0x10 - Accept all undirected advertising packets and directed advertising packet addressed to this device. 0x11 - Accept undirected advertising packets from devices in the whitelist and directed advertising packet addressed to this device In the above 2 policies, the directed advertising packets where the initiator address is a resolvable private address are accepted. The above 2 policies are extended scanner filter policies.
bits : 3 - 7 (5 bit)
access : read-write

DUP_FILT_EN : Filter duplicate packets. 1- Duplicate filtering enabled. 0- Duplicate filtering not enabled. This field is derived from the LE_set_scan_enable command.
bits : 5 - 10 (6 bit)
access : read-write

DUP_FILT_CHK_ADV_DIR : This bit field is used to specify the Scanner duplicate filter behavior for ADV_DIRECT_IND packet when duplicate DUP_FILT_EN is set. This bit is valid only if PRIV_1_2 and PRIV_1_2_SCAN are set. 0 - Do not filter ADV_DIRECT_IND duplicate packets. 1 - Filter ADV_DIRECT_IND duplicate packets
bits : 6 - 12 (7 bit)
access : read-write

SCAN_RSP_ADVA_CHECK : This bit field is used to specify the Scanner behavior with respect to ADVA while receiving a SCAN_RSP packet. This bit is valid only if PRIV_1_2 and PRIV_1_2_SCAN are set. 0 - The ADVA in SCAN_RSP packets are not verified 1 - The ADVA in SCAN_RSP packets are verified against ADVA received in ADV packet . If it fails, then abort the packet.
bits : 7 - 14 (8 bit)
access : read-write

SCAN_RCV_IA_IN_PRIV : Scanner behavior when a peer Identity address is received in privacy mode. This bit is valid only if PRIV_1_2 and PRIV_1_2_SCAN are set. 1 - Accept packets with peer identity address not in the Resolving list in privacy mode 0 - Reject packets with peer identity address not in the Resolving list in privacy mode
bits : 8 - 16 (9 bit)
access : read-write

SCAN_RPT_PEER_NRPA_ADDR_IN_PRIV : Scanner behavior when a peer Non Resolvable Private Address is received in privacy mode. This bit is valid only if PRIV_1_2 and PRIV_1_2_SCAN are set. This is applicable when whitelist is disabled. 1 - Only report packets with peer NRPA address in privacy mode 0 - Respond packets with peer NRPA address in privacy mode
bits : 9 - 18 (10 bit)
access : read-write


BLESS - ENC_KEY[1]

Bluetooth Low Energy Subsystem Miscellaneous - - Encryption Key register 0-3
address_offset : 0x334 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - ENC_KEY[1] BLESS - ENC_KEY[1] write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENC_KEY

ENC_KEY : The encryption key / session key which is used in ECB encryption, CCM encryption and CCM decryption.
bits : 0 - 31 (32 bit)
access : write-only


BLELL - SCAN_INTR

Bluetooth Low Energy Link Layer - - Scan interrupt status and Clear register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - SCAN_INTR BLELL - SCAN_INTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCAN_STRT_INTR SCAN_CLOSE_INTR SCAN_TX_INTR ADV_RX_INTR SCAN_RSP_RX_INTR ADV_RX_PEER_RPA_UNMCH_INTR ADV_RX_SELF_RPA_UNMCH_INTR SCANA_TX_ADDR_NOT_SET_INTR SCAN_ON PEER_ADDR_MATCH_PRIV_MISMATCH_INTR SELF_ADDR_MATCH_PRIV_MISMATCH_INTR

SCAN_STRT_INTR : If this bit is set it indicates scan window is opened. Write to the register with this bit set to 1, clears the interrupt source.
bits : 0 - 0 (1 bit)
access : read-write

SCAN_CLOSE_INTR : If this bit is set it indicates scan window is closed. Write to the register with this bit set to 1, clears the interrupt source.
bits : 1 - 2 (2 bit)
access : read-write

SCAN_TX_INTR : If this bit is set it indicates scan request packet is transmitted. Write to the register with this bit set to 1, clears the interrupt source.
bits : 2 - 4 (3 bit)
access : read-write

ADV_RX_INTR : If this bit is set it indicates ADV packet received. Firmware can read the content of the packet from the INIT_SCN_ADV_RX_FIFO. Write to the register with this bit set to 1, clears the interrupt source. This interrupt is generated while active/passive scanning upon receiving adv packets. Note: Any ADV RX interrupt received after issuing SCAN_STOP command must be ignored and the ADVCH FIFO flushed.
bits : 3 - 6 (4 bit)
access : read-write

SCAN_RSP_RX_INTR : If this bit is set it indicates SCAN_RSP packet is received. Firmware can read the content of the packet from the INIT_SCN_ADV_RX_FIFO. Write to the register with this bit set to 1, clears the interrupt source. NOTE: This interrupt is generated while active scanning upon receiving scan response packet.
bits : 4 - 8 (5 bit)
access : read-write

ADV_RX_PEER_RPA_UNMCH_INTR : If this bit is set it indicates ADV packet received but the peer device Address is not match yet. Firmware can read the content of the packet from the INIT_SCN_ADV_RX_FIFO. This bit is valid only if PRIV_1_2 and PRIV_1_2_SCAN are set. Write to the register with this bit set to 1, clears the interrupt source. This interrupt is generated while active/passive scanning upon receiving adv packets.
bits : 5 - 10 (6 bit)
access : read-write

ADV_RX_SELF_RPA_UNMCH_INTR : If this bit is set it indicates ADV_DIRECT packet received but the self device Resolvable Private Address is not resolved yet. Firmware can read the content of the packet from the INIT_SCN_ADV_RX_FIFO. This bit is valid only if PRIV_1_2 and PRIV_1_2_SCAN are set. Write to the register with this bit set to 1, clears the interrupt source. This interrupt is generated while active/passive scanning upon receiving adv_direct packets.
bits : 6 - 12 (7 bit)
access : read-write

SCANA_TX_ADDR_NOT_SET_INTR : If this bit is set it indicates that a valid ScanA RPA to be transmitted in SCAN_REQ packet in response to an ADV packet is not present in the resolving list Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_SCAN are set.
bits : 7 - 14 (8 bit)
access : read-write

SCAN_ON : Scan procedure status. 1 - scan procedure is active. 0 - scan procedure is not active.
bits : 8 - 16 (9 bit)
access : read-only

PEER_ADDR_MATCH_PRIV_MISMATCH_INTR : If this bit is set it indicates that an Identity address is received from an initiator and matches an entry in the resolving list, but peer IRK is set and hence a corresponding RPA is expected from the initiator Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_SCAN are set.
bits : 9 - 18 (10 bit)
access : read-write

SELF_ADDR_MATCH_PRIV_MISMATCH_INTR : If this bit is set it indicates that the self Identity address is received from an initiator and matches, but self IRK is set and hence a corresponding RPA is expected from the initiator Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_SCAN are set.
bits : 10 - 20 (11 bit)
access : read-write


BLELL - CONN_UPDATE_NEW_INTERVAL

Bluetooth Low Energy Link Layer - - Connection update new interval
address_offset : 0x3A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_UPDATE_NEW_INTERVAL BLELL - CONN_UPDATE_NEW_INTERVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_UPDT_INTERVAL

CONN_UPDT_INTERVAL : This register will have the new connection interval that the hardware will use after the connection update instant. Before the instant, the connection interval in the register CONN_INTERVAL will be used by hardware.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_UPDATE_NEW_LATENCY

Bluetooth Low Energy Link Layer - - Connection update new latency
address_offset : 0x3A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_UPDATE_NEW_LATENCY BLELL - CONN_UPDATE_NEW_LATENCY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_UPDT_SLV_LATENCY

CONN_UPDT_SLV_LATENCY : This register will have the new slave latency parameter that the hardware will use after the connection update instant. Before the instant, the connection interval in the register SLAVE_LATENCY will be used by hardware.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_UPDATE_NEW_SUP_TO

Bluetooth Low Energy Link Layer - - Connection update new supervision timeout
address_offset : 0x3AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_UPDATE_NEW_SUP_TO BLELL - CONN_UPDATE_NEW_SUP_TO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_UPDT_SUP_TO

CONN_UPDT_SUP_TO : This register will have the new supervision timeout that the hardware will use after the connection update instant. Before the instant, the connection interval in the register SUP_TIMEOUT will be used by hardware.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_UPDATE_NEW_SL_INTERVAL

Bluetooth Low Energy Link Layer - - Connection update new Slave Latency X Conn interval Value
address_offset : 0x3B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_UPDATE_NEW_SL_INTERVAL BLELL - CONN_UPDATE_NEW_SL_INTERVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SL_CONN_INTERVAL_VAL

SL_CONN_INTERVAL_VAL : This register will have the new Slave Latency * Conn Interval value that the hardware will use after the connection update instant. Before the instant, the connection interval in the register SL_CONN_INTERVAL will be used by hardware.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - SCAN_NEXT_INSTANT

Bluetooth Low Energy Link Layer - - Advertising next instant.
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - SCAN_NEXT_INSTANT BLELL - SCAN_NEXT_INSTANT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NEXT_SCAN_INSTANT

NEXT_SCAN_INSTANT : Shows the instant with respect to internal reference clock of resolution 625 us at which next scanning event begins.
bits : 0 - 15 (16 bit)
access : read-only


BLELL - CONN_REQ_WORD0

Bluetooth Low Energy Link Layer - - Connection request address word 0
address_offset : 0x3C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD0 BLELL - CONN_REQ_WORD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACCESS_ADDR_LOWER

ACCESS_ADDR_LOWER : This field defines the lower 16 bits of the access address that is to be sent in the connect request packet of the initiator.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[1]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0x3C304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[1] BLELL - MMMS_DATA_MEM_DESCRIPTOR[1] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - DATA_MEM_DESCRIPTOR[1]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 4
address_offset : 0x3C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_MEM_DESCRIPTOR[1] BLELL - DATA_MEM_DESCRIPTOR[1] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID DATA_LENGTH

LLID : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - CONN_REQ_WORD1

Bluetooth Low Energy Link Layer - - Connection request address word 1
address_offset : 0x3C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD1 BLELL - CONN_REQ_WORD1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACCESS_ADDR_UPPER

ACCESS_ADDR_UPPER : This field defines the upper16 bits of the access address that is to be sent in the connect request packet of the initiator.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - B1_DATA_REG[1]

Bluetooth Low Energy Subsystem Miscellaneous - - Programmable B1 Data register (0-3)
address_offset : 0x3C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - B1_DATA_REG[1] BLESS - B1_DATA_REG[1] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B1_DATA

B1_DATA : Programmable B1 Data register
bits : 0 - 31 (32 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[2]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0x3C4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[2] BLELL - RSLV_LIST_ENABLE[2] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLESS - TRIM_MXD[2]

Bluetooth Low Energy Subsystem Miscellaneous - - MXD die Trim registers
address_offset : 0x3C4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - TRIM_MXD[2] BLESS - TRIM_MXD[2] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MXD_TRIM_BITS

MXD_TRIM_BITS : MXD trim bits
bits : 0 - 7 (8 bit)
access : read-write


BLELL - CONN_REQ_WORD2

Bluetooth Low Energy Link Layer - - Connection request address word 2
address_offset : 0x3C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD2 BLELL - CONN_REQ_WORD2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TX_WINDOW_SIZE_VAL CRC_INIT_LOWER

TX_WINDOW_SIZE_VAL : window_size along with the window_offset is used to calculate the first connection point anchor point for the master. This shall be a multiple of 1.25 ms in the range of 1.25 ms to the lesser of 10 ms and (connInterval - 1.25 ms). Values range from 0 to 10 ms.
bits : 0 - 7 (8 bit)
access : read-write

CRC_INIT_LOWER : This field defines the lower byte [7:0] of the CRC initialization value.
bits : 8 - 23 (16 bit)
access : read-write


BLELL - CONN_REQ_WORD3

Bluetooth Low Energy Link Layer - - Connection request address word 3
address_offset : 0x3CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD3 BLELL - CONN_REQ_WORD3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CRC_INIT_UPPER

CRC_INIT_UPPER : This field defines the upper byte [23:8] of the CRC initialization value that is to be sent in the connect request packet of the initiator.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_RX_PKT_CNTR[1]

Bluetooth Low Energy Link Layer - - Packet Counter for Individual connection index
address_offset : 0x3CC94 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_RX_PKT_CNTR[1] BLELL - CONN_RX_PKT_CNTR[1] read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_PKT_CNT

RX_PKT_CNT : Number of packets received for the connection. Incremented when the packet is received during the connection event and decremented when firmware has processed the packet. The register field FW_PKT_RCV_CONN_INDEX should be programmed before firmware issues the packet received command
bits : 0 - 5 (6 bit)
access : read-only


BLELL - CONN_REQ_WORD4

Bluetooth Low Energy Link Layer - - Connection request address word 4
address_offset : 0x3D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD4 BLELL - CONN_REQ_WORD4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TX_WINDOW_OFFSET

TX_WINDOW_OFFSET : This is used to determine the anchor point for the master transmission. Range: This shall be a multiple of 1.25 ms in the range of 0 ms to connInterval value.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_REQ_WORD5

Bluetooth Low Energy Link Layer - - Connection request address word 5
address_offset : 0x3D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD5 BLELL - CONN_REQ_WORD5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONNECTION_INTERVAL_VAL

CONNECTION_INTERVAL_VAL : The value configured in this register determines the spacing between the connection events. This shall be a multiple of 1.25 ms in the range of 7.5 ms to 4.0 s.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_REQ_WORD6

Bluetooth Low Energy Link Layer - - Connection request address word 6
address_offset : 0x3D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD6 BLELL - CONN_REQ_WORD6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLAVE_LATENCY_VAL

SLAVE_LATENCY_VAL : The value configured in this field defines the number of consecutive connection events that the slave device is not required to listen for master. The value of connSlaveLatency should not cause a Supervision Timeout. This shall be an integer in the range of 0 to ((connSupervision Timeout/connInterval)-1). connSlaveLatency shall also be less than 500.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_REQ_WORD7

Bluetooth Low Energy Link Layer - - Connection request address word 7
address_offset : 0x3DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD7 BLELL - CONN_REQ_WORD7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SUPERVISION_TIMEOUT_VAL

SUPERVISION_TIMEOUT_VAL : This field defines the maximum time between two received Data packet PDUs before the connection is considered lost. This shall be a multiple of 10 ms in the range of 100 ms to 32.0 s and it shall be larger than (1+connSlaveLatency)*connInterval.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_REQ_WORD8

Bluetooth Low Energy Link Layer - - Connection request address word 8
address_offset : 0x3E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD8 BLELL - CONN_REQ_WORD8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_CHANNELS_LOWER

DATA_CHANNELS_LOWER : This register field indicates which of the data channels are in use. This stores the information for the lower 16 (15:0) data channel indices. 1' indicates the corresponding data channel is used and '0' indicates the channel is unused.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_REQ_WORD9

Bluetooth Low Energy Link Layer - - Connection request address word 9
address_offset : 0x3E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD9 BLELL - CONN_REQ_WORD9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_CHANNELS_MID

DATA_CHANNELS_MID : This register field indicates which of the data channels are in use. This stores the information for the middle 16 (31:16) data channel indices. '1' indicates the corresponding data channel is used and '0' indicates the channel is unused.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_REQ_WORD10

Bluetooth Low Energy Link Layer - - Connection request address word 10
address_offset : 0x3E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD10 BLELL - CONN_REQ_WORD10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_CHANNELS_UPPER

DATA_CHANNELS_UPPER : This register field indicates which of the data channels are in use. This stores the information for the upper 5 (36:32) data channel indices. '1' indicates the corresponding data channel is used and '0' indicates the channel is unused.
bits : 0 - 4 (5 bit)
access : read-write


BLELL - CONN_REQ_WORD11

Bluetooth Low Energy Link Layer - - Connection request address word 11
address_offset : 0x3EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_REQ_WORD11 BLELL - CONN_REQ_WORD11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HOP_INCREMENT_2 SCA_2

HOP_INCREMENT_2 : This field is used for the data channel selection process.
bits : 0 - 4 (5 bit)
access : read-write

SCA_2 : This field defines the sleep clock accuracies given in ppm.
bits : 5 - 12 (8 bit)
access : read-write


RCB - STATUS

Radio Control Bus (RCB) controller - - RCB status register.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RCB - STATUS RCB - STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUS_BUSY

BUS_BUSY : RCB bus is busy. The bus is considered busy ('1') during an ongoing transaction.
bits : 0 - 0 (1 bit)
access : read-only


RCB - INTR

Radio Control Bus (RCB) controller - - Master interrupt request register.
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - INTR RCB - INTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCB_DONE TX_FIFO_TRIGGER TX_FIFO_NOT_FULL TX_FIFO_EMPTY TX_FIFO_OVERFLOW TX_FIFO_UNDERFLOW RX_FIFO_TRIGGER RX_FIFO_NOT_EMPTY RX_FIFO_FULL RX_FIFO_OVERFLOW RX_FIFO_UNDERFLOW

RCB_DONE : N/A
bits : 0 - 0 (1 bit)
access : read-write

TX_FIFO_TRIGGER : N/A
bits : 8 - 16 (9 bit)
access : read-write

TX_FIFO_NOT_FULL : N/A
bits : 9 - 18 (10 bit)
access : read-write

TX_FIFO_EMPTY : N/A
bits : 10 - 20 (11 bit)
access : read-write

TX_FIFO_OVERFLOW : N/A
bits : 11 - 22 (12 bit)
access : read-write

TX_FIFO_UNDERFLOW : Attempt to read from an empty TX FIFO. This happens when SCB is ready to transfer data and EMPTY is '1'. Only used in FIFO mode.
bits : 12 - 24 (13 bit)
access : read-write

RX_FIFO_TRIGGER : N/A
bits : 16 - 32 (17 bit)
access : read-write

RX_FIFO_NOT_EMPTY : N/A
bits : 17 - 34 (18 bit)
access : read-write

RX_FIFO_FULL : N/A
bits : 18 - 36 (19 bit)
access : read-write

RX_FIFO_OVERFLOW : N/A
bits : 19 - 38 (20 bit)
access : read-write

RX_FIFO_UNDERFLOW : N/A
bits : 20 - 40 (21 bit)
access : read-write


RCB - - RCBLL - CPU_WRITE_REG

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - N/A
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - CPU_WRITE_REG RCB - - RCBLL - CPU_WRITE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR WRITE_DATA

ADDR : N/A
bits : 0 - 15 (16 bit)
access : read-write

WRITE_DATA : N/A
bits : 16 - 47 (32 bit)
access : read-write


BLELL - INIT_INTERVAL

Bluetooth Low Energy Link Layer - - Initiator Interval Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - INIT_INTERVAL BLELL - INIT_INTERVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INIT_SCAN_INTERVAL

INIT_SCAN_INTERVAL : Initiator interval register. Firmware sets the initiator's scanning interval value to this regis-ter before issuing create connection command. Interval between two consecutive scanning events. Range: 0x0004 to 0x4000 Time = N * 0.625 msec Time Range: 2.5 msec to 10.24 sec. In MMMS mode, this register is used as INIT_NI_TIMER when the INIT_NI_VALID is set by firmware
bits : 0 - 15 (16 bit)
access : read-write


RCB - INTR_SET

Radio Control Bus (RCB) controller - - Master interrupt set request register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - INTR_SET RCB - INTR_SET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCB_DONE TX_FIFO_TRIGGER TX_FIFO_NOT_FULL TX_FIFO_EMPTY TX_FIFO_OVERFLOW TX_FIFO_UNDERFLOW RX_FIFO_TRIGGER RX_FIFO_NOT_EMPTY RX_FIFO_FULL RX_FIFO_OVERFLOW RX_FIFO_UNDERFLOW

RCB_DONE : Write with '1' to set corresponding bit in interrupt request register.
bits : 0 - 0 (1 bit)
access : read-write

TX_FIFO_TRIGGER : Write with '1' to set corresponding bit in interrupt request register.
bits : 8 - 16 (9 bit)
access : read-write

TX_FIFO_NOT_FULL : Write with '1' to set corresponding bit in interrupt request register.
bits : 9 - 18 (10 bit)
access : read-write

TX_FIFO_EMPTY : Write with '1' to set corresponding bit in interrupt request register.
bits : 10 - 20 (11 bit)
access : read-write

TX_FIFO_OVERFLOW : Write with '1' to set corresponding bit in interrupt request register.
bits : 11 - 22 (12 bit)
access : read-write

TX_FIFO_UNDERFLOW : Write with '1' to set corresponding bit in interrupt request register.
bits : 12 - 24 (13 bit)
access : read-write

RX_FIFO_TRIGGER : Write with '1' to set corresponding bit in interrupt request register.
bits : 16 - 32 (17 bit)
access : read-write

RX_FIFO_NOT_EMPTY : Write with '1' to set corresponding bit in interrupt request register.
bits : 17 - 34 (18 bit)
access : read-write

RX_FIFO_FULL : Write with '1' to set corresponding bit in interrupt request register.
bits : 18 - 36 (19 bit)
access : read-write

RX_FIFO_OVERFLOW : Write with '1' to set corresponding bit in interrupt request register.
bits : 19 - 38 (20 bit)
access : read-write

RX_FIFO_UNDERFLOW : Write with '1' to set corresponding bit in interrupt request register.
bits : 20 - 40 (21 bit)
access : read-write


RCB - - RCBLL - CPU_READ_REG

Radio Control Bus (RCB) controller - - Radio Control Bus (RCB) and Link Layer controller - - N/A
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - - RCBLL - CPU_READ_REG RCB - - RCBLL - CPU_READ_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR READ_DATA

ADDR : N/A
bits : 0 - 15 (16 bit)
access : read-write

READ_DATA : N/A
bits : 16 - 47 (32 bit)
access : read-only


BLELL - INIT_WINDOW

Bluetooth Low Energy Link Layer - - Initiator window Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - INIT_WINDOW BLELL - INIT_WINDOW read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INIT_SCAN_WINDOW

INIT_SCAN_WINDOW : Duration of scan in a scanning event, which should be less than or equal to scan interval value. Firmware sets the scan window value to this register before issuing create connection command. Range: 0x0004 to 0x4000 Time = N * 0.625 msec Time Range: 2.5 msec to 10.24 sec. In MMMS mode, this register is used as INIT_NI_TIMER when the INIT_NI_VALID is set by firmware
bits : 0 - 15 (16 bit)
access : read-write


BLESS - ENC_KEY[2]

Bluetooth Low Energy Subsystem Miscellaneous - - Encryption Key register 0-3
address_offset : 0x44C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - ENC_KEY[2] BLESS - ENC_KEY[2] write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENC_KEY

ENC_KEY : The encryption key / session key which is used in ECB encryption, CCM encryption and CCM decryption.
bits : 0 - 31 (32 bit)
access : write-only


RCB - INTR_MASK

Radio Control Bus (RCB) controller - - Master interrupt mask register.
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCB - INTR_MASK RCB - INTR_MASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCB_DONE TX_FIFO_TRIGGER TX_FIFO_NOT_FULL TX_FIFO_EMPTY TX_FIFO_OVERFLOW TX_FIFO_UNDERFLOW RX_FIFO_TRIGGER RX_FIFO_NOT_EMPTY RX_FIFO_FULL RX_FIFO_OVERFLOW RX_FIFO_UNDERFLOW

RCB_DONE : Mask bit for corresponding bit in interrupt request register.
bits : 0 - 0 (1 bit)
access : read-write

TX_FIFO_TRIGGER : Mask bit for corresponding bit in interrupt request register.
bits : 8 - 16 (9 bit)
access : read-write

TX_FIFO_NOT_FULL : Mask bit for corresponding bit in interrupt request register.
bits : 9 - 18 (10 bit)
access : read-write

TX_FIFO_EMPTY : Mask bit for corresponding bit in interrupt request register.
bits : 10 - 20 (11 bit)
access : read-write

TX_FIFO_OVERFLOW : Mask bit for corresponding bit in interrupt request register.
bits : 11 - 22 (12 bit)
access : read-write

TX_FIFO_UNDERFLOW : Mask bit for corresponding bit in interrupt request register.
bits : 12 - 24 (13 bit)
access : read-write

RX_FIFO_TRIGGER : Mask bit for corresponding bit in interrupt request register.
bits : 16 - 32 (17 bit)
access : read-write

RX_FIFO_NOT_EMPTY : Mask bit for corresponding bit in interrupt request register.
bits : 17 - 34 (18 bit)
access : read-write

RX_FIFO_FULL : Mask bit for corresponding bit in interrupt request register.
bits : 18 - 36 (19 bit)
access : read-write

RX_FIFO_OVERFLOW : Mask bit for corresponding bit in interrupt request register.
bits : 19 - 38 (20 bit)
access : read-write

RX_FIFO_UNDERFLOW : Mask bit for corresponding bit in interrupt request register.
bits : 20 - 40 (21 bit)
access : read-write


BLELL - INIT_PARAM

Bluetooth Low Energy Link Layer - - Initiator parameters register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - INIT_PARAM BLELL - INIT_PARAM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TX_ADDR RX_ADDR__RX_TX_ADDR INIT_FILT_POLICY INIT_RCV_IA_IN_PRIV

TX_ADDR : Device' own address type. 1 - addr type is random. 0 - addr type is public.
bits : 0 - 0 (1 bit)
access : read-write

RX_ADDR__RX_TX_ADDR : Peer address type. The rx_addr field is updated by the receiver with the address type of the received connectable advertising packet. 1 - addr type is random. 0 - addr type is public.
bits : 1 - 2 (2 bit)
access : read-write

INIT_FILT_POLICY : The Initiator_Filter_Policy is used to determine whether the White List is used or not. 0 - White list is not used to determine which advertiser to connect to. Instead the Peer_Address_Type and Peer Address fields are used to specify the address type and address of the advertising device to connect to. 1 - White list is used to determine the advertising device to connect to. Peer_Address_Type and Peer_Address fields are ignored when whitelist is used.
bits : 3 - 6 (4 bit)
access : read-write

INIT_RCV_IA_IN_PRIV : Init behavior when a peer Identity address is received in privacy mode. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set. 1 - Accept packets with peer identity address not in the Resolving list in privacy mode 0 - Reject packets with peer identity address not in the Resolving list in privacy mode & HW_RSLV_LIST_FULL is not set
bits : 4 - 8 (5 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[3]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0x4B68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[3] BLELL - RSLV_LIST_ENABLE[3] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLESS - TRIM_MXD[3]

Bluetooth Low Energy Subsystem Miscellaneous - - MXD die Trim registers
address_offset : 0x4B68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - TRIM_MXD[3] BLESS - TRIM_MXD[3] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MXD_TRIM_BITS

MXD_TRIM_BITS : MXD trim bits
bits : 0 - 7 (8 bit)
access : read-write


RCB - INTR_MASKED

Radio Control Bus (RCB) controller - - Master interrupt masked request register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RCB - INTR_MASKED RCB - INTR_MASKED read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCB_DONE TX_FIFO_TRIGGER TX_FIFO_NOT_FULL TX_FIFO_EMPTY TX_FIFO_OVERFLOW TX_FIFO_UNDERFLOW RX_FIFO_TRIGGER RX_FIFO_NOT_EMPTY RX_FIFO_FULL RX_FIFO_OVERFLOW RX_FIFO_UNDERFLOW

RCB_DONE : Logical and of corresponding request and mask bits.
bits : 0 - 0 (1 bit)
access : read-only

TX_FIFO_TRIGGER : Logical and of corresponding request and mask bits.
bits : 8 - 16 (9 bit)
access : read-only

TX_FIFO_NOT_FULL : Logical and of corresponding request and mask bits.
bits : 9 - 18 (10 bit)
access : read-only

TX_FIFO_EMPTY : Logical and of corresponding request and mask bits.
bits : 10 - 20 (11 bit)
access : read-only

TX_FIFO_OVERFLOW : Logical and of corresponding request and mask bits.
bits : 11 - 22 (12 bit)
access : read-only

TX_FIFO_UNDERFLOW : Logical and of corresponding request and mask bits.
bits : 12 - 24 (13 bit)
access : read-only

RX_FIFO_TRIGGER : Logical and of corresponding request and mask bits.
bits : 16 - 32 (17 bit)
access : read-only

RX_FIFO_NOT_EMPTY : Logical and of corresponding request and mask bits.
bits : 17 - 34 (18 bit)
access : read-only

RX_FIFO_FULL : Logical and of corresponding request and mask bits.
bits : 18 - 36 (19 bit)
access : read-only

RX_FIFO_OVERFLOW : Logical and of corresponding request and mask bits.
bits : 19 - 38 (20 bit)
access : read-only

RX_FIFO_UNDERFLOW : Logical and of corresponding request and mask bits.
bits : 20 - 40 (21 bit)
access : read-only


BLELL - INIT_INTR

Bluetooth Low Energy Link Layer - - Scan interrupt status and Clear register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - INIT_INTR BLELL - INIT_INTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INIT_INTERVAL_EXPIRE_INTR INIT_CLOSE_WINDOW_INR INIT_TX_START_INTR MASTER_CONN_CREATED ADV_RX_SELF_ADDR_UNMCH_INTR ADV_RX_PEER_ADDR_UNMCH_INTR INITA_TX_ADDR_NOT_SET_INTR INI_PEER_ADDR_MATCH_PRIV_MISMATCH_INTR INI_SELF_ADDR_MATCH_PRIV_MISMATCH_INTR

INIT_INTERVAL_EXPIRE_INTR : If this bit is set it indicates initiator scan window has started. Write to the register with this bit set to 1, clears the interrupt source.
bits : 0 - 0 (1 bit)
access : read-write

INIT_CLOSE_WINDOW_INR : If this bit is set it indicates initiator scan window has finished. Write to the register with this bit set to 1, clears the interrupt source.
bits : 1 - 2 (2 bit)
access : read-write

INIT_TX_START_INTR : If this bit is set it indicates initiator packet (CONREQ) transmission has started. Write to the register with this bit set to 1, clears the interrupt source.
bits : 2 - 4 (3 bit)
access : read-write

MASTER_CONN_CREATED : If this bit is set it indicates connection is created as master. Write to the register with this bit set to 1, clears the interrupt source.
bits : 4 - 8 (5 bit)
access : read-write

ADV_RX_SELF_ADDR_UNMCH_INTR : If this bit is set it indicates ADV_DIRECT packet received but the self device Resolvable Private Address is not resolved yet. Firmware can read the content of the packet from the INIT_SCN_ADV_RX_FIFO. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set. Write to the register with this bit set to 1, clears the interrupt source. This interrupt is generated while active/passive scanning upon receiving adv packets.
bits : 5 - 10 (6 bit)
access : read-write

ADV_RX_PEER_ADDR_UNMCH_INTR : If this bit is set it indicates ADV packet received but the peer device Address is not matched yet. Firmware can read the content of the packet from the INIT_SCN_ADV_RX_FIFO. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set. Write to the register with this bit set to 1, clears the interrupt source. This interrupt is generated while active/passive scanning upon receiving adv packets.
bits : 6 - 12 (7 bit)
access : read-write

INITA_TX_ADDR_NOT_SET_INTR : If this bit is set it indicates that a valid INITA RPA to be transmitted in CONN_REQ packet in response to an ADV packet is not present in the resolving list Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set.
bits : 7 - 14 (8 bit)
access : read-write

INI_PEER_ADDR_MATCH_PRIV_MISMATCH_INTR : If this bit is set it indicates that an Identity address is received from an initiator and matches an entry in the resolving list, but peer IRK is set and hence a corresponding RPA is expected from the initiator Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set.
bits : 8 - 16 (9 bit)
access : read-write

INI_SELF_ADDR_MATCH_PRIV_MISMATCH_INTR : If this bit is set it indicates that - an Identity address is received from an initiator and matches an entry in the resolving list, but peer IRK is set and hence a corresponding RPA is expected from the initiator - or an RPA is received from an initiator and matches an entry in the resolving list, but peer IRK is not set and hence a corresponding Identity address is expected from the initiator Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set.
bits : 9 - 18 (10 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[2]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0x5040C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[2] BLELL - MMMS_DATA_MEM_DESCRIPTOR[2] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - DATA_MEM_DESCRIPTOR[2]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 4
address_offset : 0x50C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_MEM_DESCRIPTOR[2] BLELL - DATA_MEM_DESCRIPTOR[2] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID DATA_LENGTH

LLID : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLESS - B1_DATA_REG[2]

Bluetooth Low Energy Subsystem Miscellaneous - - Programmable B1 Data register (0-3)
address_offset : 0x50C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - B1_DATA_REG[2] BLESS - B1_DATA_REG[2] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B1_DATA

B1_DATA : Programmable B1 Data register
bits : 0 - 31 (32 bit)
access : read-write


BLELL - CONN_RX_PKT_CNTR[2]

Bluetooth Low Energy Link Layer - - Packet Counter for Individual connection index
address_offset : 0x510CC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_RX_PKT_CNTR[2] BLELL - CONN_RX_PKT_CNTR[2] read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_PKT_CNT

RX_PKT_CNT : Number of packets received for the connection. Incremented when the packet is received during the connection event and decremented when firmware has processed the packet. The register field FW_PKT_RCV_CONN_INDEX should be programmed before firmware issues the packet received command
bits : 0 - 5 (6 bit)
access : read-only


BLELL - INIT_NEXT_INSTANT

Bluetooth Low Energy Link Layer - - Initiator next instant.
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - INIT_NEXT_INSTANT BLELL - INIT_NEXT_INSTANT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INIT_NEXT_INSTANT

INIT_NEXT_INSTANT : Shows the instant with respect to internal reference clock of resolution 625 us at which next initiator scanning event begins.
bits : 0 - 15 (16 bit)
access : read-only


BLESS - ENC_KEY[3]

Bluetooth Low Energy Subsystem Miscellaneous - - Encryption Key register 0-3
address_offset : 0x568 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - ENC_KEY[3] BLESS - ENC_KEY[3] write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENC_KEY

ENC_KEY : The encryption key / session key which is used in ECB encryption, CCM encryption and CCM decryption.
bits : 0 - 31 (32 bit)
access : write-only


BLELL - DEVICE_RAND_ADDR_L

Bluetooth Low Energy Link Layer - - Lower 16 bit random address of the device.
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DEVICE_RAND_ADDR_L BLELL - DEVICE_RAND_ADDR_L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEVICE_RAND_ADDR_L

DEVICE_RAND_ADDR_L : Lower 16 bit of 48-bit random address of the device.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[4]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0x5A88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[4] BLELL - RSLV_LIST_ENABLE[4] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLELL - DEVICE_RAND_ADDR_M

Bluetooth Low Energy Link Layer - - Middle 16 bit random address of the device.
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DEVICE_RAND_ADDR_M BLELL - DEVICE_RAND_ADDR_M read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEVICE_RAND_ADDR_M

DEVICE_RAND_ADDR_M : Middle 16 bit of 48-bit random address of the device.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - DEVICE_RAND_ADDR_H

Bluetooth Low Energy Link Layer - - Higher 16 bit random address of the device.
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DEVICE_RAND_ADDR_H BLELL - DEVICE_RAND_ADDR_H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEVICE_RAND_ADDR_H

DEVICE_RAND_ADDR_H : Higher 16 bit of 48-bit random address of the device.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - DDFT_CONFIG

Bluetooth Low Energy Subsystem Miscellaneous - - BLESS DDFT configuration register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - DDFT_CONFIG BLESS - DDFT_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DDFT_ENABLE BLERD_DDFT_EN DDFT_MUX_CFG1 DDFT_MUX_CFG2

DDFT_ENABLE : Enables the DDFT output from BLESS 1: DDFT is enabled 0: DDFT is disabled
bits : 0 - 0 (1 bit)
access : read-write

BLERD_DDFT_EN : Enables the DDFT inputs from CYBLERD55 chip 1: DDFT inputs are enabled 0: DDFT inputs are disabled
bits : 1 - 2 (2 bit)
access : read-write

DDFT_MUX_CFG1 : dbg_mux_pin1 selection, combine with BLERD and BLESS 5'h00 blerd_ddft_out[0] 5'h01 rcb_tx_fifo_empty 5'h02 hv_ldo_lv_detect_raw 5'h03 dbus_rx_en 5'h04 1'b0 5'h05 clk_switch_to_sysclk 5'h06 ll_clk_en_sync 5'h07 dsm_entry_stat 5'h08 proc_tx_en 5'h09 rssi_read_start 5'h0A tx_2mbps 5'h0B rcb_bus_busy 5'h0C hv_ldo_en_mt (act_stdbyb) 5'h0D ll_eco_clk_en 5'h0E blerd_reset_assert 5'h0F hv_ldo_byp_n 5'h10 hv_ldo_lv_detect_mt 5'h11 enable_ldo 5'h12 enable_ldo_dly 5'h13 bless_rcb_le_out 5'h14 bless_rcb_clk_out 5'h15 bless_dig_ldo_on_out 5'h16 bless_act_ldo_en_out 5'h17 bless_clk_en_out 5'h18 bless_buck_en_out 5'h19 bless_ret_switch_hv_out 5'h1A efuse_rw_out 5'h1B efuse_avdd_out 5'h1C efuse_config_efuse_mode 5'h1D bless_dbus_tx_en_pad 5'h1E bless_bpktctl_rd 5'h1F 1'b0
bits : 8 - 20 (13 bit)
access : read-write

DDFT_MUX_CFG2 : dbg_mux_pin2 selection, combine with BLERD and BLESS 5'h00 blerd_ddft_out[1] 5'h01 rcb_rx_fifo_empty 5'h02 ll_decode_rxdata 5'h03 dbus_tx_en 5'h04 fw_clk_en 5'h05 interrupt_ll_n 5'h06 llh_st_sm 5'h07 llh_st_dsm 5'h08 proc_rx_en 5'h09 rssi_rx_done 5'h0A rx_2mbps 5'h0B rcb_ll_ctrl 5'h0C hv_ldo_byp_n 5'h0D reset_deassert 5'h0E rcb_intr 5'h0F rcb_ll_intr 5'h10 hv_ldo_en_mt (act_stdbyb) 5'h11 hv_ldo_lv_detect_raw 5'h12 bless_rcb_data_in 5'h13 bless_xtal_en_out 5'h14 bless_isolate_n_out 5'h15 bless_reset_n_out 5'h16 bless_ret_ldo_ol_hv_out 5'h17 bless_txd_rxd_out 5'h18 tx_rx_ctrl_sel 5'h19 bless_bpktctl_cy 5'h1A efuse_cs_out 5'h1B efuse_pgm_out 5'h1C efuse_sclk_out 5'h1D hv_ldo_lv_detect_mt 5'h1E enable_ldo 5'h1F enable_ldo_dly
bits : 16 - 36 (21 bit)
access : read-write


BLESS - XTAL_CLK_DIV_CONFIG

Bluetooth Low Energy Subsystem Miscellaneous - - Crystal clock divider configuration register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - XTAL_CLK_DIV_CONFIG BLESS - XTAL_CLK_DIV_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SYSCLK_DIV LLCLK_DIV

SYSCLK_DIV : System clock pre-divider value. The 24 MHz crystal clock is divided to generate the system clock. 0: NO_DIV: SYSCLK= XTALCLK/1 1: DIV_BY_2: SYSCLK= XTALCLK/2 2: DIV_BY_4: SYSCLK= XTALCLK/4 3: DIV_BY_8: SYSCLK= XTALCLK/8
bits : 0 - 1 (2 bit)
access : read-write

LLCLK_DIV : Link Layer clock pre-divider value. The 24 MHz crystal clock is divided to generate the Link Layer clock. 0: NO_DIV: LLCLK= XTALCLK/1 1: DIV_BY_2: LLCLK= XTALCLK/2 2: DIV_BY_4: LLCLK= XTALCLK/4 3: DIV_BY_8: LLCLK= XTALCLK/8
bits : 2 - 5 (4 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[3]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0x64518 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[3] BLELL - MMMS_DATA_MEM_DESCRIPTOR[3] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - CONN_RX_PKT_CNTR[3]

Bluetooth Low Energy Link Layer - - Packet Counter for Individual connection index
address_offset : 0x65508 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_RX_PKT_CNTR[3] BLELL - CONN_RX_PKT_CNTR[3] read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_PKT_CNT

RX_PKT_CNT : Number of packets received for the connection. Incremented when the packet is received during the connection event and decremented when firmware has processed the packet. The register field FW_PKT_RCV_CONN_INDEX should be programmed before firmware issues the packet received command
bits : 0 - 5 (6 bit)
access : read-only


BLELL - DATA_MEM_DESCRIPTOR[3]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 4
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_MEM_DESCRIPTOR[3] BLELL - DATA_MEM_DESCRIPTOR[3] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID DATA_LENGTH

LLID : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLESS - B1_DATA_REG[3]

Bluetooth Low Energy Subsystem Miscellaneous - - Programmable B1 Data register (0-3)
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - B1_DATA_REG[3] BLESS - B1_DATA_REG[3] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B1_DATA

B1_DATA : Programmable B1 Data register
bits : 0 - 31 (32 bit)
access : read-write


BLELL - PEER_ADDR_L

Bluetooth Low Energy Link Layer - - Lower 16 bit address of the peer device.
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PEER_ADDR_L BLELL - PEER_ADDR_L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEER_ADDR_L

PEER_ADDR_L : Lower 16 bit of 48-bit address of the peer device.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - INTR_STAT

Bluetooth Low Energy Subsystem Miscellaneous - - Link Layer interrupt status register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - INTR_STAT BLESS - INTR_STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSM_ENTERED_INTR DSM_EXITED_INTR RCBLL_DONE_INTR BLERD_ACTIVE_INTR RCB_INTR LL_INTR GPIO_INTR EFUSE_INTR XTAL_ON_INTR ENC_INTR HVLDO_LV_DETECT_POS HVLDO_LV_DETECT_NEG

DSM_ENTERED_INTR : On a firmware request to LL to enter into state machine, working on LF clock, LL transitions into Deep Sleep Mode and asserts this interrupt. The interrupt can be cleared by writing one into this location.
bits : 0 - 0 (1 bit)
access : read-write

DSM_EXITED_INTR : On a firmware request to LL to exit from Deep Sleep Mode, working on LF clock, LL transitions from Deep Sleep Mode and asserts this interrupt when the Deep Sleep clock gater is turned ON. The interrupt can be cleared by writing one into this location.
bits : 1 - 2 (2 bit)
access : read-write

RCBLL_DONE_INTR : RCB transaction Complete
bits : 2 - 4 (3 bit)
access : read-only

BLERD_ACTIVE_INTR : CYBLERD55 is in active mode. RF is active
bits : 3 - 6 (4 bit)
access : read-write

RCB_INTR : RCB controller Interrupt - Refer to RCB_INTR_STAT register
bits : 4 - 8 (5 bit)
access : read-only

LL_INTR : LL controller interrupt - Refer to EVENT_INTR register
bits : 5 - 10 (6 bit)
access : read-only

GPIO_INTR : GPIO interrupt
bits : 6 - 12 (7 bit)
access : read-write

EFUSE_INTR : This bit when set by efuse controller logic when the efuse read/write is completed
bits : 7 - 14 (8 bit)
access : read-write

XTAL_ON_INTR : enabled crystal stable signal rising edge interrupt. The interrupt can be cleared by writing one into this location.
bits : 8 - 16 (9 bit)
access : read-write

ENC_INTR : Encryption Interrupt Triggered
bits : 9 - 18 (10 bit)
access : read-only

HVLDO_LV_DETECT_POS : This interrupt is set on HVLDO LV Detector Rise edge. There is a 1cycle AHB clock glitch filter on the HVLDO LV Detector output
bits : 10 - 20 (11 bit)
access : read-write

HVLDO_LV_DETECT_NEG : This interrupt is set on HVLDO LV Detector Fall edge. There is a 1cycle AHB clock glitch filter on the HVLDO LV Detector output
bits : 11 - 22 (12 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[5]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0x69AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[5] BLELL - RSLV_LIST_ENABLE[5] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLELL - PEER_ADDR_M

Bluetooth Low Energy Link Layer - - Middle 16 bit address of the peer device.
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PEER_ADDR_M BLELL - PEER_ADDR_M read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEER_ADDR_M

PEER_ADDR_M : Middle 16 bit of 48-bit address of the peer device.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - INTR_MASK

Bluetooth Low Energy Subsystem Miscellaneous - - Link Layer interrupt mask register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - INTR_MASK BLESS - INTR_MASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSM_EXIT DSM_ENTERED_INTR_MASK DSM_EXITED_INTR_MASK XTAL_ON_INTR_MASK RCBLL_INTR_MASK BLERD_ACTIVE_INTR_MASK RCB_INTR_MASK LL_INTR_MASK GPIO_INTR_MASK EFUSE_INTR_MASK ENC_INTR_MASK HVLDO_LV_DETECT_POS_MASK HVLDO_LV_DETECT_NEG_MASK

DSM_EXIT : When the Link Layer is in Deep Sleep Mode, firmware can set this bit to wake the Link Layer.
bits : 0 - 0 (1 bit)
access : read-write

DSM_ENTERED_INTR_MASK : Masks the DSM Entered Interrupt, when disabled.
bits : 1 - 2 (2 bit)
access : read-write

DSM_EXITED_INTR_MASK : Masks the DSM Exited Interrupt, when disabled.
bits : 2 - 4 (3 bit)
access : read-write

XTAL_ON_INTR_MASK : Masks the Crystal Stable Interrupt, when disabled.
bits : 3 - 6 (4 bit)
access : read-write

RCBLL_INTR_MASK : Mask for RCBLL interrupt
bits : 4 - 8 (5 bit)
access : read-write

BLERD_ACTIVE_INTR_MASK : Mask for CYBLERD55 Active Interrupt
bits : 5 - 10 (6 bit)
access : read-write

RCB_INTR_MASK : Mask for RCB interrupt
bits : 6 - 12 (7 bit)
access : read-write

LL_INTR_MASK : Mask for LL interrupt
bits : 7 - 14 (8 bit)
access : read-write

GPIO_INTR_MASK : Mask for GPIO interrupt
bits : 8 - 16 (9 bit)
access : read-write

EFUSE_INTR_MASK : This bit enables the efuse interrupt to firmware
bits : 9 - 18 (10 bit)
access : read-write

ENC_INTR_MASK : Mask for Encryption interrupt
bits : 10 - 20 (11 bit)
access : read-write

HVLDO_LV_DETECT_POS_MASK : Mask for HVLDO LV Detector Rise edge interrupt
bits : 11 - 22 (12 bit)
access : read-write

HVLDO_LV_DETECT_NEG_MASK : Mask for HVLDO LV Detector Fall edge interrupt
bits : 12 - 24 (13 bit)
access : read-write


BLELL - PEER_ADDR_H

Bluetooth Low Energy Link Layer - - Higher 16 bit address of the peer device.
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PEER_ADDR_H BLELL - PEER_ADDR_H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEER_ADDR_H

PEER_ADDR_H : Higher 16 bit of 48-bit address of the peer device. The peer address registers are used for multiple purposes. The register is written by firmware to provide the peer address to be used for a hardware procedure. When firmware reads the register, it reads back peer address values updated by hardware. While doing directed Advertising, the firmware writes the peer address of the device specified by the Di-rect_Address parameter of the LE_Set_Advertising_Parameters command. In non MMMS mode, While device is configured as an initiator without white list filtering, the peer address specified in the peer_address field of the create connection command is programmed into this register, which is used by hard-ware procedures. In non MMMS mode, While device is configured as an initiator and white list is enabled, firmware can read this register to get the address of the peer device from which connectable ADV packet was received and to which the connection is created. When a connection is created as a slave, the firmware can read this register to get the address of the peer de-vice to which connection is created.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - LL_CLK_EN

Bluetooth Low Energy Subsystem Miscellaneous - - Link Layer primary clock enable
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - LL_CLK_EN BLESS - LL_CLK_EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLK_EN CY_CORREL_EN MXD_IF_OPTION SEL_RCB_CLK BLESS_RESET DPSLP_HWRCB_EN

CLK_EN : Set this bit 1 to enable the clock to Link Layer.
bits : 0 - 0 (1 bit)
access : read-write

CY_CORREL_EN : If MXD_IF option is 1, this bit needs to be set to enable configuring the correlator through BLELL.DPLL_CONFIG register
bits : 1 - 2 (2 bit)
access : read-write

MXD_IF_OPTION : 1: MXD IF option 0: CYBLERD55 correlates Access Code 0: MXD IF option 1: LL correlates Access Code
bits : 2 - 4 (3 bit)
access : read-write

SEL_RCB_CLK : 0: AHB clock (clk_sys) is used as the clock for RCB access 1: LL clock (clk_eco) is used as the clock for RCB access
bits : 3 - 6 (4 bit)
access : read-write

BLESS_RESET : 0: No Soft Reset 1: Initiate Soft Reset Setting this bit will reset entire BLESS_VER3
bits : 4 - 8 (5 bit)
access : read-write

DPSLP_HWRCB_EN : Controls the DPSLP entry and exit writes to RD and controls the active domain reset and clock. 1 - LL HW controls the RD active domain reset and clock. 0 - The RD active domain reset and clock. Must be controlled by the FW
bits : 5 - 10 (6 bit)
access : read-write


BLESS - LF_CLK_CTRL

Bluetooth Low Energy Subsystem Miscellaneous - - BLESS LF clock control and BLESS revision ID indicator
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - LF_CLK_CTRL BLESS - LF_CLK_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DISABLE_LF_CLK ENABLE_ENC_CLK M0S8BLESS_REV_ID

DISABLE_LF_CLK : When set to 1, gates the LF clock input to the Link Layer. Ths is done for extended DSM mode where the DSM state machine needs to be forzen to prevent a default auto exit.
bits : 0 - 0 (1 bit)
access : read-write

ENABLE_ENC_CLK : This bit is used to enable the clock to the encryption engine 0 - Disable the clock to ENC engine 1 - Enable the clock to ENC engine
bits : 1 - 2 (2 bit)
access : read-write

M0S8BLESS_REV_ID : Indicates the m0s8bless IP revision.
bits : 29 - 60 (32 bit)
access : read-only


BLELL - WL_ADDR_TYPE

Bluetooth Low Energy Link Layer - - whitelist address type
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - WL_ADDR_TYPE BLELL - WL_ADDR_TYPE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WL_ADDR_TYPE

WL_ADDR_TYPE : 8 address type bits corresponding to the device address stored. 1 - Address type is random. 0 - Address type is public.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - EXT_PA_LNA_CTRL

Bluetooth Low Energy Subsystem Miscellaneous - - External TX PA and RX LNA control
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - EXT_PA_LNA_CTRL BLESS - EXT_PA_LNA_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE_EXT_PA_LNA CHIP_EN_POL PA_CTRL_POL LNA_CTRL_POL OUT_EN_DRIVE_VAL

ENABLE_EXT_PA_LNA : When set to 1, enables the external PA & LNA
bits : 1 - 2 (2 bit)
access : read-write

CHIP_EN_POL : Controls the polarity of the chip enable control signal 0 - High enable, low disable 1 - Low enable, High disable
bits : 2 - 4 (3 bit)
access : read-write

PA_CTRL_POL : Controls the polarity of the PA control signal 0 - High enable, low disable 1 - Low enable, High disable
bits : 3 - 6 (4 bit)
access : read-write

LNA_CTRL_POL : Controls the polarity of the LNA control signal 0 - High enable, low disable 1 - Low enable, High disable
bits : 4 - 8 (5 bit)
access : read-write

OUT_EN_DRIVE_VAL : Configures the drive value on the output enables of PA, LNA and CHI_EN signals 0 - drive 0 on the output enable signals 1 - drive 1 on the output enable signals
bits : 5 - 10 (6 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[4]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0x78628 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[4] BLELL - MMMS_DATA_MEM_DESCRIPTOR[4] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[6]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0x78D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[6] BLELL - RSLV_LIST_ENABLE[6] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLELL - CONN_RX_PKT_CNTR[4]

Bluetooth Low Energy Link Layer - - Packet Counter for Individual connection index
address_offset : 0x79948 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_RX_PKT_CNTR[4] BLELL - CONN_RX_PKT_CNTR[4] read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_PKT_CNT

RX_PKT_CNT : Number of packets received for the connection. Incremented when the packet is received during the connection event and decremented when firmware has processed the packet. The register field FW_PKT_RCV_CONN_INDEX should be programmed before firmware issues the packet received command
bits : 0 - 5 (6 bit)
access : read-only


BLELL - DATA_MEM_DESCRIPTOR[4]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 4
address_offset : 0x7A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_MEM_DESCRIPTOR[4] BLELL - DATA_MEM_DESCRIPTOR[4] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID DATA_LENGTH

LLID : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - WL_ENABLE

Bluetooth Low Energy Link Layer - - whitelist valid entry bit
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - WL_ENABLE BLELL - WL_ENABLE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WL_ENABLE

WL_ENABLE : Stores the valid entry bit corresponding to each of the eight device address stored in the whitelist. 1 - White list entry is Valid 0 - White list entry is Invalid
bits : 0 - 15 (16 bit)
access : read-write


BLELL - EVENT_INTR

Bluetooth Low Energy Link Layer - - Event(Interrupt) status and Clear register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - EVENT_INTR BLELL - EVENT_INTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_INTR SCAN_INTR INIT_INTR CONN_INTR SM_INTR DSM_INTR ENC_INTR RSSI_RX_DONE_INTR

ADV_INTR : Advertiser interrupt. If bit is set to 1, it indicates an event occurred in the advertising procedure. The source of the event needs to be read from the ADV_INTR register. This bit is cleared, when firmware clears ALL interrupts by writing to the ADV_INTR register.
bits : 0 - 0 (1 bit)
access : read-only

SCAN_INTR : Scanner interrupt. If bit is set to 1, it indicates an event occurred in the scanning procedure. The source of the event needs to be read from the SCAN_INTR register. This bit is cleared, when firmware clears ALL interrupts by writing to the SCAN_INTR register.
bits : 1 - 2 (2 bit)
access : read-only

INIT_INTR : Initiator interrupt. If bit is set to 1, it indicates an event occurred in the initiating procedure. The source of the event needs to be read from the INIT_INTR register. This bit is cleared, when firmware clears ALL interrupts by writing to the INIT_INTR register.
bits : 2 - 4 (3 bit)
access : read-only

CONN_INTR : Connection interrupt. If bit is set to 1, it indicates an event occurred in the connection operation. This interrupt is aggregation of interrupts for all the connections. The source of the event for the specific connection, needs to be read from the CONN_INTR register specific to the connection. This bit is cleared, when firmware clears ALL interrupts by writing to the CONN_INTR register.
bits : 3 - 6 (4 bit)
access : read-only

SM_INTR : Read: Sleep-mode-exit interrupt. This bit is set, when link layer hardware exits from sleep mode. Write: Clear sleep-mode-exit interrupt. Write to the register with this bit set to 1, clears the interrupt source. This interrupt is deprecated and should not be used.
bits : 4 - 8 (5 bit)
access : read-write

DSM_INTR : Read: Deep sleep mode exit interrupt. This bit is set, when link layer hardware exits from deep sleep mode. Write: Clear deep sleep mode exit interrupt. Write to the register with this bit set to 1, clears the interrupt source.
bits : 5 - 10 (6 bit)
access : read-write

ENC_INTR : Encryption module interrupt. This interrupt id deprecated and should not be used
bits : 6 - 12 (7 bit)
access : read-only

RSSI_RX_DONE_INTR : RSSI RX done interrupt.
bits : 7 - 14 (8 bit)
access : read-only


BLELL - TRANSMIT_WINDOW_OFFSET

Bluetooth Low Energy Link Layer - - Transmit window offset
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - TRANSMIT_WINDOW_OFFSET BLELL - TRANSMIT_WINDOW_OFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TX_WINDOW_OFFSET

TX_WINDOW_OFFSET : This is used to determine the first anchor point for the master transmission, from the time of connection creation. Range: This shall be a multiple of 1.25 ms in the range of 0 ms to connInterval value.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - LL_PKT_RSSI_CH_ENERGY

Bluetooth Low Energy Subsystem Miscellaneous - - Link Layer Last Received packet RSSI/Channel energy and channel number
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - LL_PKT_RSSI_CH_ENERGY BLESS - LL_PKT_RSSI_CH_ENERGY read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RSSI RX_CHANNEL PKT_RSSI_OR_CH_ENERGY

RSSI : This field captures the RSSI of the packet when a packet reception is complete or gives the Channel energy when a Receive cycle is over without packet reception.
bits : 0 - 15 (16 bit)
access : read-only

RX_CHANNEL : This field indicates the last channel for which the RSSI is captured
bits : 16 - 37 (22 bit)
access : read-only

PKT_RSSI_OR_CH_ENERGY : This field indicates if the captured RSSI is for a received packet or is the channel energy
bits : 22 - 44 (23 bit)
access : read-only


BLELL - TRANSMIT_WINDOW_SIZE

Bluetooth Low Energy Link Layer - - Transmit window size
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - TRANSMIT_WINDOW_SIZE BLELL - TRANSMIT_WINDOW_SIZE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TX_WINDOW_SIZE

TX_WINDOW_SIZE : window_size along with the window_offset is used to calculate the first connection point anchor point for the master. This shall be a multiple of 1.25 ms in the range of 1.25 ms to the lesser of 10 ms and (connInterval - 1.25 ms). Values range from 0 to 10 ms.
bits : 0 - 7 (8 bit)
access : read-write


BLESS - BT_CLOCK_CAPT

Bluetooth Low Energy Subsystem Miscellaneous - - BT clock captured on an LL DSM exit
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - BT_CLOCK_CAPT BLESS - BT_CLOCK_CAPT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BT_CLOCK

BT_CLOCK : This field captures the LF BT clock captured on an LL DSM exit. This register is valid only when MT_STATUS.LL_CLK_STATE is set. This value may be used to manage the low power entry.
bits : 0 - 15 (16 bit)
access : read-only


BLELL - DATA_CHANNELS_L0

Bluetooth Low Energy Link Layer - - Data channel map 0 (lower word)
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_CHANNELS_L0 BLELL - DATA_CHANNELS_L0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_CHANNELS_L0

DATA_CHANNELS_L0 : This register field indicates which of the data channels are in use. This stores the information for the lower 16 (15:0) data channel indices. '1' indicates the corresponding data channel is used and '0' indicates the channel is unused.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[7]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0x8800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[7] BLELL - RSLV_LIST_ENABLE[7] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLELL - DATA_CHANNELS_M0

Bluetooth Low Energy Link Layer - - Data channel map 0 (middle word)
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_CHANNELS_M0 BLELL - DATA_CHANNELS_M0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_CHANNELS_M0

DATA_CHANNELS_M0 : This register field indicates which of the data channels are in use. This stores the information for the middle 16 (32:16) data channel indices. '1' indicates the corresponding data channel is used and '0' indicates the channel is unused.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[5]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0x8C73C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[5] BLELL - MMMS_DATA_MEM_DESCRIPTOR[5] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - CONN_RX_PKT_CNTR[5]

Bluetooth Low Energy Link Layer - - Packet Counter for Individual connection index
address_offset : 0x8DD8C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_RX_PKT_CNTR[5] BLELL - CONN_RX_PKT_CNTR[5] read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_PKT_CNT

RX_PKT_CNT : Number of packets received for the connection. Incremented when the packet is received during the connection event and decremented when firmware has processed the packet. The register field FW_PKT_RCV_CONN_INDEX should be programmed before firmware issues the packet received command
bits : 0 - 5 (6 bit)
access : read-only


BLELL - DATA_CHANNELS_H0

Bluetooth Low Energy Link Layer - - Data channel map 0 (upper word)
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_CHANNELS_H0 BLELL - DATA_CHANNELS_H0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_CHANNELS_H0

DATA_CHANNELS_H0 : This register field indicates which of the data channels are in use. This stores the information for the upper 5 (36:32) data channel indices. '1' indicates the corresponding data channel is used and '0' indicates the channel is unused. Note: The Data channel map 0 and data channel map 1 are two sets of channel maps stored, common for all the connections. At any given time, only two maps can be maintained and the connections will use one of the two sets as indicated by the channel map index field in the CE_CNFG_STS registers specific to the link. Firmware must also manage to update this field along with the map.
bits : 0 - 4 (5 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[8]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0x9730 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[8] BLELL - RSLV_LIST_ENABLE[8] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLELL - DATA_CHANNELS_L1

Bluetooth Low Energy Link Layer - - Data channel map 1 (lower word)
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_CHANNELS_L1 BLELL - DATA_CHANNELS_L1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_CHANNELS_L1

DATA_CHANNELS_L1 : This register field indicates which of the data channels are in use. This stores the information for the lower 16 (15:0) data channel indices. '1' indicates the corresponding data channel is used and '0' indicates the channel is unused.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - DATA_CHANNELS_M1

Bluetooth Low Energy Link Layer - - Data channel map 1 (middle word)
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_CHANNELS_M1 BLELL - DATA_CHANNELS_M1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_CHANNELS_M1

DATA_CHANNELS_M1 : This register field indicates which of the data channels are in use. This stores the information for the middle 16 (32:16) data channel indices. '1' indicates the corresponding data channel is used and '0' indicates the channel is unused.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - DATA_CHANNELS_H1

Bluetooth Low Energy Link Layer - - Data channel map 1 (upper word)
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DATA_CHANNELS_H1 BLELL - DATA_CHANNELS_H1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_CHANNELS_H1

DATA_CHANNELS_H1 : This register field indicates which of the data channels are in use. This stores the information for the upper 5 data channel indices. '1' indicates the corresponding data channel is used and '0' indicates the channel is unused. Note: The Data channel map 0 and data channel map 1 are two sets of channel maps stored, common for all the connections. At any given time, only two maps can be maintained and the connections will use one of the two sets as indicated by the channel map index field in the CE_CNFG_STS registers specific to the link. Firmware must also manage to update this field along with the map.
bits : 0 - 4 (5 bit)
access : read-write


BLESS - MT_CFG

Bluetooth Low Energy Subsystem Miscellaneous - - MT Configuration Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - MT_CFG BLESS - MT_CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE_BLERD DEEPSLEEP_EXIT_CFG DEEPSLEEP_EXITED ACT_LDO_NOT_BUCK OVERRIDE_HVLDO_BYPASS HVLDO_BYPASS OVERRIDE_ACT_REGULATOR ACT_REGULATOR_EN OVERRIDE_DIG_REGULATOR DIG_REGULATOR_EN OVERRIDE_RET_SWITCH RET_SWITCH OVERRIDE_ISOLATE ISOLATE_N OVERRIDE_LL_CLK_EN LL_CLK_EN OVERRIDE_HVLDO_EN HVLDO_EN DPSLP_ECO_ON OVERRIDE_RESET_N RESET_N OVERRIDE_XTAL_EN XTAL_EN OVERRIDE_CLK_EN BLERD_CLK_EN OVERRIDE_RET_LDO_OL RET_LDO_OL HVLDO_POR_HV

ENABLE_BLERD : This register bit needs to be set to enable CYBLERD55 1'b1 - CYBLERD55 enabled 1'b0 - CYBLERD55 disabled On power up this bit needs to be set to make CYBLERD55 active.
bits : 0 - 0 (1 bit)
access : read-write

DEEPSLEEP_EXIT_CFG : This register bit indicates the source for PSoC DeepSleep exit to BLESS 1'b0 - act_power_good from SRSS indicates PSoC DeepSleep exit 1'b1 - MT_CFG.DEEPSLEEP_EXITED indicates PSoC DeepSleep exit
bits : 1 - 2 (2 bit)
access : read-write

DEEPSLEEP_EXITED : This register bit is used by FW to indicate that PSoC is out of DeepSleep 1'b0 - PSoC in DeepSleep 1'b1 - PSoC out of DeepSleep This bit is cleared by HW on exit from DPSLP
bits : 2 - 4 (3 bit)
access : read-write

ACT_LDO_NOT_BUCK : This register bit specifies whether the Active LDO or BUCK in CYBLERD55 is used in active mode
bits : 3 - 6 (4 bit)
access : read-write

OVERRIDE_HVLDO_BYPASS : This register should be set to override the HW generated signal to HVLDO. When set HVLDO_BYPASS is driven to the IP
bits : 4 - 8 (5 bit)
access : read-write

HVLDO_BYPASS : Override value for HVLDO BYPASS 1'b0: bypass the HVLDO 1'b1: Do not bypass the HVLDO
bits : 5 - 10 (6 bit)
access : read-write

OVERRIDE_ACT_REGULATOR : This register should be set to override the HW generated signal to enable ACTIVE_LDO/BUCK. When set ACT_REGULATOR_EN is driven to CYBLERD55
bits : 6 - 12 (7 bit)
access : read-write

ACT_REGULATOR_EN : Override value for ACT_LDO_EN/BUCK_EN
bits : 7 - 14 (8 bit)
access : read-write

OVERRIDE_DIG_REGULATOR : This register should be set to override the HW generated signal to Digital regulator of CYBLERD55. When set DIG_REGULATOR_EN is driven to CYBLERD55
bits : 8 - 16 (9 bit)
access : read-write

DIG_REGULATOR_EN : Override value for digital regulator of CYBLERD55
bits : 9 - 18 (10 bit)
access : read-write

OVERRIDE_RET_SWITCH : This register should be set to override the HW generated signal to the retention switch of CYBLERD55. When set OVERRIDE_RET_SWITCH is driven to the IP
bits : 10 - 20 (11 bit)
access : read-write

RET_SWITCH : Override value for RET_SWITCH
bits : 11 - 22 (12 bit)
access : read-write

OVERRIDE_ISOLATE : This register should be set to override the HW generated isolation signal to CYBLERD55. When set ISOLATE_N is driven to the IP
bits : 12 - 24 (13 bit)
access : read-write

ISOLATE_N : Override value for isolation to CYBLERD55
bits : 13 - 26 (14 bit)
access : read-write

OVERRIDE_LL_CLK_EN : This register should be set to override the HW generated ECO Clock gate. When set LL_CLK_EN is used to gate the clock
bits : 14 - 28 (15 bit)
access : read-write

LL_CLK_EN : Override value for LL Clock gate
bits : 15 - 30 (16 bit)
access : read-write

OVERRIDE_HVLDO_EN : This register should be set to override the HW generated enable to HVLSO. When set HVLDO_EN is used.
bits : 16 - 32 (17 bit)
access : read-write

HVLDO_EN : Overrie value for HVLDO enable 1'b1: switch to Active LDO 1'b0: switch to standby LDO
bits : 17 - 34 (18 bit)
access : read-write

DPSLP_ECO_ON : This bit when set indicates that ECO clock should be kept on even in BLESS DPSLP. This bit must be toggled only when the Link Layer is active.
bits : 18 - 36 (19 bit)
access : read-write

OVERRIDE_RESET_N : This register should be set to override the HW generated reset to CYBLERD55. When set RESET_N is used.
bits : 19 - 38 (20 bit)
access : read-write

RESET_N : Overrie value for CYBLERD55 RESET_N
bits : 20 - 40 (21 bit)
access : read-write

OVERRIDE_XTAL_EN : This register should be set to override the HW generated XTAL_EN to CYBLERD55. When set XTAL_EN is used.
bits : 21 - 42 (22 bit)
access : read-write

XTAL_EN : Overrie value for CYBLERD55 XTAL_EN
bits : 22 - 44 (23 bit)
access : read-write

OVERRIDE_CLK_EN : This register should be set to override the HW generated CLK_EN to CYBLERD55. When set CLK_EN is used.
bits : 23 - 46 (24 bit)
access : read-write

BLERD_CLK_EN : Overrie value for CYBLERD55 CLK_EN
bits : 24 - 48 (25 bit)
access : read-write

OVERRIDE_RET_LDO_OL : This register should be set to override the HW generated RET_LDO_OL_HV to CYBLERD55. When set CLK_EN is used.
bits : 25 - 50 (26 bit)
access : read-write

RET_LDO_OL : Overrie value for CYBLERD55 RET_LDO_OL_HV
bits : 26 - 52 (27 bit)
access : read-write

HVLDO_POR_HV : Reset for HVLDO 1'b1 - HVLDO Disabled 1'b0 - HVLDO Enabled
bits : 27 - 54 (28 bit)
access : read-write


BLELL - PDU_RESP_TIMER

Bluetooth Low Energy Link Layer - - PDU response timer/Generic Timer (MMMS mode)
address_offset : 0xA04 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - PDU_RESP_TIMER BLELL - PDU_RESP_TIMER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PDU_RESP_TIME_VAL

PDU_RESP_TIME_VAL : Non MMMS mode: This register is loaded with the count value to monitor the time to get a response for a PDU from peer device. Firmware starts the timer by issuing the command, RESP_TIMER_ON, after it has queued a PDU for transmission, that requires a response. If a response is received, firmware stops and clears the timer by issuing the command RESP_TIMER_OFF. If this timer expires, it results in hardware closing the connection and triggering a conn_closed interrupt. The discon_status field in the Connection status register is set with the appropriate reason. Units : Milliseconds. Resolution : 1.25 ms MMMS mode: This register is loaded with a count value, which when matched by the internal timer, triggers the GEN_TIMER_INTR. This is recommended to be used as a one shot timer and not as a periodic timer. Firmware starts the timer by loading the expiry time and issuing the command, RESP_TIMER_ON. Once the timer expiry is triggered with the interrupt GEN_TIMER_INTR, the firmware stops the timer by issuing the command RESP_TIMER_OFF. Resolution : 625 us
bits : 0 - 15 (16 bit)
access : read-write


BLELL - NEXT_RESP_TIMER_EXP

Bluetooth Low Energy Link Layer - - Next response timeout instant
address_offset : 0xA08 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - NEXT_RESP_TIMER_EXP BLELL - NEXT_RESP_TIMER_EXP read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NEXT_RESPONSE_INSTANT

NEXT_RESPONSE_INSTANT : This field defines the clock instant at which the next PDU response timeout event will occur on a connection. This is with reference to the 16-bit internal reference clock.
bits : 0 - 15 (16 bit)
access : read-only


BLELL - MMMS_DATA_MEM_DESCRIPTOR[6]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0xA0854 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[6] BLELL - MMMS_DATA_MEM_DESCRIPTOR[6] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - NEXT_SUP_TO

Bluetooth Low Energy Link Layer - - Next supervision timeout instant
address_offset : 0xA0C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - NEXT_SUP_TO BLELL - NEXT_SUP_TO read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NEXT_TIMEOUT_INSTANT

NEXT_TIMEOUT_INSTANT : This field defines the clock instant at which the next connection supervision timeout event will occur on a connection This is with reference to the 16-bit internal reference clock.
bits : 0 - 15 (16 bit)
access : read-only


BLELL - LLH_FEATURE_CONFIG

Bluetooth Low Energy Link Layer - - Feature enable
address_offset : 0xA10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - LLH_FEATURE_CONFIG BLELL - LLH_FEATURE_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 QUICK_TRANSMIT SL_DSM_EN US_COUNTER_OFFSET_ADJ

QUICK_TRANSMIT : Quick transmit feature in slave latency is enabled by setting this bit. When slave latency is enabled, this feature enables the slave to transmit in the immediate connection interval, in case required, instead of waiting till the end of slave latency
bits : 0 - 0 (1 bit)
access : read-write

SL_DSM_EN : Enable/Disable Slave Latency Period DSM.
bits : 1 - 2 (2 bit)
access : read-write

US_COUNTER_OFFSET_ADJ : Enable/Disable the connection US counter offset adjust. For non-MMMS mode, this bit must be tied to 1.
bits : 2 - 4 (3 bit)
access : read-write


BLELL - WIN_MIN_STEP_SIZE

Bluetooth Low Energy Link Layer - - Window minimum step size
address_offset : 0xA14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - WIN_MIN_STEP_SIZE BLELL - WIN_MIN_STEP_SIZE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STEPDN STEPUP WINDOW_MIN_FW

STEPDN : After receiving 2 consecutive good packets the reference window is gradually decremented by step down size until it reaches window minimum. The unit is in microseconds
bits : 0 - 3 (4 bit)
access : read-write

STEPUP : If packets are missed, the reference window is gradually increased by step up size, until it receives 2 consecutive good packets. The unit is in microseconds
bits : 4 - 11 (8 bit)
access : read-write

WINDOW_MIN_FW : Minimum window interval value programmed by firmware. While the slave receive window is decremented, the windows_min_fw sets the lowest value of the window widen value to ensure packets are not missed. The unit is in microseconds.
bits : 8 - 23 (16 bit)
access : read-write


BLELL - SLV_WIN_ADJ

Bluetooth Low Energy Link Layer - - Slave window adjustment
address_offset : 0xA18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - SLV_WIN_ADJ BLELL - SLV_WIN_ADJ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLV_WIN_ADJ

SLV_WIN_ADJ : Window Adjust value. This value is added to the calculated slave window widening value to be used as final window widen value.
bits : 0 - 10 (11 bit)
access : read-write


BLELL - SL_CONN_INTERVAL

Bluetooth Low Energy Link Layer - - Slave Latency X Conn Interval Value
address_offset : 0xA1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - SL_CONN_INTERVAL BLELL - SL_CONN_INTERVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SL_CONN_INTERVAL_VAL

SL_CONN_INTERVAL_VAL : This field defines the (SL*CI) product for the ongoing connection. This value is used in calculation of next connection instant during slave latency.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - LE_PING_TIMER_ADDR

Bluetooth Low Energy Link Layer - - LE Ping connection timer address
address_offset : 0xA20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - LE_PING_TIMER_ADDR BLELL - LE_PING_TIMER_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_PING_TIMER_ADDR

CONN_PING_TIMER_ADDR : The register used to configure the LE Au-thenticated payload Timeout (LE APTO) which is the Maximum amount of time specified between packets authenticated by a MIC. This value of ping timer is in the order of 10ms, valid range 0x1 ~ 0xFFFF
bits : 0 - 15 (16 bit)
access : read-write


BLELL - CONN_RX_PKT_CNTR[6]

Bluetooth Low Energy Link Layer - - Packet Counter for Individual connection index
address_offset : 0xA21D4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_RX_PKT_CNTR[6] BLELL - CONN_RX_PKT_CNTR[6] read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_PKT_CNT

RX_PKT_CNT : Number of packets received for the connection. Incremented when the packet is received during the connection event and decremented when firmware has processed the packet. The register field FW_PKT_RCV_CONN_INDEX should be programmed before firmware issues the packet received command
bits : 0 - 5 (6 bit)
access : read-only


BLELL - LE_PING_TIMER_OFFSET

Bluetooth Low Energy Link Layer - - LE Ping connection timer offset
address_offset : 0xA24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - LE_PING_TIMER_OFFSET BLELL - LE_PING_TIMER_OFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_PING_TIMER_OFFSET

CONN_PING_TIMER_OFFSET : The value of ping timer nearly expired offset in the order of 10ms, valid range 0x0 ~ 0xFFFF. This is the time period after which the ping timer nearly expired interrupt is generated.
bits : 0 - 15 (16 bit)
access : read-write


BLELL - LE_PING_TIMER_NEXT_EXP

Bluetooth Low Energy Link Layer - - LE Ping timer next expiry instant
address_offset : 0xA28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LE_PING_TIMER_NEXT_EXP BLELL - LE_PING_TIMER_NEXT_EXP read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_PING_TIMER_NEXT_EXP

CONN_PING_TIMER_NEXT_EXP : The value of ping timer next expiry instant in the terms of native clock value (least 16 bit value of the 17 bit ping counter). This together with CONN_PING_TIMER_NEXT_EXP_WRAP will provide the correct status of ping timer duration.
bits : 0 - 15 (16 bit)
access : read-only


BLELL - LE_PING_TIMER_WRAP_COUNT

Bluetooth Low Energy Link Layer - - LE Ping Timer wrap count
address_offset : 0xA2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - LE_PING_TIMER_WRAP_COUNT BLELL - LE_PING_TIMER_WRAP_COUNT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_SEC_CURRENT_WRAP

CONN_SEC_CURRENT_WRAP : This register holds the current position of the Ping timer.
bits : 0 - 15 (16 bit)
access : read-only


BLESS - MT_DELAY_CFG

Bluetooth Low Energy Subsystem Miscellaneous - - MT Delay configuration for state transitions
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - MT_DELAY_CFG BLESS - MT_DELAY_CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HVLDO_STARTUP_DELAY ISOLATE_DEASSERT_DELAY ACT_TO_SWITCH_DELAY HVLDO_DISABLE_DELAY

HVLDO_STARTUP_DELAY : This register specifies the startup delay for the HVLDO interms of number of LF Clock cycles. FW has to program this register based on the selected LF clock frequency
bits : 0 - 7 (8 bit)
access : read-write

ISOLATE_DEASSERT_DELAY : This register specifies the time from switching the CYBLERD55 logic to Active regulator to removal of ISOLATE_N
bits : 8 - 23 (16 bit)
access : read-write

ACT_TO_SWITCH_DELAY : This register specifies the time from assertion of ISOLATE_N to switching the CYBLERD55 logic to Retention LDO
bits : 16 - 39 (24 bit)
access : read-write

HVLDO_DISABLE_DELAY : This register specifies the time from disabling XTAL to switching of the HVLDO.
bits : 24 - 55 (32 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[9]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0xA664 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[9] BLELL - RSLV_LIST_ENABLE[9] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLELL - CONN_INTR

Bluetooth Low Energy Link Layer - - Connection interrupt status and Clear register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_INTR BLELL - CONN_INTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_CLOSED CONN_ESTB MAP_UPDT_DONE START_CE CLOSE_CE CE_TX_ACK CE_RX CON_UPDT_DONE DISCON_STATUS RX_PDU_STATUS PING_TIMER_EXPIRD_INTR PING_NEARLY_EXPIRD_INTR

CONN_CLOSED : If this bit is set it indicates that the link is disconnected. If this bit is written with 1, it clears the connection updated interrupt.
bits : 0 - 0 (1 bit)
access : read-write

CONN_ESTB : If this bit is set it indicates that the connection has been established. The bit is also set when a connection update procedure is complet-ed, at the start of the first anchor point with the updated parameters. If this bit is written with 1, it clears the connection established interrupt.
bits : 1 - 2 (2 bit)
access : read-write

MAP_UPDT_DONE : If this bit is set it indicates that the channel map update is completed at the instant specified by the firmware. If this bit is written with 1, it clears the map update done interrupt.
bits : 2 - 4 (3 bit)
access : read-write

START_CE : If this bit is set it indicates that the connection event started interrupt has happened. If this bit is written with 1, it clears the connection event started interrupt.
bits : 3 - 6 (4 bit)
access : read-write

CLOSE_CE : If this bit is set it indicates that the connection event closed interrupt has happened. If this bit is written with 1, it clears the connection event closed interrupt.
bits : 4 - 8 (5 bit)
access : read-write

CE_TX_ACK : If this bit is set it indicates that the connection event transmission acknowledgement is received for the previous non-empty packet transmitted. If this bit is written with 1, it clears the ce transmission acknowledgement interrupt.
bits : 5 - 10 (6 bit)
access : read-write

CE_RX : If this bit is set it indicates that a packet is received in the connection event. If this bit is written with 1, it clears the connection event received interrupt.
bits : 6 - 12 (7 bit)
access : read-write

CON_UPDT_DONE : This bit is set when the last connection event with previous connec-tion parameters is reached. The bit is set immediately after the re-ceive operation at the anchor point of the last connection event. If this bit is written with 1, it clears the connection updated interrupt.
bits : 7 - 14 (8 bit)
access : read-write

DISCON_STATUS : Reason for disconnect - indicates the reason the link is disconnected by hardware. 001 - connection failed to be established 010 - supervision timeout 011 - kill connection by host 100 - kill connection after ACK transmitted 101 - PDU response timer expired
bits : 8 - 18 (11 bit)
access : read-only

RX_PDU_STATUS : Status of PDU received. This information is valid along with receive interrupt. xx1 - Bad Packet (packet with CRC error) 000 - empty PDU 010 - new data (non-empty) PDU 110 - Duplicate Packet
bits : 11 - 24 (14 bit)
access : read-only

PING_TIMER_EXPIRD_INTR : If this is set, it indicates that ping timer has expired. If this bit is written with 1, it clears the interrupt.
bits : 14 - 28 (15 bit)
access : read-write

PING_NEARLY_EXPIRD_INTR : If this is set, it indicates that ping timer has nearly expired. If this bit is written with 1, it clears the interrupt.
bits : 15 - 30 (16 bit)
access : read-write


BLESS - MT_DELAY_CFG2

Bluetooth Low Energy Subsystem Miscellaneous - - MT Delay configuration for state transitions
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - MT_DELAY_CFG2 BLESS - MT_DELAY_CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OSC_STARTUP_DELAY_LF DSM_OFFSET_TO_WAKEUP_INSTANT_LF ACT_STARTUP_DELAY DIG_LDO_STARTUP_DELAY

OSC_STARTUP_DELAY_LF : This register specifies the time for OSC Startup. After this delay, clock is enabled to the link layer. Clock is enabled after OSC_STARTUP_DELAY + 1 LF clock cycles. If PSoC was in DPSLP when XTAL is enabled, then the wakeup delay will be OSC_STARTUP_DELAY + 1 + PSoC Wakeup time. Minimum value to be programmed in 1. This is equivalent to Link Layer register WAKEUP_CONFIG.OSC_STARTUP_DELAY, but is specified in LF cycles
bits : 0 - 7 (8 bit)
access : read-write

DSM_OFFSET_TO_WAKEUP_INSTANT_LF : This register specifies the pre-processing time required in Link Layer. This is esentially the time from CLK_EN (ungating clock in CYBLERD55) to the time when logic in CYBLERD55 is switched to Active mode Regulator.The delay is in terms of LF Clock cycles. FW has to program this register based on the selected LF clock frequency. This is equivalent to Link Layer register WAKEUP_CONFIG.DSM_OFFSET_TO_WAKEUP_INSTANT_LF, but is specified in LF cycles.
bits : 8 - 23 (16 bit)
access : read-write

ACT_STARTUP_DELAY : This register specifes the Active Regulator startup time in CYBLERD55. The delay is in terms of LF Clock cycles. FW has to program this register based on the selected LF clock frequency. The digital LDO will be turned on after this time elapses
bits : 16 - 39 (24 bit)
access : read-write

DIG_LDO_STARTUP_DELAY : This register specifes the Digital LDO startup time in CYBLERD55.The delay is in terms of LF Clock cycles. FW has to program this register based on the selected LF clock frequency. The logic in CYBLERD55 is switched to Active mode Regulator after this (ACT_STARTUP_DELAY + DIG_LDO_STARTUP_DELAY)
bits : 24 - 55 (32 bit)
access : read-write


BLELL - CONN_STATUS

Bluetooth Low Energy Link Layer - - Connection channel status
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_STATUS BLELL - CONN_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RECEIVE_PACKET_COUNT

RECEIVE_PACKET_COUNT : This field stores the count for the number of receive packets in the receive FIFO that are still not ready by firmware. The counter value is incremented by hardware for every good packet it stores in the FIFO. After firmware reads a packet, it decrements the counter by issuing the PACKET_RECEIVED command from the commander.
bits : 12 - 27 (16 bit)
access : read-only


BLESS - MT_DELAY_CFG3

Bluetooth Low Energy Subsystem Miscellaneous - - MT Delay configuration for state transitions
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - MT_DELAY_CFG3 BLESS - MT_DELAY_CFG3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XTAL_DISABLE_DELAY DIG_LDO_DISABLE_DELAY VDDR_STABLE_DELAY

XTAL_DISABLE_DELAY : This register specifies the time from switching of logic to Retention LDO in CYBLERD55 to XTAL Disable. This should include the post processing time The delay is in terms of LF Clock cycles. FW has to program this register based on the selected LF clock frequency. At the minimum XTAL_DISABLE_DELAY should be the sum of DIG_LDO_DISABLE_DELAY and the powerdown time of ACTIVE_LDO
bits : 0 - 7 (8 bit)
access : read-write

DIG_LDO_DISABLE_DELAY : This field holds the delay from the time of diabling Digital LDO to the time at which ACTIVE regulator is disabled
bits : 8 - 23 (16 bit)
access : read-write

VDDR_STABLE_DELAY : This field holds the delay after HVLDO Startup to VDDR Stable. Refer to memo AKK-410
bits : 16 - 39 (24 bit)
access : read-write


BLELL - CONN_INDEX

Bluetooth Low Energy Link Layer - - Connection Index register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_INDEX BLELL - CONN_INDEX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONN_INDEX

CONN_INDEX : This field is used to index the multiple connections existing. Range is 0 to maximum number of connections supported. For a single connection device, conn_index is 0.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - MT_VIO_CTRL

Bluetooth Low Energy Subsystem Miscellaneous - - MT Configuration Register to control VIO switches
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - MT_VIO_CTRL BLESS - MT_VIO_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SRSS_SWITCH_EN SRSS_SWITCH_EN_DLY

SRSS_SWITCH_EN : Enable to turn on HVLDO (One leg) 1'b0 - Switch is turned off 1'b1 - Switch is turned on
bits : 0 - 0 (1 bit)
access : read-write

SRSS_SWITCH_EN_DLY : Enable to turn on HVLDO (All legs). This must be enabled 64us after enabling SRSS_SWITCH_EN 1'b0 - Switch is turned off 1'b1 - Switch is turned on
bits : 1 - 2 (2 bit)
access : read-write


BLESS - MT_STATUS

Bluetooth Low Energy Subsystem Miscellaneous - - MT Status Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - MT_STATUS BLESS - MT_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BLESS_STATE MT_CURR_STATE HVLDO_STARTUP_CURR_STATE LL_CLK_STATE

BLESS_STATE : 1'b0 - BLESS in DPSLP state 1'b1 - BLESS in ACTIVE state
bits : 0 - 0 (1 bit)
access : read-only

MT_CURR_STATE : This register reflects the current state of the MT FSM 4'h0 - IDLE 4'h1 - BLERD_DEEPSLEEP 4'h2 - HVLDO_STARTUP 4'h3 - WAIT_CLK 4'h4 - BLERD_IDLE 4'h5 - SWITCH_EN 4'h6 - ACTIVE 4'h7 - ISOLATE 4'h8 - WAIT_IDLE 4'h9 - XTAL_DISABLE 4'hA - HVLDO_DISABLE
bits : 1 - 5 (5 bit)
access : read-only

HVLDO_STARTUP_CURR_STATE : This register reflects the current state of the HVLDO Startup FSM 3'h0 - HVLDO_OFF 3'h1 - HVLDO_WAIT 3'h2 - HVLDO_SAMPLE 3'h3 - HVLDO_ENABLED 3'h4 - HVLDO_SET_BYPASS
bits : 5 - 12 (8 bit)
access : read-only

LL_CLK_STATE : This bit indicates when the Link Layer registers are accessible upon a DSM exit. This bit should not be used after a DSM entry command has been issued. 1'b0 - Link Layer clock is not available 1'b1 - Link Layer clock is active
bits : 8 - 16 (9 bit)
access : read-only


BLELL - MMMS_DATA_MEM_DESCRIPTOR[7]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0xB4970 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[7] BLELL - MMMS_DATA_MEM_DESCRIPTOR[7] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[10]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0xB59C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[10] BLELL - RSLV_LIST_ENABLE[10] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLELL - CONN_RX_PKT_CNTR[7]

Bluetooth Low Energy Link Layer - - Packet Counter for Individual connection index
address_offset : 0xB6620 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - CONN_RX_PKT_CNTR[7] BLELL - CONN_RX_PKT_CNTR[7] read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_PKT_CNT

RX_PKT_CNT : Number of packets received for the connection. Incremented when the packet is received during the connection event and decremented when firmware has processed the packet. The register field FW_PKT_RCV_CONN_INDEX should be programmed before firmware issues the packet received command
bits : 0 - 5 (6 bit)
access : read-only


BLELL - WAKEUP_CONFIG

Bluetooth Low Energy Link Layer - - Wakeup configuration
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - WAKEUP_CONFIG BLELL - WAKEUP_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OSC_STARTUP_DELAY DSM_OFFSET_TO_WAKEUP_INSTANT

OSC_STARTUP_DELAY : Oscillator stabilization/startup delay. This is in X.Y for-mat where X is in terms of number of BT slots (625 us) and Y is in terms of number of clock periods of 16KHz clock input, required for RF oscillator to stabilize the clock output to the controller on its output pin, after oscillator is turned ON. In this period the clock is as-sumed to be unstable, and so the controller does not turn on the clock to internal logic till this period is over. This means, the wake up from deep sleep mode must account for this delay before the wakeup instant. Osc_startup_delay[7:5] is number of slots(625us) Osc_startup_delay[4:0 is number of clock periods of 16KHz clock (Warning: Min. value of Osc_startup_delay [4:0] sup-ported is 1 and Max. value is 9. Therefore programma-ble range is 1 to 9)
bits : 0 - 7 (8 bit)
access : read-write

DSM_OFFSET_TO_WAKEUP_INSTANT : Number of 'slots' before the wake up instant before which the hardware needs to exit from deep sleep mode. The slot is of 0.625ms period. This is a onetime configuration field, which is used every time hardware does an auto-wakeup before the next wakeup instant.
bits : 10 - 25 (16 bit)
access : read-write


BLESS - PWR_CTRL_SM_ST

Bluetooth Low Energy Subsystem Miscellaneous - - Link Layer Power Control FSM Status Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - PWR_CTRL_SM_ST BLESS - PWR_CTRL_SM_ST read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWR_CTRL_SM_CURR_STATE

PWR_CTRL_SM_CURR_STATE : This register reflects the current state of the LL Power Control FSM 4'h0 - IDLE 4'h1 - SLEEP 4'h2 - DEEP_SLEEP 4'h4 - WAIT_OSC_STABLE 4'h5 - INTR_GEN 4'h6 - ACTIVE 4'h7 - REQ_RF_OFF
bits : 0 - 3 (4 bit)
access : read-only


BLELL - WAKEUP_CONTROL

Bluetooth Low Energy Link Layer - - Wakeup control
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - WAKEUP_CONTROL BLELL - WAKEUP_CONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WAKEUP_INSTANT

WAKEUP_INSTANT : Instant, with reference to the internal 16-bit clock reference, at which the hardware must wakeup from deep sleep mode. This is calculated by firmware based on the next closest instant where a controller operation is required (like advertiser/scanner). Firmware reads the next instant of the procedures in the corresponding *_NEXT_INSTANT registers. This value is used only when hardware auto wakeup from deep sleep mode is enabled in the clock control register. Note: it is recommended to program wakeup_instant such a way that the actual instant to wakeup shall be at least two counts (two slots of 625 us) ahead of reference clock when entering DSM. The actual instant to wakeup is 'wakeup_instant - dsm_offset_to_wakeup_instant - osc_startup_delay, and it shall be greater than 'reference clock + 2'
bits : 0 - 15 (16 bit)
access : read-write


BLESS - HVLDO_CTRL

Bluetooth Low Energy Subsystem Miscellaneous - - HVLDO Configuration register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - HVLDO_CTRL BLESS - HVLDO_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADFT_EN ADFT_CTRL VREF_EXT_EN STATUS

ADFT_EN : ADFT enable
bits : 0 - 0 (1 bit)
access : read-write

ADFT_CTRL : ADFT select
bits : 1 - 5 (5 bit)
access : read-write

VREF_EXT_EN : Vref ext input enable.
bits : 6 - 12 (7 bit)
access : read-write

STATUS : hvldo LV detect status
bits : 31 - 62 (32 bit)
access : read-only


BLELL - CLOCK_CONFIG

Bluetooth Low Energy Link Layer - - Clock control
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - CLOCK_CONFIG BLELL - CLOCK_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_CLK_GATE_EN SCAN_CLK_GATE_EN INIT_CLK_GATE_EN CONN_CLK_GATE_EN CORECLK_GATE_EN SYSCLK_GATE_EN PHY_CLK_GATE_EN LLH_IDLE LPO_CLK_FREQ_SEL LPO_SEL_EXTERNAL SM_AUTO_WKUP_EN SM_INTR_EN DEEP_SLEEP_AUTO_WKUP_DISABLE SLEEP_MODE_EN DEEP_SLEEP_MODE_EN

ADV_CLK_GATE_EN : Advertiser block clock gate enable. 1 - enable, 0 - disable. Enables gating of clock to the advertiser module (llh_adv) in hardware. If 1, the sleep mode logic can control the clock gate to shutdown/wakeup the clock to the module. If 0, the logic has no control and clock to the module is always turned ON.
bits : 0 - 0 (1 bit)
access : read-write

SCAN_CLK_GATE_EN : Scan block clock gate enable. 1 - enable, 0 - disable. Enables gating of clock to the scanner module (llh_scan) in hardware. If 1, the sleep mode logic can control the clock gate to shutdown/wakeup the clock to the module. If 0, the logic has no control and clock to the module is always turned ON.
bits : 1 - 2 (2 bit)
access : read-write

INIT_CLK_GATE_EN : Initiator block clock gate enable. 1 - enable, 0 - disable. Enables gating of clock to the initiator module (llh_init). If 1, the sleep mode logic can control the clock gate to shutdown/wakeup the clock to the module. If 0, the logic has no control and clock to the module is always turned ON.
bits : 2 - 4 (3 bit)
access : read-write

CONN_CLK_GATE_EN : Connection block clock gate enable. 1 - enable, 0 - disable. Enables gating of clock to the connection module (llh_connch_top) in hardware. If 1, the sleep mode logic can control the clock gate to shutdown/wakeup the clock to the engine. If 0, the logic has no control and clock to the module is always turned ON.
bits : 3 - 6 (4 bit)
access : read-write

CORECLK_GATE_EN : Core clock gate enable. 1 - enable, 0 - disable. Enables gating of clock to the llh_core module in hard-ware. If 1, the sleep mode/deep sleep mode logic can control the clock gate to shutdown/wakeup the clock to the module. If 0, the logic has no control and clock is always turned ON.
bits : 4 - 8 (5 bit)
access : read-write

SYSCLK_GATE_EN : Sysclk gate enable. 1- enable, 0 - disable. Enables clock gating of system clock input to the link layer. If 1, it enables the DSM logic to control the clock gate for system clock input from pin. If 0, the DSM logic has no control and the system clock is always ON.
bits : 5 - 10 (6 bit)
access : read-write

PHY_CLK_GATE_EN : Digital PHY clock enable. 1- enable, 0-disable. Enable the Digital PHY to shutdown the clock. When 1, it indicates that controller has an upcoming activity so PHY clock must be turned ON. When 0, it indicates inactivity in the controller.
bits : 6 - 12 (7 bit)
access : read-write

LLH_IDLE : Indicates if hardware is doing any transmit/receive operation. This information is used by firmware to decide to program the hardware into deep sleep mode. 1 - LL hardware is idle. 0 - LL hardware is busy. In this case LL hardware will not enter deep sleep mode, even if firmware gives an enter DSM command. (In this situation hardware generates dsm exit interrupt to inform firmware that DSM entry was not successful).
bits : 7 - 14 (8 bit)
access : read-only

LPO_CLK_FREQ_SEL : Clock frequency select. 0 - 32KHz, 1 - 32.768KHz. Base frequency of the sleep_clk input used for generat-ing the internal reference clock of approximate 16Khz frequency.
bits : 8 - 16 (9 bit)
access : read-write

LPO_SEL_EXTERNAL : Select external sleep clock. 1 - External clock, 0 - inter-nal generated clock. The field is used to select either the low power clock in-put on sleep_clk input pin(of frequency 16.384KHz) di-rectly to run the DSM logic or to use the internal gener-ated reference clock(of 16KHz) for the same.
bits : 9 - 18 (10 bit)
access : read-write

SM_AUTO_WKUP_EN : Enable sleep mode auto wakeup enable. 1- enable, 0 - disable. Enables hardware to automatically wakeup from sleep mode at the instant = wakeup_instant - sm_offset_to_wakeup_instant. The wakeup_insant is the field in the wakeup control register described earlier. The sm_offset_to_wakeup_instant value is the field described in the wakeup configuration register.
bits : 10 - 20 (11 bit)
access : read-write

SM_INTR_EN : Enable SM exit interrupt. 1 - enable, 0 - disable. Enables hardware to generate an interrupt while exiting sleep mode - irrespective of whether it is initiated by hardware or firmware. The interrupt is captured and stored till it gets cleared. Disabling this bit mask the sleep mode exit event from hardware & firmware. This feature is not available. FW should never set this bit
bits : 12 - 24 (13 bit)
access : read-write

DEEP_SLEEP_AUTO_WKUP_DISABLE : Disable Auto Wakeup in DEEP_SLEEP mode. 1 - Disable Auto Wakeup 0 - Auto Wakeup enabled
bits : 13 - 26 (14 bit)
access : read-write

SLEEP_MODE_EN : Enable sleep mode. 1 - enable, 0 - disable. Enables hardware to control sleep mode operation. This feature is not available. FW should never set this bit
bits : 14 - 28 (15 bit)
access : read-write

DEEP_SLEEP_MODE_EN : Enable deep sleep mode. 1 - enable, 0 - disable. Enables hardware logic related to deep sleep mode to control the deep sleep mode operation. If disabled, the related logic is not executed and hardware cannot enter deep sleep mode.
bits : 15 - 30 (16 bit)
access : read-write


BLESS - MISC_EN_CTRL

Bluetooth Low Energy Subsystem Miscellaneous - - Radio Buck and Active regulator enable control
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - MISC_EN_CTRL BLESS - MISC_EN_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUCK_EN_CTRL ACT_REG_EN_CTRL LPM_DRIFT_EN LPM_DRIFT_MULTI LPM_ENTRY_CTRL_MODE

BUCK_EN_CTRL : Buck enable control. This must be programmed before enabling the Radio. 1'b1 - Buck enable output to radio is tied to 0 1'b0 - Buck enable output to radio is controlled from Mode transition FSM
bits : 0 - 0 (1 bit)
access : read-write

ACT_REG_EN_CTRL : Active regulator enable control. This must be programmed before enabling the Radio. 1'b0 - Active regulator enable output to radio is tied to 0 1'b1 - Active regulator enable output to radio is controlled from Mode transition FSM
bits : 1 - 2 (2 bit)
access : read-write

LPM_DRIFT_EN : Controls the LPM drift calculation. 1 - Enables the LPM drift mod 0 - Disables the LPM drift mod
bits : 2 - 4 (3 bit)
access : read-write

LPM_DRIFT_MULTI : Controls the LPM drift multi level compensation. 1 - Enables the LPM drift multi comp 0 - Disables the LPM drift multi comp
bits : 3 - 6 (4 bit)
access : read-write

LPM_ENTRY_CTRL_MODE : Controls the LPM entry control mode 1 - LPM can be entered in the same slot as the previous LPM exit 0 - LPM must not be entered in the same slot or the subsequent slot as the last LPM exit
bits : 4 - 8 (5 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[11]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0xC4D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[11] BLELL - RSLV_LIST_ENABLE[11] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLELL - TIM_COUNTER_L

Bluetooth Low Energy Link Layer - - Reference Clock
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - TIM_COUNTER_L BLELL - TIM_COUNTER_L read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_REF_CLOCK

TIM_REF_CLOCK : 16-bit internal reference clock. The clock is a free run-ning clock, incremented by a 0.625ms periodic pulse. It is used as a reference clock to derive all the timing required as per protocol.
bits : 0 - 15 (16 bit)
access : read-only


BLELL - MMMS_DATA_MEM_DESCRIPTOR[8]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0xC8A90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[8] BLELL - MMMS_DATA_MEM_DESCRIPTOR[8] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - WAKEUP_CONFIG_EXTD

Bluetooth Low Energy Link Layer - - Wakeup configuration extended
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - WAKEUP_CONFIG_EXTD BLELL - WAKEUP_CONFIG_EXTD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSM_LF_OFFSET

DSM_LF_OFFSET : Number of 'LF slots' before the wake up instant before which the hardware needs to exit from deep sleep mode. The LF slot is of 62.5us period. This is a onetime configuration field, which is used every time hardware does an auto-wakeup before the next wakeup instant. This is in addition to the LF slots calculated by HW window widening logic.
bits : 0 - 4 (5 bit)
access : read-write


BLESS - EFUSE_CONFIG

Bluetooth Low Energy Subsystem Miscellaneous - - EFUSE mode configuration register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - EFUSE_CONFIG BLESS - EFUSE_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EFUSE_MODE EFUSE_READ EFUSE_WRITE

EFUSE_MODE : This register enables the efuse mode in m0s8bless_ver3
bits : 0 - 0 (1 bit)
access : read-write

EFUSE_READ : This bit when set by firmware enables the read from EFUSE macro. It is cleared when the efuse read is completed
bits : 1 - 2 (2 bit)
access : read-write

EFUSE_WRITE : This bit when set by firmware enables the write to EFUSE macro. It is cleared when the efuse write is completed
bits : 2 - 4 (3 bit)
access : read-write


BLESS - EFUSE_TIM_CTRL1

Bluetooth Low Energy Subsystem Miscellaneous - - EFUSE timing control register (common for Program and Read modes)
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - EFUSE_TIM_CTRL1 BLESS - EFUSE_TIM_CTRL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCLK_HIGH SCLK_LOW CS_SCLK_SETUP_TIME CS_SCLK_HOLD_TIME RW_CS_SETUP_TIME RW_CS_HOLD_TIME

SCLK_HIGH : Decides the duration of TPGM (in Program mode) or TCKHP (in Read mode) TPGM: Burning Time TCKHP : SCLK high Period
bits : 0 - 7 (8 bit)
access : read-write

SCLK_LOW : Duration of SCLK LOW (TCLKP_R) or TCKLP_P
bits : 8 - 23 (16 bit)
access : read-write

CS_SCLK_SETUP_TIME : This register specifies the setup time between CS and SCLK (TSR_CLK)
bits : 16 - 35 (20 bit)
access : read-write

CS_SCLK_HOLD_TIME : This register specifies the hold time between CS and SCLK (THR_CLK)
bits : 20 - 43 (24 bit)
access : read-write

RW_CS_SETUP_TIME : This field decides setup time between RW & CS (TSR_RW: in read mode) or RW & AVDD (TSP_RW: in Program mode). TSR_RW: RW to CS setup time into Read mode TSP_RW: RW to AVDD setup time into program mode
bits : 24 - 51 (28 bit)
access : read-write

RW_CS_HOLD_TIME : This field decides hold time between RW & CS (THR_RW: in read mode) or RW & AVDD (THP_RW: in Program mode). THR_RW: RW to CS hold time out of Read mode THP_RW: RW to AVDD hold time out of program mode
bits : 28 - 59 (32 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[12]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0xD418 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[12] BLELL - RSLV_LIST_ENABLE[12] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLELL - POC_REG__TIM_CONTROL

Bluetooth Low Energy Link Layer - - BLE Time Control
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - POC_REG__TIM_CONTROL BLELL - POC_REG__TIM_CONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BB_CLK_FREQ_MINUS_1 START_SLOT_OFFSET

BB_CLK_FREQ_MINUS_1 : LLH clock configuration. The clock frequency of the clock input to this design is configured in this register. This is used to derive a 1MHz clock.
bits : 3 - 10 (8 bit)
access : read-write

START_SLOT_OFFSET : LLH clock configuration. The start of slot signal is offset by this value. If value is 0, the start of slot signal is generated at the 625us. The offset value is in terms of us.
bits : 8 - 19 (12 bit)
access : read-write


BLESS - EFUSE_TIM_CTRL2

Bluetooth Low Energy Subsystem Miscellaneous - - EFUSE timing control Register (for Read)
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - EFUSE_TIM_CTRL2 BLESS - EFUSE_TIM_CTRL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_SAMPLE_TIME DOUT_CS_HOLD_TIME

DATA_SAMPLE_TIME : This register specifies the time for data sampling from SCLK HIGH (TCKDQ_H)
bits : 0 - 7 (8 bit)
access : read-write

DOUT_CS_HOLD_TIME : Wait time DOUT to CS hold time out of read mode (TDQH)
bits : 8 - 19 (12 bit)
access : read-write


BLESS - EFUSE_TIM_CTRL3

Bluetooth Low Energy Subsystem Miscellaneous - - EFUSE timing control Register (for Program)
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - EFUSE_TIM_CTRL3 BLESS - EFUSE_TIM_CTRL3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PGM_SCLK_SETUP_TIME PGM_SCLK_HOLD_TIME AVDD_CS_SETUP_TIME AVDD_CS_HOLD_TIME

PGM_SCLK_SETUP_TIME : PGM to SCLK setup time (TS_PGM) PGM_SCLK_SETUP_TIME bits : 0 - 3 (4 bit)
access : read-write

PGM_SCLK_HOLD_TIME : PGM to SCLK hold time (TH_PGM)
bits : 4 - 11 (8 bit)
access : read-write

AVDD_CS_SETUP_TIME : AVDD to CS setup time into program mode (TSP_AVDD_CS)
bits : 8 - 23 (16 bit)
access : read-write

AVDD_CS_HOLD_TIME : AVDD to CS hold time out of program mode (THP_AVDD_CS)
bits : 16 - 39 (24 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[9]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0xDCBB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[9] BLELL - MMMS_DATA_MEM_DESCRIPTOR[9] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - ADV_TX_DATA_FIFO

Bluetooth Low Energy Link Layer - - Advertising data transmit FIFO. Access ADVCH_TX_FIFO.
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_TX_DATA_FIFO BLELL - ADV_TX_DATA_FIFO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_TX_DATA

ADV_TX_DATA : IO mapped FIFO of depth 16 (2 byte wide), to store ADV data of maximum length 31 bytes for transmitting. Firmware writes consecutive words by writing to the same address location. Note: ADV_TX_DATA_FIFO and ADV_SCN_RSP_TX_FIFO shares same physical FIFO of depth 32. 16 locations for each FIFO are allocated. Reading this location resets the FIFO pointer.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - EFUSE_RDATA_L

Bluetooth Low Energy Subsystem Miscellaneous - - EFUSE Lower read data
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - EFUSE_RDATA_L BLESS - EFUSE_RDATA_L read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : This register has the read value from the Efuse macro, fuse bits[31:0]
bits : 0 - 31 (32 bit)
access : read-only


BLELL - TX_EN_EXT_DELAY

Bluetooth Low Energy Link Layer - - Transmit enable extension delay
address_offset : 0xE00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - TX_EN_EXT_DELAY BLELL - TX_EN_EXT_DELAY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TXEN_EXT_DELAY RXEN_EXT_DELAY DEMOD_2M_COMP_DLY MOD_2M_COMP_DLY

TXEN_EXT_DELAY : Transmit enable extension delay. This is to extend the active state (high) of rif_tx_en signal after the last bit is sent out from LLH. The unit is in microsecond and the supported range is 00 - 31 us.
bits : 0 - 3 (4 bit)
access : read-write

RXEN_EXT_DELAY : receiver enable extension delay. This is to extend the active state (high) of dbus_rx_en signal after the last bit is received from demod. The unit is in microsecond and the supported range is 00 - 31 us.
bits : 4 - 11 (8 bit)
access : read-write

DEMOD_2M_COMP_DLY : 2Mbps demod delay delta compare to 1Mbps demod delay. This data is 2's comp data.
bits : 8 - 19 (12 bit)
access : read-write

MOD_2M_COMP_DLY : 2Mbps modulation delay delta compare to 1Mbps demod delay. This data is 2's comp data.
bits : 12 - 27 (16 bit)
access : read-write


BLELL - TX_RX_SYNTH_DELAY

Bluetooth Low Energy Link Layer - - Transmit/Receive enable delay
address_offset : 0xE04 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - TX_RX_SYNTH_DELAY BLELL - TX_RX_SYNTH_DELAY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX_EN_DELAY TX_EN_DELAY

RX_EN_DELAY : The delay used to assert rif_rx_en, Rx_tRamp micro-seconds, ahead of first bit of the expected rx_data, which can be used to turn on the Radio receiver. The value to be programmed to the Rx_en_delay [7:0] = rx_on_delay - Rx_tRamp rx_on_delay[7:0] = TX_RX_ON_DELAY[7:0]) Rx_tRamp = Radio receiver rampup time
bits : 0 - 7 (8 bit)
access : read-write

TX_EN_DELAY : The delay used to assert rif_tx_en exactly Tx_tRamp micro-seconds ahead of the first bit of the tx_data, which can be used to turn on the Radio transmitter. The value to be programmed to the Tx_en_delay [7:0] = tx_on_delay - Tx_tRamp tx_on_delay[7:0] = TX_RX_ON_DELAY[15:8]) Tx_tRamp = Radio transmitter ramp_up
bits : 8 - 23 (16 bit)
access : read-write


BLELL - EXT_PA_LNA_DLY_CNFG

Bluetooth Low Energy Link Layer - - External TX PA and RX LNA delay configuration
address_offset : 0xE08 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - EXT_PA_LNA_DLY_CNFG BLELL - EXT_PA_LNA_DLY_CNFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LNA_CTL_DELAY PA_CTL_DELAY

LNA_CTL_DELAY : The delay used to assert LNA_CTL, LNA_tRamp micro-seconds, ahead of first bit of the expected rx_data, which can be used to turn on the external Low Noise Amplifier. The value to be programmed to the lna_ctl_delay [7:0] = rx_on_delay - LNA_tRamp rx_on_delay[7:0] = TX_RX_ON_DELAY[7:0]) LNA_tRamp = External Low Noise Amplifier startup time
bits : 0 - 7 (8 bit)
access : read-write

PA_CTL_DELAY : The delay used to assert PA_CTL exactly PA_tRamp micro-seconds ahead of the first bit of the tx_data, which can be used to turn on the external power amplifier. The value to be programmed to the pa_ctl_delay [7:0] = tx_on_delay - PA_tRamp tx_on_delay[7:0] = TX_RX_ON_DELAY[15:8]) PA_tRamp = External Power Amplifier ramp time
bits : 8 - 23 (16 bit)
access : read-write


BLELL - LL_CONFIG

Bluetooth Low Energy Link Layer - - Link Layer additional configuration
address_offset : 0xE10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_CONFIG BLELL - LL_CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RSSI_SEL TX_RX_CTRL_SEL TIFS_ENABLE TIMER_LF_SLOT_ENABLE RSSI_INTR_SEL RSSI_EARLY_CNFG TX_RX_PIN_DLY TX_PA_PWR_LVL_TYPE RSSI_ENERGY_RD RSSI_EACH_PKT FORCE_TRIG_RCB_UPDATE CHECK_DUP_CONN MULTI_ENGINE_LPM ADV_DIR_DEVICE_PRIV_EN

RSSI_SEL : Controls the RSSI reads. When this bit is 1, the bit RSSI_INTR_SEL is don't care. 0 - RSSI read is initiated after the the packet is received 1 - RSSI read is completed before the packet is received. When RCB Interface is operating 4Mhz are lower this bit should be set to 1'b0.
bits : 0 - 0 (1 bit)
access : read-write

TX_RX_CTRL_SEL : Controls the mode of issueing TX_EN & RX_EN to the Radio 1 - TX_EN and RX_EN are issued through direct pins 0 - TX_EN and RX_EN are issued through RCB writes
bits : 1 - 2 (2 bit)
access : read-write

TIFS_ENABLE : Setting this bit enables the tx 1MHz pulse to match the received bpktctl from CYBLERD55. This will result is reduced TIFS variation
bits : 2 - 4 (3 bit)
access : read-write

TIMER_LF_SLOT_ENABLE : Controls the wakeup timer configuration 1 - Wakeup time is compensated with the LF_OFFSET 0 - Wakeup time is not compensated with the LF_OFFSET as in legacy mode
bits : 3 - 6 (4 bit)
access : read-write

RSSI_INTR_SEL : Controls the engine interrupt generation based on RSSI reads. This is valid only if RSSI_SEL is 0. 0 - Receive interrupts are triggerred after the RSSI read is complete 1 - Receive interrupts are triggerred after the last bit of CRC
bits : 5 - 10 (6 bit)
access : read-write

RSSI_EARLY_CNFG : Controls the early RSSI reads. This is applicable only when RSSI_SEL is 1. 1 - RSSI read is initiated during the first CRC byte reception. 0 - RSSI read is initiated during the third CRC byte reception.
bits : 6 - 12 (7 bit)
access : read-write

TX_RX_PIN_DLY : Controls the delay from DBUS_TX, DBUS_RX assertion to the assertion on the pins. This is applicable only when TX_RX_CTRL_SEL is set. 0 - The pin assertion is delayed by 4 cycles. 1 - The pin assertion is delayed by 8 cycles.
bits : 7 - 14 (8 bit)
access : read-write

TX_PA_PWR_LVL_TYPE : Controls the TX power level format given to the CYBLERD55 chip. 0 - The power level given to CYBLERD55 is in 4 bit code format from ADV_CH_TX_POWER for advertising channel and DTM packets & from CONN_CH_TX_POWER for connection channel packets. The power level setting is decoded and given to the PA. 1 - The power level given to CYBLERD55 is in 18 bit power level setting format from {ADV_CH_TX_POWER_LVL_MS, ADV_CH_TX_POWER_LVL_LS} channel and DTM packets & from {CONN_CH_TX_POWER_LVL_MS, CONN_CH_TX_POWER_LVL_LS} for connection channel packets. This setting is directly given to the PA.
bits : 8 - 16 (9 bit)
access : read-write

RSSI_ENERGY_RD : Controls the RSSI reads. 0 - Channel Energy read is not initiated if no packet is received during a receive cycle 1 - Channel Energy read is initiated at the end of the receive cycle if no packet is received
bits : 9 - 18 (10 bit)
access : read-write

RSSI_EACH_PKT : Controls the RSSI reads. 0 - RSSI read is not initiated for zero length and aborted packets 1 - RSSI read is initiated for zero length and aborted packets
bits : 10 - 20 (11 bit)
access : read-write

FORCE_TRIG_RCB_UPDATE : Controls the RCB update to radio on TX/RX enable. Applicable only when TX_RX_CTRL_SEL is 1'b1 0 - RCB update is triggerred only when the fields change on rising edge of TX/RX enable 1 - RCB update is force triggerred on rising edge of TX/RX enable If TX_RX_CTRL_SEL is 1'b1 and ENABLE_RADIO_BOD is 1'b1, this bit needs to be set to 1'b1
bits : 11 - 22 (12 bit)
access : read-write

CHECK_DUP_CONN : Controls the duplicate connection checkin ADV and INIT 0 - Does not check if the peer is already connection before a new connection is created 1 - Checks if the peer is already connection before a new connection is created and aborts a duplicate connection creation
bits : 12 - 24 (13 bit)
access : read-write

MULTI_ENGINE_LPM : Controls the LPM entry condition 0 - Legacy mode LPM entry check 1 - MMMS mode LPM entry check
bits : 13 - 26 (14 bit)
access : read-write

ADV_DIR_DEVICE_PRIV_EN : Controls the ADV behavior while advertising ADV_DIR and only device privacy is set. When the ADV is transmitting INITA RPA, the bahavior when an Identity address in received from the Initiator in the CONN_REQ is given below 0 - Abort the CONN_REQ and continue with advertisement 1 - Check the address against PEER_SEC_ADDR_ADV and create connection on a match.
bits : 14 - 28 (15 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[13]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0xE35C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[13] BLELL - RSLV_LIST_ENABLE[13] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLESS - EFUSE_RDATA_H

Bluetooth Low Energy Subsystem Miscellaneous - - EFUSE higher read data
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - EFUSE_RDATA_H BLESS - EFUSE_RDATA_H read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : This register has the read value from the Efuse macro, fuse bits[63:32]
bits : 0 - 31 (32 bit)
access : read-only


BLELL - ADV_SCN_RSP_TX_FIFO

Bluetooth Low Energy Link Layer - - Advertising scan response data transmit FIFO. Access ADVCH_TX_FIFO.
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - ADV_SCN_RSP_TX_FIFO BLELL - ADV_SCN_RSP_TX_FIFO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCAN_RSP_DATA

SCAN_RSP_DATA : IO mapped FIFO of depth 16 (2 byte wide), to store scan response data of maximum length 31 bytes for transmitting. Firmware writes consecutive words by writing to the same location. Note: ADV_TX_DATA_FIFO and ADV_SCN_RSP_TX_FIFO shares same physical FIFO of depth 32. 16 locations for each FIFO are allocated. Reading this location resets the FIFO pointer.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - EFUSE_WDATA_L

Bluetooth Low Energy Subsystem Miscellaneous - - EFUSE lower write word
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - EFUSE_WDATA_L BLESS - EFUSE_WDATA_L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : This register has the write value to the Efuse macro, fuse bits[31:0]
bits : 0 - 31 (32 bit)
access : read-write


BLESS - EFUSE_WDATA_H

Bluetooth Low Energy Subsystem Miscellaneous - - EFUSE higher write word
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - EFUSE_WDATA_H BLESS - EFUSE_WDATA_H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : This register has the write value to the Efuse macro, fuse bits[63:32]
bits : 0 - 31 (32 bit)
access : read-write


BLESS - DIV_BY_625_CFG

Bluetooth Low Energy Subsystem Miscellaneous - - Divide by 625 for FW Use
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - DIV_BY_625_CFG BLESS - DIV_BY_625_CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE DIVIDEND

ENABLE : This bit enables the divider for use by FW 1'b0 - divider used by LL 1'b1 - divider can be used by FW This divider can only be used in MMMS mode. Do not enable for legacy operation
bits : 1 - 2 (2 bit)
access : read-write

DIVIDEND : This field holds the dividend
bits : 8 - 31 (24 bit)
access : read-write


BLELL - LL_CONTROL

Bluetooth Low Energy Link Layer - - LL Backward compatibility
address_offset : 0xF00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - LL_CONTROL BLELL - LL_CONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRIV_1_2 DLE WL_READ_AS_MEM ADVCH_FIFO_PRIV_1_2_FLUSH_CTRL HW_RSLV_LIST_FULL RPT_INIT_ADDR_MATCH_PRIV_MISMATCH_ADV RPT_SCAN_ADDR_MATCH_PRIV_MISMATCH_ADV RPT_PEER_ADDR_MATCH_PRIV_MISMATCH_SCN RPT_PEER_ADDR_MATCH_PRIV_MISMATCH_INI RPT_SELF_ADDR_MATCH_PRIV_MISMATCH_INI PRIV_1_2_ADV PRIV_1_2_SCAN PRIV_1_2_INIT EN_CONN_RX_EN_MOD SLV_CONN_PEER_RPA_NOT_RSLVD ADVCH_FIFO_FLUSH

PRIV_1_2 : Enables Privacy 1.2 Feature.
bits : 0 - 0 (1 bit)
access : read-write

DLE : Enables Data Length extension feature in DTM, connection and encryption modules. This bit should always be set to 1'b1. 1'b0 is not supported.
bits : 1 - 2 (2 bit)
access : read-write

WL_READ_AS_MEM : The Whilelist read logic is controlled using this bit. 0 - The reads to the whitelist address range is treated as FIFO reads and the pointers are reset by issueing the RESET_READ_PTR command. 1 - The reads to the whitelist address range is treated an memory reads. Any whilelist entry can be read.
bits : 2 - 4 (3 bit)
access : read-write

ADVCH_FIFO_PRIV_1_2_FLUSH_CTRL : Controls the ADVCH FIFO flushing when PRIV_1_2 is enabled. 0 - Flushes all ADV & INIT packets, as in non privacy 1.2 mode, except those with unresolved peer or self RPA. 1 - Does not flush any CRC good packets
bits : 3 - 6 (4 bit)
access : read-write

HW_RSLV_LIST_FULL : This bit indicates that the resolving list in the hardware is full and the list is extended in the FW. This will affect the behavior of address resolution. 0 - The resolving list in the hardware is not fully filled. When Whitelist is disabled and a peer identity address not in the resolving list is received, the packet is responded to by the hardware. 1 - The resolving list in the hardware is fully filled. All address comparisons must be extended to the Firmware list as well, Any match in the Firmware list should be followed by copying the matching entry into the hardware resolving list.
bits : 4 - 8 (5 bit)
access : read-write

RPT_INIT_ADDR_MATCH_PRIV_MISMATCH_ADV : This bit controls the ADV engine behavior when an initiator address match occurs but a privacy mismatch occurs 0 - The packet is aborted 1 - The packet is received and reported to the Link Layer firmware
bits : 5 - 10 (6 bit)
access : read-write

RPT_SCAN_ADDR_MATCH_PRIV_MISMATCH_ADV : This bit controls the ADV engine behavior when a scanner address match occurs but a privacy mismatch occurs 0 - The packet is aborted 1 - The packet is received and reported to the Link Layer firmware
bits : 6 - 12 (7 bit)
access : read-write

RPT_PEER_ADDR_MATCH_PRIV_MISMATCH_SCN : This bit controls the SCAN engine behavior when an peer address match occurs but a privacy mismatch occurs 0 - The packet is aborted 1 - The packet is received and reported to the Link Layer firmware
bits : 7 - 14 (8 bit)
access : read-write

RPT_PEER_ADDR_MATCH_PRIV_MISMATCH_INI : This bit controls the INIT engine behavior when an peer address match occurs but a privacy mismatch occurs 0 - The packet is aborted 1 - The packet is received and reported to the Link Layer firmware
bits : 8 - 16 (9 bit)
access : read-write

RPT_SELF_ADDR_MATCH_PRIV_MISMATCH_INI : This bit controls the INIT engine behavior when a self address match occurs but a privacy mismatch occurs 0 - The packet is aborted 1 - The packet is received and reported to the Link Layer firmware
bits : 9 - 18 (10 bit)
access : read-write

PRIV_1_2_ADV : Enables Privacy 1.2 for ADV engine
bits : 10 - 20 (11 bit)
access : read-write

PRIV_1_2_SCAN : Enables Privacy 1.2 for SCAN engine
bits : 11 - 22 (12 bit)
access : read-write

PRIV_1_2_INIT : Enables Privacy 1.2 for INIT engine
bits : 12 - 24 (13 bit)
access : read-write

EN_CONN_RX_EN_MOD : This bit controls the Connection RX enable modification mode when SLV_CONN_PEER_RPA_NOT_RSLVD is set. 1'b0 - The Connection RX enable is unmodified 1'b1 - The Connection RX enable is during the Peer INIT RPA unresolved state is modified, until it is resolved.
bits : 13 - 26 (14 bit)
access : read-write

SLV_CONN_PEER_RPA_NOT_RSLVD : This bit is asserted when SLV_CONN_PEER_RPA_UNMCH_INTR is set. The device does not enter into Connection established state until this bit is cleared after the RPA is resoved by the firmware. If the firmware is not able to resolve the RPA within the supervision timeout, the device aborts the connection establishement and this bit is cleared by the hardware. This bit is valid only if PRIV_1_2 is set.
bits : 14 - 28 (15 bit)
access : read-write

ADVCH_FIFO_FLUSH : When set, flushes the ADVCH FIFO. The bit is auto cleared. Note that this should be used only when the FIFO is not read by the firmware. If firmware has started reading the FIFO, then the FIFO must be emptied exclusively by firmware reads
bits : 15 - 30 (16 bit)
access : write-only


BLESS - TRIM_LDO_0

Bluetooth Low Energy Subsystem Miscellaneous - - LDO Trim register 0
address_offset : 0xF00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - TRIM_LDO_0 BLESS - TRIM_LDO_0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACT_LDO_VREG ACT_LDO_ITAIL

ACT_LDO_VREG : To trim the regulated voltage in steps of 25mV typically
bits : 0 - 3 (4 bit)
access : read-write

ACT_LDO_ITAIL : To trim the bias currents for all the active mode blocks
bits : 4 - 11 (8 bit)
access : read-write


BLELL - DEV_PA_ADDR_L

Bluetooth Low Energy Link Layer - - Device Resolvable/Non-Resolvable Private address lower register
address_offset : 0xF04 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DEV_PA_ADDR_L BLELL - DEV_PA_ADDR_L read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEV_PA_ADDR_L

DEV_PA_ADDR_L : Lower 16 bit of 48-bit Random Private address of the device.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - TRIM_LDO_1

Bluetooth Low Energy Subsystem Miscellaneous - - LDO Trim register 1
address_offset : 0xF04 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - TRIM_LDO_1 BLESS - TRIM_LDO_1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACT_REF_BGR SB_BGRES

ACT_REF_BGR : To trim active regulator reference voltage
bits : 0 - 3 (4 bit)
access : read-write

SB_BGRES : To trim standby regulator reference voltage
bits : 4 - 11 (8 bit)
access : read-write


BLELL - DEV_PA_ADDR_M

Bluetooth Low Energy Link Layer - - Device Resolvable/Non-Resolvable Private address middle register
address_offset : 0xF08 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DEV_PA_ADDR_M BLELL - DEV_PA_ADDR_M read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEV_PA_ADDR_M

DEV_PA_ADDR_M : Middle 16 bit of 48-bit Random Private address of the device.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - TRIM_LDO_2

Bluetooth Low Energy Subsystem Miscellaneous - - LDO Trim register 2
address_offset : 0xF08 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - TRIM_LDO_2 BLESS - TRIM_LDO_2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SB_BMULT_RES SB_BMULT_NBIAS

SB_BMULT_RES : To trim standby regulator beta-multiplier current
bits : 0 - 4 (5 bit)
access : read-write

SB_BMULT_NBIAS : To trim standby regulator beta-multiplier current
bits : 5 - 11 (7 bit)
access : read-write


BLELL - DEV_PA_ADDR_H

Bluetooth Low Energy Link Layer - - Device Resolvable/Non-Resolvable Private address higher register
address_offset : 0xF0C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - DEV_PA_ADDR_H BLELL - DEV_PA_ADDR_H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEV_PA_ADDR_H

DEV_PA_ADDR_H : Higher 16 bit of 48-bit Random Private address of the device.
bits : 0 - 15 (16 bit)
access : read-write


BLESS - TRIM_LDO_3

Bluetooth Low Energy Subsystem Miscellaneous - - LDO Trim register 3
address_offset : 0xF0C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - TRIM_LDO_3 BLESS - TRIM_LDO_3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LVDET SLOPE_SB_BMULT

LVDET : To trim the trip points of the LV-Detect block
bits : 0 - 4 (5 bit)
access : read-write

SLOPE_SB_BMULT : To trim standby regulator beta-multiplier temp-co slope
bits : 5 - 11 (7 bit)
access : read-write


BLELL - MMMS_DATA_MEM_DESCRIPTOR[10]

Bluetooth Low Energy Link Layer - - Data buffer descriptor 0 to 15
address_offset : 0xF0CDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - MMMS_DATA_MEM_DESCRIPTOR[10] BLELL - MMMS_DATA_MEM_DESCRIPTOR[10] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LLID_C1 DATA_LENGTH_C1

LLID_C1 : N/A
bits : 0 - 1 (2 bit)
access : read-write

DATA_LENGTH_C1 : This field indicates the length of the data packet. Bits [9:7] are valid only if DLE is set. Range 0x00 to 0xFF.
bits : 2 - 11 (10 bit)
access : read-write


BLELL - RSLV_LIST_ENABLE[14]

Bluetooth Low Energy Link Layer - - Resolving list entry control bit
address_offset : 0xF2A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - RSLV_LIST_ENABLE[14] BLELL - RSLV_LIST_ENABLE[14] read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALID_ENTRY PEER_ADDR_IRK_SET SELF_ADDR_IRK_SET_RX WHITELISTED_PEER PEER_ADDR_TYPE PEER_ADDR_RPA_VAL SELF_ADDR_RXD_RPA_VAL SELF_ADDR_TX_RPA_VAL SELF_ADDR_INIT_RPA_SEL SELF_ADDR_TYPE_TX ENTRY_CONNECTED

VALID_ENTRY : Indicates if the index is valid
bits : 0 - 0 (1 bit)
access : read-write

PEER_ADDR_IRK_SET : Indicates if the listed peer device has shared its IRK. 0 - Identity address in a received packet is accepted. If a valid peer device RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the peer device RPA, if available in the list, in a received packet is accepted. An Identity address in the received packet is reported as a privacy mismatch.
bits : 1 - 2 (2 bit)
access : read-write

SELF_ADDR_IRK_SET_RX : Indicates if the local IRK has been shared with the listed peer device 0 - Self Identity address in a received packet is accepted. If a valid self RPA is available in the list, then the RPA in a received packet is accepted. 1 - Only the self device RPA, if available in the list, in a received packet is accepted. A Self Identity address in the received packet is reported as a privacy mismatch.
bits : 2 - 4 (3 bit)
access : read-write

WHITELISTED_PEER : Indicates if the listed peer device is in the whitelist
bits : 3 - 6 (4 bit)
access : read-write

PEER_ADDR_TYPE : Indicates the address type of the listed peer device
bits : 4 - 8 (5 bit)
access : read-write

PEER_ADDR_RPA_VAL : Indicates that the peer device RPA in the list is valid
bits : 5 - 10 (6 bit)
access : read-write

SELF_ADDR_RXD_RPA_VAL : Indicates that the received self RPA in the list is valid
bits : 6 - 12 (7 bit)
access : read-write

SELF_ADDR_TX_RPA_VAL : Indicates that the self RPA in the list to be transmitted is valid
bits : 7 - 14 (8 bit)
access : read-write

SELF_ADDR_INIT_RPA_SEL : When Initiator whitelist is disabled, this bit indicates the specific device to from which ADV packets will be accepted.
bits : 8 - 16 (9 bit)
access : read-write

SELF_ADDR_TYPE_TX : Indicates the TX addr type to be used for SCANA and INITA 0 - Self Identity address is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets 1 - Self RPA address provided in RSLV_LIST_TX_INIT_RPA field in the resolving list with the associated valid bit in SELF_ADDR_TX_RPA_VAL above is used in SCANA/INITA in SCAN_REQ/CONN_REQ packets
bits : 9 - 18 (10 bit)
access : read-write

ENTRY_CONNECTED : Indicates if the entry is already in connection with our device
bits : 10 - 20 (11 bit)
access : read-write


BLESS - TRIM_LDO_4

Bluetooth Low Energy Subsystem Miscellaneous - - LDO Trim register 4
address_offset : 0xF30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - TRIM_LDO_4 BLESS - TRIM_LDO_4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T_LDO

T_LDO : To debug post layout or post silicon
bits : 0 - 7 (8 bit)
access : read-write


BLESS - TRIM_LDO_5

Bluetooth Low Energy Subsystem Miscellaneous - - LDO Trim register 5
address_offset : 0xF34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLESS - TRIM_LDO_5 BLESS - TRIM_LDO_5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RSVD

RSVD : N/A
bits : 0 - 7 (8 bit)
access : read-write


BLESS - DIV_BY_625_STS

Bluetooth Low Energy Subsystem Miscellaneous - - Output of divide by 625 divider
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLESS - DIV_BY_625_STS BLESS - DIV_BY_625_STS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 QUOTIENT REMAINDER

QUOTIENT : Quotient value from the divider. Available 1 cycle after dividend is programmed.
bits : 0 - 5 (6 bit)
access : read-only

REMAINDER : Remainder value from the divider. Available 1 cycle after dividend is programmed.
bits : 8 - 25 (18 bit)
access : read-only


BLELL - INIT_SCN_ADV_RX_FIFO

Bluetooth Low Energy Link Layer - - advertising scan response data receive data FIFO. Access ADVRX_FIFO.
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BLELL - INIT_SCN_ADV_RX_FIFO BLELL - INIT_SCN_ADV_RX_FIFO read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADV_SCAN_RSP_RX_DATA

ADV_SCAN_RSP_RX_DATA : IO mapped FIFO of depth 64, to store ADV and SCAN_RSP header and payload received by the scanner. The RSSI value at the time of reception of this packet is also stored. Firmware reads from the same address to read out consecutive words of data. Note: The 16 bit header is first loaded to the advertise channel data receive FIFO followed by the payload data and then 16 bit RSSI.
bits : 0 - 15 (16 bit)
access : read-only


BLELL - WL_CONNECTION_STATUS

Bluetooth Low Energy Link Layer - - whitelist valid entry bit
address_offset : 0xFA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLELL - WL_CONNECTION_STATUS BLELL - WL_CONNECTION_STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WL_ENTRY_CONNECTED

WL_ENTRY_CONNECTED : Stores the connection status of each of the sixteen device address stored in the whitelist. 1 - White list entry is already in a connection 0 - White list entry is not in a connection
bits : 0 - 15 (16 bit)
access : read-write



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