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NVIC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xE04 byte (0x0)
mem_usage : registers
protection : not protected

Registers

NVICISER0

NVICISPR0

NVICISPR1

NVICISPR2

NVICISPR3

NVICICPR0

NVICICPR1

NVICICPR2

NVICICPR3

NVICIABR0

NVICIABR1

NVICIABR2

NVICIABR3

NVICIP0

NVICIP1

NVICIP2

NVICIP3

NVICIP4

NVICIP5

NVICIP6

NVICIP7

NVICIP8

NVICIP9

NVICIP10

NVICIP11

NVICIP12

NVICIP13

NVICIP14

NVICIP15

NVICIP16

NVICIP17

NVICIP18

NVICIP19

NVICIP20

NVICIP21

NVICIP22

NVICIP23

NVICIP24

NVICIP25

NVICIP26

NVICIP27

NVICIP28

NVICIP29

NVICIP30

NVICIP31

NVICIP32

NVICIP33

NVICIP34

NVICIP35

NVICIP36

NVICIP37

NVICIP38

NVICIP39

NVICIP40

NVICIP41

NVICIP42

NVICIP43

NVICIP44

NVICIP45

NVICIP46

NVICIP47

NVICIP48

NVICIP49

NVICIP50

NVICIP51

NVICIP52

NVICIP53

NVICIP54

NVICIP55

NVICIP56

NVICIP57

NVICIP58

NVICIP59

NVICIP60

NVICIP61

NVICIP62

NVICIP63

NVICIP64

NVICIP65

NVICIP66

NVICIP67

NVICIP68

NVICIP69

NVICIP70

NVICIP71

NVICIP72

NVICIP73

NVICIP74

NVICIP75

NVICIP76

NVICIP77

NVICIP78

NVICIP79

NVICIP80

NVICIP81

NVICIP82

NVICIP83

NVICIP84

NVICIP85

NVICIP86

NVICIP87

NVICIP88

NVICIP89

NVICIP90

NVICIP91

NVICIP92

NVICIP93

NVICIP94

NVICIP95

NVICIP96

NVICIP97

NVICIP98

NVICIP99

NVICIP100

NVICIP101

NVICIP102

NVICIP103

NVICIP104

NVICIP105

NVICISER1

NVICISER2

NVICICER0

NVICICER1

NVICICER2

NVICICER3

NVICISER3

NVICSTIR


NVICISER0

Interrupt Set Enable Register n
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICISER0 NVICISER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETENA

SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
access : read-write


NVICISPR0

Interrupt Set Pending Register n
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICISPR0 NVICISPR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETPEND

SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
access : read-write


NVICISPR1

Interrupt Set Pending Register n
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICISPR1 NVICISPR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETPEND

SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
access : read-write


NVICISPR2

Interrupt Set Pending Register n
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICISPR2 NVICISPR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETPEND

SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
access : read-write


NVICISPR3

Interrupt Set Pending Register n
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICISPR3 NVICISPR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETPEND

SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
access : read-write


NVICICPR0

Interrupt Clear Pending Register n
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICICPR0 NVICICPR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRPEND

CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
access : read-write


NVICICPR1

Interrupt Clear Pending Register n
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICICPR1 NVICICPR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRPEND

CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
access : read-write


NVICICPR2

Interrupt Clear Pending Register n
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICICPR2 NVICICPR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRPEND

CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
access : read-write


NVICICPR3

Interrupt Clear Pending Register n
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICICPR3 NVICICPR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRPEND

CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
access : read-write


NVICIABR0

Interrupt Active bit Register n
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIABR0 NVICIABR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACTIVE

ACTIVE : Interrupt active flags
bits : 0 - 31 (32 bit)
access : read-write


NVICIABR1

Interrupt Active bit Register n
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIABR1 NVICIABR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACTIVE

ACTIVE : Interrupt active flags
bits : 0 - 31 (32 bit)
access : read-write


NVICIABR2

Interrupt Active bit Register n
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIABR2 NVICIABR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACTIVE

ACTIVE : Interrupt active flags
bits : 0 - 31 (32 bit)
access : read-write


NVICIABR3

Interrupt Active bit Register n
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIABR3 NVICIABR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACTIVE

ACTIVE : Interrupt active flags
bits : 0 - 31 (32 bit)
access : read-write


NVICIP0

Interrupt Priority Register n
address_offset : 0x300 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP0 NVICIP0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI0

PRI0 : Priority of interrupt 0
bits : 0 - 7 (8 bit)
access : read-write


NVICIP1

Interrupt Priority Register n
address_offset : 0x301 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP1 NVICIP1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI1

PRI1 : Priority of interrupt 1
bits : 0 - 7 (8 bit)
access : read-write


NVICIP2

Interrupt Priority Register n
address_offset : 0x302 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP2 NVICIP2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI2

PRI2 : Priority of interrupt 2
bits : 0 - 7 (8 bit)
access : read-write


NVICIP3

Interrupt Priority Register n
address_offset : 0x303 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP3 NVICIP3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI3

PRI3 : Priority of interrupt 3
bits : 0 - 7 (8 bit)
access : read-write


NVICIP4

Interrupt Priority Register n
address_offset : 0x304 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP4 NVICIP4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI4

PRI4 : Priority of interrupt 4
bits : 0 - 7 (8 bit)
access : read-write


NVICIP5

Interrupt Priority Register n
address_offset : 0x305 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP5 NVICIP5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI5

PRI5 : Priority of interrupt 5
bits : 0 - 7 (8 bit)
access : read-write


NVICIP6

Interrupt Priority Register n
address_offset : 0x306 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP6 NVICIP6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI6

PRI6 : Priority of interrupt 6
bits : 0 - 7 (8 bit)
access : read-write


NVICIP7

Interrupt Priority Register n
address_offset : 0x307 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP7 NVICIP7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI7

PRI7 : Priority of interrupt 7
bits : 0 - 7 (8 bit)
access : read-write


NVICIP8

Interrupt Priority Register n
address_offset : 0x308 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP8 NVICIP8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI8

PRI8 : Priority of interrupt 8
bits : 0 - 7 (8 bit)
access : read-write


NVICIP9

Interrupt Priority Register n
address_offset : 0x309 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP9 NVICIP9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI9

PRI9 : Priority of interrupt 9
bits : 0 - 7 (8 bit)
access : read-write


NVICIP10

Interrupt Priority Register n
address_offset : 0x30A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP10 NVICIP10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI10

PRI10 : Priority of interrupt 10
bits : 0 - 7 (8 bit)
access : read-write


NVICIP11

Interrupt Priority Register n
address_offset : 0x30B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP11 NVICIP11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI11

PRI11 : Priority of interrupt 11
bits : 0 - 7 (8 bit)
access : read-write


NVICIP12

Interrupt Priority Register n
address_offset : 0x30C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP12 NVICIP12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI12

PRI12 : Priority of interrupt 12
bits : 0 - 7 (8 bit)
access : read-write


NVICIP13

Interrupt Priority Register n
address_offset : 0x30D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP13 NVICIP13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI13

PRI13 : Priority of interrupt 13
bits : 0 - 7 (8 bit)
access : read-write


NVICIP14

Interrupt Priority Register n
address_offset : 0x30E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP14 NVICIP14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI14

PRI14 : Priority of interrupt 14
bits : 0 - 7 (8 bit)
access : read-write


NVICIP15

Interrupt Priority Register n
address_offset : 0x30F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP15 NVICIP15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI15

PRI15 : Priority of interrupt 15
bits : 0 - 7 (8 bit)
access : read-write


NVICIP16

Interrupt Priority Register n
address_offset : 0x310 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP16 NVICIP16 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI16

PRI16 : Priority of interrupt 16
bits : 0 - 7 (8 bit)
access : read-write


NVICIP17

Interrupt Priority Register n
address_offset : 0x311 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP17 NVICIP17 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI17

PRI17 : Priority of interrupt 17
bits : 0 - 7 (8 bit)
access : read-write


NVICIP18

Interrupt Priority Register n
address_offset : 0x312 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP18 NVICIP18 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI18

PRI18 : Priority of interrupt 18
bits : 0 - 7 (8 bit)
access : read-write


NVICIP19

Interrupt Priority Register n
address_offset : 0x313 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP19 NVICIP19 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI19

PRI19 : Priority of interrupt 19
bits : 0 - 7 (8 bit)
access : read-write


NVICIP20

Interrupt Priority Register n
address_offset : 0x314 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP20 NVICIP20 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI20

PRI20 : Priority of interrupt 20
bits : 0 - 7 (8 bit)
access : read-write


NVICIP21

Interrupt Priority Register n
address_offset : 0x315 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP21 NVICIP21 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI21

PRI21 : Priority of interrupt 21
bits : 0 - 7 (8 bit)
access : read-write


NVICIP22

Interrupt Priority Register n
address_offset : 0x316 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP22 NVICIP22 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI22

PRI22 : Priority of interrupt 22
bits : 0 - 7 (8 bit)
access : read-write


NVICIP23

Interrupt Priority Register n
address_offset : 0x317 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP23 NVICIP23 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI23

PRI23 : Priority of interrupt 23
bits : 0 - 7 (8 bit)
access : read-write


NVICIP24

Interrupt Priority Register n
address_offset : 0x318 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP24 NVICIP24 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI24

PRI24 : Priority of interrupt 24
bits : 0 - 7 (8 bit)
access : read-write


NVICIP25

Interrupt Priority Register n
address_offset : 0x319 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP25 NVICIP25 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI25

PRI25 : Priority of interrupt 25
bits : 0 - 7 (8 bit)
access : read-write


NVICIP26

Interrupt Priority Register n
address_offset : 0x31A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP26 NVICIP26 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI26

PRI26 : Priority of interrupt 26
bits : 0 - 7 (8 bit)
access : read-write


NVICIP27

Interrupt Priority Register n
address_offset : 0x31B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP27 NVICIP27 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI27

PRI27 : Priority of interrupt 27
bits : 0 - 7 (8 bit)
access : read-write


NVICIP28

Interrupt Priority Register n
address_offset : 0x31C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP28 NVICIP28 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI28

PRI28 : Priority of interrupt 28
bits : 0 - 7 (8 bit)
access : read-write


NVICIP29

Interrupt Priority Register n
address_offset : 0x31D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP29 NVICIP29 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI29

PRI29 : Priority of interrupt 29
bits : 0 - 7 (8 bit)
access : read-write


NVICIP30

Interrupt Priority Register n
address_offset : 0x31E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP30 NVICIP30 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI30

PRI30 : Priority of interrupt 30
bits : 0 - 7 (8 bit)
access : read-write


NVICIP31

Interrupt Priority Register n
address_offset : 0x31F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP31 NVICIP31 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI31

PRI31 : Priority of interrupt 31
bits : 0 - 7 (8 bit)
access : read-write


NVICIP32

Interrupt Priority Register n
address_offset : 0x320 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP32 NVICIP32 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI32

PRI32 : Priority of interrupt 32
bits : 0 - 7 (8 bit)
access : read-write


NVICIP33

Interrupt Priority Register n
address_offset : 0x321 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP33 NVICIP33 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI33

PRI33 : Priority of interrupt 33
bits : 0 - 7 (8 bit)
access : read-write


NVICIP34

Interrupt Priority Register n
address_offset : 0x322 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP34 NVICIP34 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI34

PRI34 : Priority of interrupt 34
bits : 0 - 7 (8 bit)
access : read-write


NVICIP35

Interrupt Priority Register n
address_offset : 0x323 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP35 NVICIP35 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI35

PRI35 : Priority of interrupt 35
bits : 0 - 7 (8 bit)
access : read-write


NVICIP36

Interrupt Priority Register n
address_offset : 0x324 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP36 NVICIP36 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI36

PRI36 : Priority of interrupt 36
bits : 0 - 7 (8 bit)
access : read-write


NVICIP37

Interrupt Priority Register n
address_offset : 0x325 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP37 NVICIP37 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI37

PRI37 : Priority of interrupt 37
bits : 0 - 7 (8 bit)
access : read-write


NVICIP38

Interrupt Priority Register n
address_offset : 0x326 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP38 NVICIP38 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI38

PRI38 : Priority of interrupt 38
bits : 0 - 7 (8 bit)
access : read-write


NVICIP39

Interrupt Priority Register n
address_offset : 0x327 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP39 NVICIP39 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI39

PRI39 : Priority of interrupt 39
bits : 0 - 7 (8 bit)
access : read-write


NVICIP40

Interrupt Priority Register n
address_offset : 0x328 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP40 NVICIP40 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI40

PRI40 : Priority of interrupt 40
bits : 0 - 7 (8 bit)
access : read-write


NVICIP41

Interrupt Priority Register n
address_offset : 0x329 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP41 NVICIP41 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI41

PRI41 : Priority of interrupt 41
bits : 0 - 7 (8 bit)
access : read-write


NVICIP42

Interrupt Priority Register n
address_offset : 0x32A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP42 NVICIP42 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI42

PRI42 : Priority of interrupt 42
bits : 0 - 7 (8 bit)
access : read-write


NVICIP43

Interrupt Priority Register n
address_offset : 0x32B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP43 NVICIP43 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI43

PRI43 : Priority of interrupt 43
bits : 0 - 7 (8 bit)
access : read-write


NVICIP44

Interrupt Priority Register n
address_offset : 0x32C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP44 NVICIP44 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI44

PRI44 : Priority of interrupt 44
bits : 0 - 7 (8 bit)
access : read-write


NVICIP45

Interrupt Priority Register n
address_offset : 0x32D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP45 NVICIP45 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI45

PRI45 : Priority of interrupt 45
bits : 0 - 7 (8 bit)
access : read-write


NVICIP46

Interrupt Priority Register n
address_offset : 0x32E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP46 NVICIP46 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI46

PRI46 : Priority of interrupt 46
bits : 0 - 7 (8 bit)
access : read-write


NVICIP47

Interrupt Priority Register n
address_offset : 0x32F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP47 NVICIP47 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI47

PRI47 : Priority of interrupt 47
bits : 0 - 7 (8 bit)
access : read-write


NVICIP48

Interrupt Priority Register n
address_offset : 0x330 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP48 NVICIP48 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI48

PRI48 : Priority of interrupt 48
bits : 0 - 7 (8 bit)
access : read-write


NVICIP49

Interrupt Priority Register n
address_offset : 0x331 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP49 NVICIP49 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI49

PRI49 : Priority of interrupt 49
bits : 0 - 7 (8 bit)
access : read-write


NVICIP50

Interrupt Priority Register n
address_offset : 0x332 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP50 NVICIP50 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI50

PRI50 : Priority of interrupt 50
bits : 0 - 7 (8 bit)
access : read-write


NVICIP51

Interrupt Priority Register n
address_offset : 0x333 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP51 NVICIP51 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI51

PRI51 : Priority of interrupt 51
bits : 0 - 7 (8 bit)
access : read-write


NVICIP52

Interrupt Priority Register n
address_offset : 0x334 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP52 NVICIP52 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI52

PRI52 : Priority of interrupt 52
bits : 0 - 7 (8 bit)
access : read-write


NVICIP53

Interrupt Priority Register n
address_offset : 0x335 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP53 NVICIP53 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI53

PRI53 : Priority of interrupt 53
bits : 0 - 7 (8 bit)
access : read-write


NVICIP54

Interrupt Priority Register n
address_offset : 0x336 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP54 NVICIP54 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI54

PRI54 : Priority of interrupt 54
bits : 0 - 7 (8 bit)
access : read-write


NVICIP55

Interrupt Priority Register n
address_offset : 0x337 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP55 NVICIP55 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI55

PRI55 : Priority of interrupt 55
bits : 0 - 7 (8 bit)
access : read-write


NVICIP56

Interrupt Priority Register n
address_offset : 0x338 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP56 NVICIP56 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI56

PRI56 : Priority of interrupt 56
bits : 0 - 7 (8 bit)
access : read-write


NVICIP57

Interrupt Priority Register n
address_offset : 0x339 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP57 NVICIP57 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI57

PRI57 : Priority of interrupt 57
bits : 0 - 7 (8 bit)
access : read-write


NVICIP58

Interrupt Priority Register n
address_offset : 0x33A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP58 NVICIP58 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI58

PRI58 : Priority of interrupt 58
bits : 0 - 7 (8 bit)
access : read-write


NVICIP59

Interrupt Priority Register n
address_offset : 0x33B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP59 NVICIP59 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI59

PRI59 : Priority of interrupt 59
bits : 0 - 7 (8 bit)
access : read-write


NVICIP60

Interrupt Priority Register n
address_offset : 0x33C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP60 NVICIP60 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI60

PRI60 : Priority of interrupt 60
bits : 0 - 7 (8 bit)
access : read-write


NVICIP61

Interrupt Priority Register n
address_offset : 0x33D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP61 NVICIP61 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI61

PRI61 : Priority of interrupt 61
bits : 0 - 7 (8 bit)
access : read-write


NVICIP62

Interrupt Priority Register n
address_offset : 0x33E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP62 NVICIP62 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI62

PRI62 : Priority of interrupt 62
bits : 0 - 7 (8 bit)
access : read-write


NVICIP63

Interrupt Priority Register n
address_offset : 0x33F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP63 NVICIP63 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI63

PRI63 : Priority of interrupt 63
bits : 0 - 7 (8 bit)
access : read-write


NVICIP64

Interrupt Priority Register n
address_offset : 0x340 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP64 NVICIP64 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI64

PRI64 : Priority of interrupt 64
bits : 0 - 7 (8 bit)
access : read-write


NVICIP65

Interrupt Priority Register n
address_offset : 0x341 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP65 NVICIP65 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI65

PRI65 : Priority of interrupt 65
bits : 0 - 7 (8 bit)
access : read-write


NVICIP66

Interrupt Priority Register n
address_offset : 0x342 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP66 NVICIP66 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI66

PRI66 : Priority of interrupt 66
bits : 0 - 7 (8 bit)
access : read-write


NVICIP67

Interrupt Priority Register n
address_offset : 0x343 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP67 NVICIP67 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI67

PRI67 : Priority of interrupt 67
bits : 0 - 7 (8 bit)
access : read-write


NVICIP68

Interrupt Priority Register n
address_offset : 0x344 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP68 NVICIP68 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI68

PRI68 : Priority of interrupt 68
bits : 0 - 7 (8 bit)
access : read-write


NVICIP69

Interrupt Priority Register n
address_offset : 0x345 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP69 NVICIP69 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI69

PRI69 : Priority of interrupt 69
bits : 0 - 7 (8 bit)
access : read-write


NVICIP70

Interrupt Priority Register n
address_offset : 0x346 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP70 NVICIP70 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI70

PRI70 : Priority of interrupt 70
bits : 0 - 7 (8 bit)
access : read-write


NVICIP71

Interrupt Priority Register n
address_offset : 0x347 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP71 NVICIP71 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI71

PRI71 : Priority of interrupt 71
bits : 0 - 7 (8 bit)
access : read-write


NVICIP72

Interrupt Priority Register n
address_offset : 0x348 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP72 NVICIP72 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI72

PRI72 : Priority of interrupt 72
bits : 0 - 7 (8 bit)
access : read-write


NVICIP73

Interrupt Priority Register n
address_offset : 0x349 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP73 NVICIP73 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI73

PRI73 : Priority of interrupt 73
bits : 0 - 7 (8 bit)
access : read-write


NVICIP74

Interrupt Priority Register n
address_offset : 0x34A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP74 NVICIP74 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI74

PRI74 : Priority of interrupt 74
bits : 0 - 7 (8 bit)
access : read-write


NVICIP75

Interrupt Priority Register n
address_offset : 0x34B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP75 NVICIP75 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI75

PRI75 : Priority of interrupt 75
bits : 0 - 7 (8 bit)
access : read-write


NVICIP76

Interrupt Priority Register n
address_offset : 0x34C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP76 NVICIP76 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI76

PRI76 : Priority of interrupt 76
bits : 0 - 7 (8 bit)
access : read-write


NVICIP77

Interrupt Priority Register n
address_offset : 0x34D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP77 NVICIP77 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI77

PRI77 : Priority of interrupt 77
bits : 0 - 7 (8 bit)
access : read-write


NVICIP78

Interrupt Priority Register n
address_offset : 0x34E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP78 NVICIP78 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI78

PRI78 : Priority of interrupt 78
bits : 0 - 7 (8 bit)
access : read-write


NVICIP79

Interrupt Priority Register n
address_offset : 0x34F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP79 NVICIP79 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI79

PRI79 : Priority of interrupt 79
bits : 0 - 7 (8 bit)
access : read-write


NVICIP80

Interrupt Priority Register n
address_offset : 0x350 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP80 NVICIP80 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI80

PRI80 : Priority of interrupt 80
bits : 0 - 7 (8 bit)
access : read-write


NVICIP81

Interrupt Priority Register n
address_offset : 0x351 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP81 NVICIP81 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI81

PRI81 : Priority of interrupt 81
bits : 0 - 7 (8 bit)
access : read-write


NVICIP82

Interrupt Priority Register n
address_offset : 0x352 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP82 NVICIP82 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI82

PRI82 : Priority of interrupt 82
bits : 0 - 7 (8 bit)
access : read-write


NVICIP83

Interrupt Priority Register n
address_offset : 0x353 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP83 NVICIP83 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI83

PRI83 : Priority of interrupt 83
bits : 0 - 7 (8 bit)
access : read-write


NVICIP84

Interrupt Priority Register n
address_offset : 0x354 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP84 NVICIP84 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI84

PRI84 : Priority of interrupt 84
bits : 0 - 7 (8 bit)
access : read-write


NVICIP85

Interrupt Priority Register n
address_offset : 0x355 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP85 NVICIP85 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI85

PRI85 : Priority of interrupt 85
bits : 0 - 7 (8 bit)
access : read-write


NVICIP86

Interrupt Priority Register n
address_offset : 0x356 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP86 NVICIP86 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI86

PRI86 : Priority of interrupt 86
bits : 0 - 7 (8 bit)
access : read-write


NVICIP87

Interrupt Priority Register n
address_offset : 0x357 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP87 NVICIP87 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI87

PRI87 : Priority of interrupt 87
bits : 0 - 7 (8 bit)
access : read-write


NVICIP88

Interrupt Priority Register n
address_offset : 0x358 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP88 NVICIP88 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI88

PRI88 : Priority of interrupt 88
bits : 0 - 7 (8 bit)
access : read-write


NVICIP89

Interrupt Priority Register n
address_offset : 0x359 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP89 NVICIP89 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI89

PRI89 : Priority of interrupt 89
bits : 0 - 7 (8 bit)
access : read-write


NVICIP90

Interrupt Priority Register n
address_offset : 0x35A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP90 NVICIP90 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI90

PRI90 : Priority of interrupt 90
bits : 0 - 7 (8 bit)
access : read-write


NVICIP91

Interrupt Priority Register n
address_offset : 0x35B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP91 NVICIP91 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI91

PRI91 : Priority of interrupt 91
bits : 0 - 7 (8 bit)
access : read-write


NVICIP92

Interrupt Priority Register n
address_offset : 0x35C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP92 NVICIP92 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI92

PRI92 : Priority of interrupt 92
bits : 0 - 7 (8 bit)
access : read-write


NVICIP93

Interrupt Priority Register n
address_offset : 0x35D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP93 NVICIP93 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI93

PRI93 : Priority of interrupt 93
bits : 0 - 7 (8 bit)
access : read-write


NVICIP94

Interrupt Priority Register n
address_offset : 0x35E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP94 NVICIP94 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI94

PRI94 : Priority of interrupt 94
bits : 0 - 7 (8 bit)
access : read-write


NVICIP95

Interrupt Priority Register n
address_offset : 0x35F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP95 NVICIP95 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI95

PRI95 : Priority of interrupt 95
bits : 0 - 7 (8 bit)
access : read-write


NVICIP96

Interrupt Priority Register n
address_offset : 0x360 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP96 NVICIP96 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI96

PRI96 : Priority of interrupt 96
bits : 0 - 7 (8 bit)
access : read-write


NVICIP97

Interrupt Priority Register n
address_offset : 0x361 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP97 NVICIP97 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI97

PRI97 : Priority of interrupt 97
bits : 0 - 7 (8 bit)
access : read-write


NVICIP98

Interrupt Priority Register n
address_offset : 0x362 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP98 NVICIP98 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI98

PRI98 : Priority of interrupt 98
bits : 0 - 7 (8 bit)
access : read-write


NVICIP99

Interrupt Priority Register n
address_offset : 0x363 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP99 NVICIP99 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI99

PRI99 : Priority of interrupt 99
bits : 0 - 7 (8 bit)
access : read-write


NVICIP100

Interrupt Priority Register n
address_offset : 0x364 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP100 NVICIP100 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI100

PRI100 : Priority of interrupt 100
bits : 0 - 7 (8 bit)
access : read-write


NVICIP101

Interrupt Priority Register n
address_offset : 0x365 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP101 NVICIP101 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI101

PRI101 : Priority of interrupt 101
bits : 0 - 7 (8 bit)
access : read-write


NVICIP102

Interrupt Priority Register n
address_offset : 0x366 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP102 NVICIP102 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI102

PRI102 : Priority of interrupt 102
bits : 0 - 7 (8 bit)
access : read-write


NVICIP103

Interrupt Priority Register n
address_offset : 0x367 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP103 NVICIP103 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI103

PRI103 : Priority of interrupt 103
bits : 0 - 7 (8 bit)
access : read-write


NVICIP104

Interrupt Priority Register n
address_offset : 0x368 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP104 NVICIP104 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI104

PRI104 : Priority of interrupt 104
bits : 0 - 7 (8 bit)
access : read-write


NVICIP105

Interrupt Priority Register n
address_offset : 0x369 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICIP105 NVICIP105 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PRI105

PRI105 : Priority of interrupt 105
bits : 0 - 7 (8 bit)
access : read-write


NVICISER1

Interrupt Set Enable Register n
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICISER1 NVICISER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETENA

SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
access : read-write


NVICISER2

Interrupt Set Enable Register n
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICISER2 NVICISER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETENA

SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
access : read-write


NVICICER0

Interrupt Clear Enable Register n
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICICER0 NVICICER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRENA

CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
access : read-write


NVICICER1

Interrupt Clear Enable Register n
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICICER1 NVICICER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRENA

CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
access : read-write


NVICICER2

Interrupt Clear Enable Register n
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICICER2 NVICICER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRENA

CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
access : read-write


NVICICER3

Interrupt Clear Enable Register n
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICICER3 NVICICER3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRENA

CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
access : read-write


NVICISER3

Interrupt Set Enable Register n
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICISER3 NVICISER3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETENA

SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
access : read-write


NVICSTIR

Software Trigger Interrupt Register
address_offset : 0xE00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVICSTIR NVICSTIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTID RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED

INTID : Interrupt ID of the interrupt to trigger, in the range 0-239. For example, a value of 0x03 specifies interrupt IRQ3.
bits : 0 - 8 (9 bit)
access : read-write

RESERVED : no description available
bits : 10 - 10 (1 bit)
access : read-write

RESERVED : no description available
bits : 11 - 11 (1 bit)
access : read-write

RESERVED : no description available
bits : 12 - 12 (1 bit)
access : read-write

RESERVED : no description available
bits : 13 - 13 (1 bit)
access : read-write

RESERVED : no description available
bits : 14 - 14 (1 bit)
access : read-write

RESERVED : no description available
bits : 15 - 15 (1 bit)
access : read-write

RESERVED : no description available
bits : 16 - 16 (1 bit)
access : read-write

RESERVED : no description available
bits : 17 - 17 (1 bit)
access : read-write

RESERVED : no description available
bits : 18 - 18 (1 bit)
access : read-write

RESERVED : no description available
bits : 19 - 19 (1 bit)
access : read-write

RESERVED : no description available
bits : 20 - 20 (1 bit)
access : read-write

RESERVED : no description available
bits : 21 - 21 (1 bit)
access : read-write

RESERVED : no description available
bits : 22 - 22 (1 bit)
access : read-write

RESERVED : no description available
bits : 23 - 23 (1 bit)
access : read-write

RESERVED : no description available
bits : 24 - 24 (1 bit)
access : read-write

RESERVED : no description available
bits : 25 - 25 (1 bit)
access : read-write

RESERVED : no description available
bits : 26 - 26 (1 bit)
access : read-write

RESERVED : no description available
bits : 27 - 27 (1 bit)
access : read-write

RESERVED : no description available
bits : 28 - 28 (1 bit)
access : read-write

RESERVED : no description available
bits : 29 - 29 (1 bit)
access : read-write

RESERVED : no description available
bits : 30 - 30 (1 bit)
access : read-write

RESERVED : no description available
bits : 30 - 30 (1 bit)
access : read-write

RESERVED : no description available
bits : 31 - 31 (1 bit)
access : read-write



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