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CAN

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x8C0 byte (0x0)
mem_usage : registers
protection : not protected

Registers

MCR

RXMGMASK

CS8

ID8

WORD08

WORD18

CS9

RXIMR0

ID9

WORD09

WORD19

CS10

ID10

WORD010

WORD110

CS11

ID11

WORD011

WORD111

RX14MASK

CS12

ID12

WORD012

WORD112

CS13

ID13

WORD013

WORD113

CS14

ID14

WORD014

WORD114

CS15

ID15

WORD015

WORD115

RX15MASK

RXIMR1

ECR

ESR1

RXIMR2

IMASK2

IMASK1

RXIMR3

IFLAG2

IFLAG1

RXIMR4

CTRL2

ESR2

RXIMR5

CTRL1

CRCR

RXIMR6

RXFGMASK

RXFIR

RXIMR7

RXIMR8

RXIMR9

RXIMR10

RXIMR11

RXIMR12

TIMER

CS0

RXIMR13

ID0

WORD00

RXIMR14

WORD10

CS1

RXIMR15

ID1

WORD01

WORD11

CS2

ID2

WORD02

WORD12

CS3

ID3

WORD03

WORD13

CS4

ID4

WORD04

WORD14

CS5

ID5

WORD05

WORD15

CS6

ID6

WORD06

WORD16

CS7

ID7

WORD07

WORD17


MCR

Module Configuration Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCR MCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MAXMB IDAM AEN LPRIOEN IRMQ SRXDIS DOZE LPMACK WRNEN SLFWAK SUPV FRZACK SOFTRST WAKMSK NOTRDY HALT RFEN FRZ MDIS

MAXMB : Number of the Last Message Buffer
bits : 0 - 6 (7 bit)
access : read-write

IDAM : ID Acceptance Mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

#00 : 00

Format A: One full ID (standard and extended) per ID Filter Table element.

#01 : 01

Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element.

#10 : 10

Format C: Four partial 8-bit Standard IDs per ID Filter Table element.

#11 : 11

Format D: All frames rejected.

End of enumeration elements list.

AEN : Abort Enable
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#0 : 0

Abort disabled

#1 : 1

Abort enabled

End of enumeration elements list.

LPRIOEN : Local Priority Enable
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

#0 : 0

Local Priority disabled

#1 : 1

Local Priority enabled

End of enumeration elements list.

IRMQ : Individual Rx Masking and Queue Enable
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

Individual Rx masking and queue feature are disabled. For backward compatibility, the reading of C/S word locks the MB even if it is EMPTY.

#1 : 1

Individual Rx masking and queue feature are enabled.

End of enumeration elements list.

SRXDIS : Self Reception Disable
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

#0 : 0

Self reception enabled

#1 : 1

Self reception disabled

End of enumeration elements list.

DOZE : Doze Mode Enable
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

#0 : 0

FlexCAN is not enabled to enter low power mode when Doze Mode is requested.

#1 : 1

FlexCAN is enabled to enter low power mode when Doze Mode is requested.

End of enumeration elements list.

LPMACK : Low Power Mode Acknowledge
bits : 20 - 20 (1 bit)
access : read-only

Enumeration:

#0 : 0

FlexCAN is not in a low power mode.

#1 : 1

FlexCAN is in a low power mode.

End of enumeration elements list.

WRNEN : Warning Interrupt Enable
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

#0 : 0

TWRNINT and RWRNINT bits are zero, independent of the values in the error counters.

#1 : 1

TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96.

End of enumeration elements list.

SLFWAK : Self Wake Up
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

#0 : 0

FlexCAN Self Wake Up feature is disabled.

#1 : 1

FlexCAN Self Wake Up feature is enabled.

End of enumeration elements list.

SUPV : Supervisor Mode
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

#0 : 0

FlexCAN is in User Mode. Affected registers allow both Supervisor and Unrestricted accesses.

#1 : 1

FlexCAN is in Supervisor Mode. Affected registers allow only Supervisor access. Unrestricted access behaves as though the access was done to an unimplemented register location.

End of enumeration elements list.

FRZACK : Freeze Mode Acknowledge
bits : 24 - 24 (1 bit)
access : read-only

Enumeration:

#0 : 0

FlexCAN not in Freeze Mode, prescaler running

#1 : 1

FlexCAN in Freeze Mode, prescaler stopped

End of enumeration elements list.

SOFTRST : Soft Reset
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

#0 : 0

No reset request

#1 : 1

Resets the registers affected by soft reset.

End of enumeration elements list.

WAKMSK : Wake Up Interrupt Mask
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

#0 : 0

Wake Up Interrupt is disabled.

#1 : 1

Wake Up Interrupt is enabled.

End of enumeration elements list.

NOTRDY : FlexCAN Not Ready
bits : 27 - 27 (1 bit)
access : read-only

Enumeration:

#0 : 0

FlexCAN module is either in Normal Mode, Listen-Only Mode or Loop-Back Mode.

#1 : 1

FlexCAN module is either in Disable Mode, Doze Mode , Stop Mode or Freeze Mode.

End of enumeration elements list.

HALT : Halt FlexCAN
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

#0 : 0

No Freeze Mode request.

#1 : 1

Enters Freeze Mode if the FRZ bit is asserted.

End of enumeration elements list.

RFEN : Rx FIFO Enable
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

#0 : 0

Rx FIFO not enabled

#1 : 1

Rx FIFO enabled

End of enumeration elements list.

FRZ : Freeze Enable
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

#0 : 0

Not enabled to enter Freeze Mode

#1 : 1

Enabled to enter Freeze Mode

End of enumeration elements list.

MDIS : Module Disable
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

Enable the FlexCAN module.

#1 : 1

Disable the FlexCAN module.

End of enumeration elements list.


RXMGMASK

Rx Mailboxes Global Mask Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMGMASK RXMGMASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MG

MG : Rx Mailboxes Global Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


CS8

Message Buffer 8 CS Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS8 CS8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID8

Message Buffer 8 ID Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID8 ID8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD08

Message Buffer 8 WORD0 Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD08 WORD08 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD18

Message Buffer 8 WORD1 Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD18 WORD18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS9

Message Buffer 9 CS Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS9 CS9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


RXIMR0

Rx Individual Mask Registers
address_offset : 0x1100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR0 RXIMR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


ID9

Message Buffer 9 ID Register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID9 ID9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD09

Message Buffer 9 WORD0 Register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD09 WORD09 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD19

Message Buffer 9 WORD1 Register
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD19 WORD19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS10

Message Buffer 10 CS Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS10 CS10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID10

Message Buffer 10 ID Register
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID10 ID10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD010

Message Buffer 10 WORD0 Register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD010 WORD010 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD110

Message Buffer 10 WORD1 Register
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD110 WORD110 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS11

Message Buffer 11 CS Register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS11 CS11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID11

Message Buffer 11 ID Register
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID11 ID11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD011

Message Buffer 11 WORD0 Register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD011 WORD011 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD111

Message Buffer 11 WORD1 Register
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD111 WORD111 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


RX14MASK

Rx 14 Mask Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RX14MASK RX14MASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX14M

RX14M : Rx Buffer 14 Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


CS12

Message Buffer 12 CS Register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS12 CS12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID12

Message Buffer 12 ID Register
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID12 ID12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD012

Message Buffer 12 WORD0 Register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD012 WORD012 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD112

Message Buffer 12 WORD1 Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD112 WORD112 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS13

Message Buffer 13 CS Register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS13 CS13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID13

Message Buffer 13 ID Register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID13 ID13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD013

Message Buffer 13 WORD0 Register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD013 WORD013 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD113

Message Buffer 13 WORD1 Register
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD113 WORD113 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS14

Message Buffer 14 CS Register
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS14 CS14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID14

Message Buffer 14 ID Register
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID14 ID14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD014

Message Buffer 14 WORD0 Register
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD014 WORD014 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD114

Message Buffer 14 WORD1 Register
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD114 WORD114 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS15

Message Buffer 15 CS Register
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS15 CS15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID15

Message Buffer 15 ID Register
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID15 ID15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD015

Message Buffer 15 WORD0 Register
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD015 WORD015 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD115

Message Buffer 15 WORD1 Register
address_offset : 0x17C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD115 WORD115 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


RX15MASK

Rx 15 Mask Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RX15MASK RX15MASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RX15M

RX15M : Rx Buffer 15 Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


RXIMR1

Rx Individual Mask Registers
address_offset : 0x1984 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR1 RXIMR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


ECR

Error Counter
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ECR ECR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TXERRCNT RXERRCNT

TXERRCNT : Transmit Error Counter
bits : 0 - 7 (8 bit)
access : read-write

RXERRCNT : Receive Error Counter
bits : 8 - 15 (8 bit)
access : read-write


ESR1

Error and Status 1 Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESR1 ESR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WAKINT ERRINT BOFFINT RX FLTCONF TX IDLE RXWRN TXWRN STFERR FRMERR CRCERR ACKERR BIT0ERR BIT1ERR RWRNINT TWRNINT SYNCH

WAKINT : Wake-Up Interrupt
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

No such occurrence

#1 : 1

Indicates a recessive to dominant transition was received on the CAN bus

End of enumeration elements list.

ERRINT : Error Interrupt
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

No such occurrence

#1 : 1

Indicates setting of any Error Bit in the Error and Status Register

End of enumeration elements list.

BOFFINT : 'Bus Off' Interrupt
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

No such occurrence

#1 : 1

FlexCAN module entered 'Bus Off' state

End of enumeration elements list.

RX : FlexCAN in Reception
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

#0 : 0

FlexCAN is not receiving a message.

#1 : 1

FlexCAN is receiving a message.

End of enumeration elements list.

FLTCONF : Fault Confinement State
bits : 4 - 5 (2 bit)
access : read-only

Enumeration:

#00 : 00

Error Active

#01 : 01

Error Passive

#1x : 1x

Bus Off

End of enumeration elements list.

TX : FlexCAN in Transmission
bits : 6 - 6 (1 bit)
access : read-only

Enumeration:

#0 : 0

FlexCAN is not transmitting a message.

#1 : 1

FlexCAN is transmitting a message.

End of enumeration elements list.

IDLE : no description available
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

No such occurrence

#1 : 1

CAN bus is now IDLE.

End of enumeration elements list.

RXWRN : Rx Error Warning
bits : 8 - 8 (1 bit)
access : read-only

Enumeration:

#0 : 0

No such occurrence

#1 : 1

RXERRCNT is greater than or equal to 96.

End of enumeration elements list.

TXWRN : TX Error Warning
bits : 9 - 9 (1 bit)
access : read-only

Enumeration:

#0 : 0

No such occurrence

#1 : 1

TXERRCNT is greater than or equal to 96.

End of enumeration elements list.

STFERR : Stuffing Error
bits : 10 - 10 (1 bit)
access : read-only

Enumeration:

#0 : 0

No such occurrence

#1 : 1

A Stuffing Error occurred since last read of this register.

End of enumeration elements list.

FRMERR : Form Error
bits : 11 - 11 (1 bit)
access : read-only

Enumeration:

#0 : 0

No such occurrence

#1 : 1

A Form Error occurred since last read of this register.

End of enumeration elements list.

CRCERR : Cyclic Redundancy Check Error
bits : 12 - 12 (1 bit)
access : read-only

Enumeration:

#0 : 0

No such occurrence

#1 : 1

A CRC error occurred since last read of this register.

End of enumeration elements list.

ACKERR : Acknowledge Error
bits : 13 - 13 (1 bit)
access : read-only

Enumeration:

#0 : 0

No such occurrence

#1 : 1

An ACK error occurred since last read of this register.

End of enumeration elements list.

BIT0ERR : Bit0 Error
bits : 14 - 14 (1 bit)
access : read-only

Enumeration:

#0 : 0

No such occurrence

#1 : 1

At least one bit sent as dominant is received as recessive.

End of enumeration elements list.

BIT1ERR : Bit1 Error
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

#0 : 0

No such occurrence

#1 : 1

At least one bit sent as recessive is received as dominant.

End of enumeration elements list.

RWRNINT : Rx Warning Interrupt Flag
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

No such occurrence

#1 : 1

The Rx error counter transitioned from less than 96 to greater than or equal to 96.

End of enumeration elements list.

TWRNINT : Tx Warning Interrupt Flag
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

#0 : 0

No such occurrence

#1 : 1

The Tx error counter transitioned from less than 96 to greater than or equal to 96.

End of enumeration elements list.

SYNCH : CAN Synchronization Status
bits : 18 - 18 (1 bit)
access : read-only

Enumeration:

#0 : 0

FlexCAN is not synchronized to the CAN bus.

#1 : 1

FlexCAN is synchronized to the CAN bus.

End of enumeration elements list.


RXIMR2

Rx Individual Mask Registers
address_offset : 0x220C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR2 RXIMR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


IMASK2

Interrupt Masks 2 Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMASK2 IMASK2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUFHM

BUFHM : Buffer MBi Mask
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding buffer Interrupt is disabled.

#1 : 1

The corresponding buffer Interrupt is enabled.

End of enumeration elements list.


IMASK1

Interrupt Masks 1 Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMASK1 IMASK1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUFLM

BUFLM : Buffer MBi Mask
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding buffer Interrupt is disabled.

#1 : 1

The corresponding buffer Interrupt is enabled.

End of enumeration elements list.


RXIMR3

Rx Individual Mask Registers
address_offset : 0x2A98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR3 RXIMR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


IFLAG2

Interrupt Flags 2 Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IFLAG2 IFLAG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUFHI

BUFHI : Buffer MBi Interrupt
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding buffer has no occurrence of successfully completed transmission or reception.

#1 : 1

The corresponding buffer has successfully completed transmission or reception.

End of enumeration elements list.


IFLAG1

Interrupt Flags 1 Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IFLAG1 IFLAG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUF4TO0I BUF5I BUF6I BUF7I BUF31TO8I

BUF4TO0I : Buffer MBi Interrupt or "reserved"
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding buffer has no occurrence of successfully completed transmission or reception (when MCR[RFEN]=0).

#1 : 1

The corresponding buffer has successfully completed transmission or reception (when MCR[RFEN]=0).

End of enumeration elements list.

BUF5I : Buffer MB5 Interrupt or "Frames available in Rx FIFO"
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

No occurrence of MB5 completing transmission/reception (when MCR[RFEN]=0) or of frame(s) available in the Rx FIFO (when MCR[RFEN]=1)

#1 : 1

MB5 completed transmission/reception (when MCR[RFEN]=0) or frame(s) available in the Rx FIFO (when MCR[RFEN]=1)

End of enumeration elements list.

BUF6I : Buffer MB6 Interrupt or "Rx FIFO Warning"
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

No occurrence of MB6 completing transmission/reception (when MCR[RFEN]=0) or of Rx FIFO almost full (when MCR[RFEN]=1)

#1 : 1

MB6 completed transmission/reception (when MCR[RFEN]=0) or Rx FIFO almost full (when MCR[RFEN]=1)

End of enumeration elements list.

BUF7I : Buffer MB7 Interrupt or "Rx FIFO Overflow"
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

No occurrence of MB7 completing transmission/reception (when MCR[RFEN]=0) or of Rx FIFO overflow (when MCR[RFEN]=1)

#1 : 1

MB7 completed transmission/reception (when MCR[RFEN]=0) or Rx FIFO overflow (when MCR[RFEN]=1)

End of enumeration elements list.

BUF31TO8I : Buffer MBi Interrupt
bits : 8 - 31 (24 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding buffer has no occurrence of successfully completed transmission or reception.

#1 : 1

The corresponding buffer has successfully completed transmission or reception.

End of enumeration elements list.


RXIMR4

Rx Individual Mask Registers
address_offset : 0x3328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR4 RXIMR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


CTRL2

Control 2 Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL2 CTRL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EACEN RRS MRP TASD RFFN WRMFRZ

EACEN : Entire Frame Arbitration Field Comparison Enable for Rx Mailboxes
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits.

#1 : 1

Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply.

End of enumeration elements list.

RRS : Remote Request Storing
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

#0 : 0

Remote Response Frame is generated.

#1 : 1

Remote Request Frame is stored.

End of enumeration elements list.

MRP : Mailboxes Reception Priority
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

#0 : 0

Matching starts from Rx FIFO and continues on Mailboxes.

#1 : 1

Matching starts from Mailboxes and continues on Rx FIFO.

End of enumeration elements list.

TASD : Tx Arbitration Start Delay
bits : 19 - 23 (5 bit)
access : read-write

RFFN : Number of Rx FIFO Filters
bits : 24 - 27 (4 bit)
access : read-write

WRMFRZ : Write-Access to Memory in Freeze mode
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

#0 : 0

Maintain the write access restrictions.

#1 : 1

Enable unrestricted write access to FlexCAN memory.

End of enumeration elements list.


ESR2

Error and Status 2 Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ESR2 ESR2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IMB VPS LPTM

IMB : Inactive Mailbox
bits : 13 - 13 (1 bit)
access : read-only

Enumeration:

#0 : 0

If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox.

#1 : 1

If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one.

End of enumeration elements list.

VPS : Valid Priority Status
bits : 14 - 14 (1 bit)
access : read-only

Enumeration:

#0 : 0

Contents of IMB and LPTM are invalid.

#1 : 1

Contents of IMB and LPTM are valid.

End of enumeration elements list.

LPTM : Lowest Priority Tx Mailbox
bits : 16 - 22 (7 bit)
access : read-only


RXIMR5

Rx Individual Mask Registers
address_offset : 0x3BBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR5 RXIMR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


CTRL1

Control 1 Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL1 CTRL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PROPSEG LOM LBUF TSYN BOFFREC SMP RWRNMSK TWRNMSK LPB CLKSRC ERRMSK BOFFMSK PSEG2 PSEG1 RJW PRESDIV

PROPSEG : Propagation Segment
bits : 0 - 2 (3 bit)
access : read-write

LOM : Listen-Only Mode
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Listen-Only Mode is deactivated.

#1 : 1

FlexCAN module operates in Listen-Only Mode.

End of enumeration elements list.

LBUF : Lowest Buffer Transmitted First
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

Buffer with highest priority is transmitted first.

#1 : 1

Lowest number buffer is transmitted first.

End of enumeration elements list.

TSYN : Timer Sync
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Timer Sync feature disabled

#1 : 1

Timer Sync feature enabled

End of enumeration elements list.

BOFFREC : Bus Off Recovery
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Automatic recovering from Bus Off state enabled, according to CAN Spec 2.0 part B

#1 : 1

Automatic recovering from Bus Off state disabled

End of enumeration elements list.

SMP : CAN Bit Sampling
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Just one sample is used to determine the bit value.

#1 : 1

Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used.

End of enumeration elements list.

RWRNMSK : Rx Warning Interrupt Mask
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Rx Warning Interrupt disabled

#1 : 1

Rx Warning Interrupt enabled

End of enumeration elements list.

TWRNMSK : Tx Warning Interrupt Mask
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Tx Warning Interrupt disabled

#1 : 1

Tx Warning Interrupt enabled

End of enumeration elements list.

LPB : Loop Back Mode
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#0 : 0

Loop Back disabled

#1 : 1

Loop Back enabled

End of enumeration elements list.

CLKSRC : CAN Engine Clock Source
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

#0 : 0

The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock.

#1 : 1

The CAN engine clock source is the peripheral clock.

End of enumeration elements list.

ERRMSK : Error Mask
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

#0 : 0

Error interrupt disabled

#1 : 1

Error interrupt enabled

End of enumeration elements list.

BOFFMSK : Bus Off Mask
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

#0 : 0

Bus Off interrupt disabled

#1 : 1

Bus Off interrupt enabled

End of enumeration elements list.

PSEG2 : Phase Segment 2
bits : 16 - 18 (3 bit)
access : read-write

PSEG1 : Phase Segment 1
bits : 19 - 21 (3 bit)
access : read-write

RJW : Resync Jump Width
bits : 22 - 23 (2 bit)
access : read-write

PRESDIV : Prescaler Division Factor
bits : 24 - 31 (8 bit)
access : read-write


CRCR

CRC Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CRCR CRCR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TXCRC MBCRC

TXCRC : CRC Transmitted
bits : 0 - 14 (15 bit)
access : read-only

MBCRC : CRC Mailbox
bits : 16 - 22 (7 bit)
access : read-only


RXIMR6

Rx Individual Mask Registers
address_offset : 0x4454 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR6 RXIMR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


RXFGMASK

Rx FIFO Global Mask Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFGMASK RXFGMASK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FGM

FGM : Rx FIFO Global Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


RXFIR

Rx FIFO Information Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RXFIR RXFIR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IDHIT

IDHIT : Identifier Acceptance Filter Hit Indicator
bits : 0 - 8 (9 bit)
access : read-only


RXIMR7

Rx Individual Mask Registers
address_offset : 0x4CF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR7 RXIMR7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


RXIMR8

Rx Individual Mask Registers
address_offset : 0x5590 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR8 RXIMR8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


RXIMR9

Rx Individual Mask Registers
address_offset : 0x5E34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR9 RXIMR9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


RXIMR10

Rx Individual Mask Registers
address_offset : 0x66DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR10 RXIMR10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


RXIMR11

Rx Individual Mask Registers
address_offset : 0x6F88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR11 RXIMR11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


RXIMR12

Rx Individual Mask Registers
address_offset : 0x7838 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR12 RXIMR12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


TIMER

Free Running Timer
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER TIMER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIMER

TIMER : Timer value
bits : 0 - 15 (16 bit)
access : read-write


CS0

Message Buffer 0 CS Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS0 CS0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


RXIMR13

Rx Individual Mask Registers
address_offset : 0x80EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR13 RXIMR13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


ID0

Message Buffer 0 ID Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID0 ID0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD00

Message Buffer 0 WORD0 Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD00 WORD00 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


RXIMR14

Rx Individual Mask Registers
address_offset : 0x89A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR14 RXIMR14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


WORD10

Message Buffer 0 WORD1 Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD10 WORD10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS1

Message Buffer 1 CS Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS1 CS1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


RXIMR15

Rx Individual Mask Registers
address_offset : 0x9260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIMR15 RXIMR15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MI

MI : Individual Mask Bits
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding bit in the filter is "don't care."

#1 : 1

The corresponding bit in the filter is checked.

End of enumeration elements list.


ID1

Message Buffer 1 ID Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID1 ID1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD01

Message Buffer 1 WORD0 Register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD01 WORD01 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD11

Message Buffer 1 WORD1 Register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD11 WORD11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS2

Message Buffer 2 CS Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS2 CS2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID2

Message Buffer 2 ID Register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID2 ID2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD02

Message Buffer 2 WORD0 Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD02 WORD02 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD12

Message Buffer 2 WORD1 Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD12 WORD12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS3

Message Buffer 3 CS Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS3 CS3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID3

Message Buffer 3 ID Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID3 ID3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD03

Message Buffer 3 WORD0 Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD03 WORD03 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD13

Message Buffer 3 WORD1 Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD13 WORD13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS4

Message Buffer 4 CS Register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS4 CS4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID4

Message Buffer 4 ID Register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID4 ID4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD04

Message Buffer 4 WORD0 Register
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD04 WORD04 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD14

Message Buffer 4 WORD1 Register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD14 WORD14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS5

Message Buffer 5 CS Register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS5 CS5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID5

Message Buffer 5 ID Register
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID5 ID5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD05

Message Buffer 5 WORD0 Register
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD05 WORD05 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD15

Message Buffer 5 WORD1 Register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD15 WORD15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS6

Message Buffer 6 CS Register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS6 CS6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID6

Message Buffer 6 ID Register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID6 ID6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD06

Message Buffer 6 WORD0 Register
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD06 WORD06 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD16

Message Buffer 6 WORD1 Register
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD16 WORD16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


CS7

Message Buffer 7 CS Register
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CS7 CS7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIME_STAMP DLC RTR IDE SRR CODE

TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write

DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write

RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write

IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write

SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write

CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write


ID7

Message Buffer 7 ID Register
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID7 ID7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT STD PRIO

EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write

STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write

PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write


WORD07

Message Buffer 7 WORD0 Register
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD07 WORD07 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_3 DATA_BYTE_2 DATA_BYTE_1 DATA_BYTE_0

DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write


WORD17

Message Buffer 7 WORD1 Register
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WORD17 WORD17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_BYTE_7 DATA_BYTE_6 DATA_BYTE_5 DATA_BYTE_4

DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write

DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write

DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write

DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write



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