\n

SMC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

Registers

PMPROT

PMCTRL

VLLSCTRL

PMSTAT


PMPROT

Power Mode Protection register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMPROT PMPROT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 AVLLS ALLS AVLP

AVLLS : Allow Very-Low-Leakage Stop Mode
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Any VLLSx mode is not allowed

#1 : 1

Any VLLSx mode is allowed

End of enumeration elements list.

ALLS : Allow Low-Leakage Stop Mode
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Any LLSx mode is not allowed

#1 : 1

Any LLSx mode is allowed

End of enumeration elements list.

AVLP : Allow Very-Low-Power Modes
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

VLPR, VLPW and VLPS are not allowed

#1 : 1

VLPR, VLPW and VLPS are allowed

End of enumeration elements list.


PMCTRL

Power Mode Control register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMCTRL PMCTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 STOPM STOPA RUNM LPWUI

STOPM : Stop Mode Control
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

#000 : 000

Normal Stop (STOP)

#010 : 010

Very-Low-Power Stop (VLPS)

#011 : 011

Low-Leakage Stop (LLSx)

#100 : 100

Very-Low-Leakage Stop (VLLSx)

#110 : 110

Reseved

End of enumeration elements list.

STOPA : Stop Aborted
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

#0 : 0

The previous stop mode entry was successsful.

#1 : 1

The previous stop mode entry was aborted.

End of enumeration elements list.

RUNM : Run Mode Control
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

#00 : 00

Normal Run mode (RUN)

#10 : 10

Very-Low-Power Run mode (VLPR)

End of enumeration elements list.

LPWUI : Low-Power Wake Up On Interrupt
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

The system remains in a VLP mode on an interrupt

#1 : 1

The system exits to Normal RUN mode on an interrupt

End of enumeration elements list.


VLLSCTRL

VLLS Control register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VLLSCTRL VLLSCTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 VLLSM RAM2PO PORPO

VLLSM : VLLS Mode Control
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

#000 : 000

VLLS0

#001 : 001

VLLS1

#010 : 010

VLLS2

#011 : 011

VLLS3

End of enumeration elements list.

RAM2PO : RAM2 Power Option
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

RAM2 not powered in VLLS2

#1 : 1

RAM2 powered in VLLS2

End of enumeration elements list.

PORPO : POR Power Option
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

POR detect circuit is enabled in VLLS0

#1 : 1

POR detect circuit is disabled in VLLS0

End of enumeration elements list.


PMSTAT

Power Mode Status register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PMSTAT PMSTAT read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PMSTAT

PMSTAT : When debug is enabled, the PMSTAT will not update to STOP or VLPS
bits : 0 - 6 (7 bit)
access : read-only



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.