Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
RNGA Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GO : Go
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disabled
#1 : 1
Enabled
End of enumeration elements list.
HA : High Assurance
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disabled
#1 : 1
Enabled
End of enumeration elements list.
INTM : Interrupt Mask
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not masked
#1 : 1
Masked
End of enumeration elements list.
CLRI : Clear Interrupt
bits : 3 - 3 (1 bit)
access : write-only
Enumeration:
#0 : 0
Do not clear the interrupt.
#1 : 1
Clear the interrupt. When you write 1 to this field, RNGA then resets the error-interrupt indicator (SR[ERRI]). This bit always reads as 0.
End of enumeration elements list.
SLP : Sleep
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Normal mode
#1 : 1
Sleep (low-power) mode
End of enumeration elements list.
RNGA Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SECV : Security Violation
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
#0 : 0
No security violation
#1 : 1
Security violation
End of enumeration elements list.
LRS : Last Read Status
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
No underflow
#1 : 1
Underflow
End of enumeration elements list.
ORU : Output Register Underflow
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
#0 : 0
No underflow
#1 : 1
Underflow
End of enumeration elements list.
ERRI : Error Interrupt
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
#0 : 0
No underflow
#1 : 1
Underflow
End of enumeration elements list.
SLP : Sleep
bits : 4 - 4 (1 bit)
access : read-only
Enumeration:
#0 : 0
Normal mode
#1 : 1
Sleep (low-power) mode
End of enumeration elements list.
OREG_LVL : Output Register Level
bits : 8 - 15 (8 bit)
access : read-only
Enumeration:
#0 : 0
No words (empty)
#1 : 1
One word (valid)
End of enumeration elements list.
OREG_SIZE : Output Register Size
bits : 16 - 23 (8 bit)
access : read-only
Enumeration:
#1 : 1
One word (this value is fixed)
End of enumeration elements list.
RNGA Entropy Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
EXT_ENT : External Entropy
bits : 0 - 31 (32 bit)
access : write-only
RNGA Output Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RANDOUT : Random Output
bits : 0 - 31 (32 bit)
access : read-only
Enumeration:
#0 : 0
Invalid data (if you read this field when it is 0 and SR[OREG_LVL] is 0, RNGA then writes 1 to SR[ERRI], SR[ORU], and SR[LRS]; when the error interrupt is not masked (CR[INTM]=0), RNGA also asserts an error interrupt request to the interrupt controller).
End of enumeration elements list.
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