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USB0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x10D byte (0x0)
mem_usage : registers
protection : not protected

Registers

PERID

OTGISTAT

USBCTRL

OBSERVE

CONTROL

USBTRC0

OTGICR

OTGSTAT

ENDPT0

OTGCTL

ENDPT1

ENDPT2

ENDPT3

IDCOMP

ENDPT4

ENDPT5

ENDPT6

ENDPT7

REV

ISTAT

ENDPT8

INTEN

ERRSTAT

ERREN

ENDPT9

STAT

CTL

ADDR

BDTPAGE1

ENDPT10

FRMNUML

FRMNUMH

TOKEN

SOFTHLD

ENDPT11

BDTPAGE2

BDTPAGE3

ENDPT12

ADDINFO

ENDPT13

ENDPT14

ENDPT15


PERID

Peripheral ID Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PERID PERID read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ID

ID : Peripheral identification bits
bits : 0 - 5 (6 bit)
access : read-only


OTGISTAT

OTG Interrupt Status Register
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OTGISTAT OTGISTAT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 AVBUSCHG B_SESS_CHG SESSVLDCHG LINE_STATE_CHG ONEMSEC IDCHG

AVBUSCHG : no description available
bits : 0 - 0 (1 bit)
access : read-write

B_SESS_CHG : no description available
bits : 2 - 2 (1 bit)
access : read-write

SESSVLDCHG : no description available
bits : 3 - 3 (1 bit)
access : read-write

LINE_STATE_CHG : no description available
bits : 5 - 5 (1 bit)
access : read-write

ONEMSEC : no description available
bits : 6 - 6 (1 bit)
access : read-write

IDCHG : no description available
bits : 7 - 7 (1 bit)
access : read-write


USBCTRL

USB Control Register
address_offset : 0x100 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USBCTRL USBCTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PDE SUSP

PDE : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Weak pulldowns are disabled on D+ and D-

#1 : 1

Weak pulldowns are enabled on D+ and D-.

End of enumeration elements list.

SUSP : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

USB transceiver is not in suspend state.

#1 : 1

USB transceiver is in suspend state.

End of enumeration elements list.


OBSERVE

USB OTG Observe Register
address_offset : 0x104 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

OBSERVE OBSERVE read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DMPD DPPD DPPU

DMPD : no description available
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

#0 : 0

D- pulldown disabled.

#1 : 1

D- pulldown enabled.

End of enumeration elements list.

DPPD : no description available
bits : 6 - 6 (1 bit)
access : read-only

Enumeration:

#0 : 0

D+ pulldown disabled.

#1 : 1

D+ pulldown enabled.

End of enumeration elements list.

DPPU : no description available
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

D+ pullup disabled.

#1 : 1

D+ pullup enabled.

End of enumeration elements list.


CONTROL

USB OTG Control Register
address_offset : 0x108 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONTROL CONTROL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DPPULLUPNONOTG

DPPULLUPNONOTG : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

DP Pull up in non-OTG device mode is not enabled.

#1 : 1

DP Pull up in non-OTG device mode is enabled.

End of enumeration elements list.


USBTRC0

USB Transceiver Control Register 0
address_offset : 0x10C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USBTRC0 USBTRC0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RESUME_INT SYNC_DET USBRESMEN USBRESET

USB_RESUME_INT : USB Asynchronous Interrupt
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

#0 : 0

No interrupt was generated.

#1 : 1

Interrupt was generated because of the USB asynchronous interrupt.

End of enumeration elements list.

SYNC_DET : Synchronous USB Interrupt Detect
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

#0 : 0

Synchronous interrupt has not been detected.

#1 : 1

Synchronous interrupt has been detected.

End of enumeration elements list.

USBRESMEN : Asynchronous Resume Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

USB asynchronous wakeup from suspend mode disabled.

#1 : 1

USB asynchronous wakeup from suspend mode enabled. The asynchronous resume interrupt differs from the synchronous resume interrupt in that it asynchronously detects K-state using the unfiltered state of the D+ and D- pins. This interupt should only be enabled when the Transceiver is suspended.

End of enumeration elements list.

USBRESET : USB reset
bits : 7 - 7 (1 bit)
access : write-only

Enumeration:

#0 : 0

Normal USB module operation.

#1 : 1

Returns the USB module to its reset state.

End of enumeration elements list.


OTGICR

OTG Interrupt Control Register
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OTGICR OTGICR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 AVBUSEN BSESSEN SESSVLDEN LINESTATEEN ONEMSECEN IDEN

AVBUSEN : A VBUS Valid interrupt enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

The AVBUSCHG interrupt is disabled

#1 : 1

The AVBUSCHG interrupt is enabled

End of enumeration elements list.

BSESSEN : B Session END interrupt enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

The B_SESS_CHG interrupt is disabled

#1 : 1

The B_SESS_CHG interrupt is enabled

End of enumeration elements list.

SESSVLDEN : Session valid interrupt enable
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

The SESSVLDCHG interrupt is disabled.

#1 : 1

The SESSVLDCHG interrupt is enabled.

End of enumeration elements list.

LINESTATEEN : Line State change interrupt enable
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

The LINE_STAT_CHG interrupt is disabled.

#1 : 1

The LINE_STAT_CHG interrupt is enabled

End of enumeration elements list.

ONEMSECEN : 1 millisecond interrupt enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

The 1msec timer interrupt is disabled.

#1 : 1

The 1msec timer interrupt is enabled.

End of enumeration elements list.

IDEN : ID interrupt enable
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

The ID interrupt is disabled

#1 : 1

The ID interrupt is enabled

End of enumeration elements list.


OTGSTAT

OTG Status Register
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OTGSTAT OTGSTAT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 AVBUSVLD BSESSEND SESS_VLD LINESTATESTABLE ONEMSECEN ID

AVBUSVLD : A VBUS Valid
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

The VBUS voltage is below the A VBUS Valid threshold.

#1 : 1

The VBUS voltage is above the A VBUS Valid threshold.

End of enumeration elements list.

BSESSEND : B Session END
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

The VBUS voltage is above the B session End threshold.

#1 : 1

The VBUS voltage is below the B session End threshold.

End of enumeration elements list.

SESS_VLD : Session valid
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

The VBUS voltage is below the B session Valid threshold

#1 : 1

The VBUS voltage is above the B session Valid threshold.

End of enumeration elements list.

LINESTATESTABLE : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

The LINE_STAT_CHG bit is not yet stable.

#1 : 1

The LINE_STAT_CHG bit has been debounced and is stable.

End of enumeration elements list.

ONEMSECEN : no description available
bits : 6 - 6 (1 bit)
access : read-write

ID : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Indicates a Type A cable has been plugged into the USB connector

#1 : 1

Indicates no cable is attached or a Type B cable has been plugged into the USB connector

End of enumeration elements list.


ENDPT0

Endpoint Control Register
address_offset : 0x180 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT0 ENDPT0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


OTGCTL

OTG Control Register
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OTGCTL OTGCTL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 OTGEN DMLOW DPLOW DPHIGH

OTGEN : On-The-Go pullup/pulldown resistor enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

If USB_EN is set and HOST_MODE is clear in the Control Register (CTL), then the D+ Data Line pull-up resistors are enabled. If HOST_MODE is set the D+ and D- Data Line pull-down resistors are engaged.

#1 : 1

The pull-up and pull-down controls in this register are used.

End of enumeration elements list.

DMLOW : D- Data Line pull-down resistor enable
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

D- pulldown resistor is not enabled.

#1 : 1

D- pulldown resistor is enabled.

End of enumeration elements list.

DPLOW : D+ Data Line pull-down resistor enable
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

D+ pulldown resistor is not enabled.

#1 : 1

D+ pulldown resistor is enabled.

End of enumeration elements list.

DPHIGH : D+ Data Line pullup resistor enable
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

D+ pullup resistor is not enabled

#1 : 1

D+ pullup resistor is enabled

End of enumeration elements list.


ENDPT1

Endpoint Control Register
address_offset : 0x244 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT1 ENDPT1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


ENDPT2

Endpoint Control Register
address_offset : 0x30C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT2 ENDPT2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


ENDPT3

Endpoint Control Register
address_offset : 0x3D8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT3 ENDPT3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


IDCOMP

Peripheral ID Complement Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IDCOMP IDCOMP read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 NID

NID : no description available
bits : 0 - 5 (6 bit)
access : read-only


ENDPT4

Endpoint Control Register
address_offset : 0x4A8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT4 ENDPT4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


ENDPT5

Endpoint Control Register
address_offset : 0x57C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT5 ENDPT5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


ENDPT6

Endpoint Control Register
address_offset : 0x654 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT6 ENDPT6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


ENDPT7

Endpoint Control Register
address_offset : 0x730 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT7 ENDPT7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


REV

Peripheral Revision Register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

REV REV read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 REV

REV : Revision
bits : 0 - 7 (8 bit)
access : read-only


ISTAT

Interrupt Status Register
address_offset : 0x80 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISTAT ISTAT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USBRST ERROR SOFTOK TOKDNE SLEEP RESUME ATTACH STALL

USBRST : no description available
bits : 0 - 0 (1 bit)
access : read-write

ERROR : no description available
bits : 1 - 1 (1 bit)
access : read-write

SOFTOK : no description available
bits : 2 - 2 (1 bit)
access : read-write

TOKDNE : no description available
bits : 3 - 3 (1 bit)
access : read-write

SLEEP : no description available
bits : 4 - 4 (1 bit)
access : read-write

RESUME : no description available
bits : 5 - 5 (1 bit)
access : read-write

ATTACH : Attach Interrupt
bits : 6 - 6 (1 bit)
access : read-write

STALL : Stall Interrupt
bits : 7 - 7 (1 bit)
access : read-write


ENDPT8

Endpoint Control Register
address_offset : 0x810 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT8 ENDPT8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


INTEN

Interrupt Enable Register
address_offset : 0x84 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTEN INTEN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USBRSTEN ERROREN SOFTOKEN TOKDNEEN SLEEPEN RESUMEEN ATTACHEN STALLEN

USBRSTEN : USBRST Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

The USBRST interrupt is not enabled.

#1 : 1

The USBRST interrupt is enabled.

End of enumeration elements list.

ERROREN : ERROR Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

The ERROR interrupt is not enabled.

#1 : 1

The ERROR interrupt is enabled.

End of enumeration elements list.

SOFTOKEN : SOFTOK Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

The SOFTOK interrupt is not enabled.

#1 : 1

The SOFTOK interrupt is enabled.

End of enumeration elements list.

TOKDNEEN : TOKDNE Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

The TOKDNE interrupt is not enabled.

#1 : 1

The TOKDNE interrupt is enabled.

End of enumeration elements list.

SLEEPEN : SLEEP Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

The SLEEP interrupt is not enabled.

#1 : 1

The SLEEP interrupt is enabled.

End of enumeration elements list.

RESUMEEN : RESUME Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

The RESUME interrupt is not enabled.

#1 : 1

The RESUME interrupt is enabled.

End of enumeration elements list.

ATTACHEN : ATTACH Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

The ATTACH interrupt is not enabled.

#1 : 1

The ATTACH interrupt is enabled.

End of enumeration elements list.

STALLEN : STALL Interrupt Enable
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

The STALL interrupt is not enabled.

#1 : 1

The STALL interrupt is enabled.

End of enumeration elements list.


ERRSTAT

Error Interrupt Status Register
address_offset : 0x88 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ERRSTAT ERRSTAT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PIDERR CRC5EOF CRC16 DFN8 BTOERR DMAERR BTSERR

PIDERR : no description available
bits : 0 - 0 (1 bit)
access : read-write

CRC5EOF : no description available
bits : 1 - 1 (1 bit)
access : read-write

CRC16 : no description available
bits : 2 - 2 (1 bit)
access : read-write

DFN8 : no description available
bits : 3 - 3 (1 bit)
access : read-write

BTOERR : no description available
bits : 4 - 4 (1 bit)
access : read-write

DMAERR : no description available
bits : 5 - 5 (1 bit)
access : read-write

BTSERR : no description available
bits : 7 - 7 (1 bit)
access : read-write


ERREN

Error Interrupt Enable Register
address_offset : 0x8C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ERREN ERREN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PIDERREN CRC5EOFEN CRC16EN DFN8EN BTOERREN DMAERREN BTSERREN

PIDERREN : PIDERR Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

The PIDERR interrupt is not enabled.

#1 : 1

The PIDERR interrupt is enabled.

End of enumeration elements list.

CRC5EOFEN : CRC5/EOF Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

The CRC5/EOF interrupt is not enabled.

#1 : 1

The CRC5/EOF interrupt is enabled.

End of enumeration elements list.

CRC16EN : CRC16 Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

The CRC16 interrupt is not enabled.

#1 : 1

The CRC16 interrupt is enabled.

End of enumeration elements list.

DFN8EN : DFN8 Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

The DFN8 interrupt is not enabled.

#1 : 1

The DFN8 interrupt is enabled.

End of enumeration elements list.

BTOERREN : BTOERR Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

The BTOERR interrupt is not enabled.

#1 : 1

The BTOERR interrupt is enabled.

End of enumeration elements list.

DMAERREN : DMAERR Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

The DMAERR interrupt is not enabled.

#1 : 1

The DMAERR interrupt is enabled.

End of enumeration elements list.

BTSERREN : BTSERR Interrupt Enable
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

The BTSERR interrupt is not enabled.

#1 : 1

The BTSERR interrupt is enabled.

End of enumeration elements list.


ENDPT9

Endpoint Control Register
address_offset : 0x8F4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT9 ENDPT9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


STAT

Status Register
address_offset : 0x90 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STAT STAT read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ODD TX ENDP

ODD : no description available
bits : 2 - 2 (1 bit)
access : read-only

TX : Transmit Indicator
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

#0 : 0

The most recent transaction was a Receive operation.

#1 : 1

The most recent transaction was a Transmit operation.

End of enumeration elements list.

ENDP : no description available
bits : 4 - 7 (4 bit)
access : read-only


CTL

Control Register
address_offset : 0x94 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL CTL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USBENSOFEN ODDRST RESUME HOSTMODEEN RESET TXSUSPENDTOKENBUSY SE0 JSTATE

USBENSOFEN : USB Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

The USB Module is disabled.

#1 : 1

The USB Module is enabled.

End of enumeration elements list.

ODDRST : no description available
bits : 1 - 1 (1 bit)
access : read-write

RESUME : no description available
bits : 2 - 2 (1 bit)
access : read-write

HOSTMODEEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

RESET : no description available
bits : 4 - 4 (1 bit)
access : read-write

TXSUSPENDTOKENBUSY : no description available
bits : 5 - 5 (1 bit)
access : read-write

SE0 : Live USB Single Ended Zero signal
bits : 6 - 6 (1 bit)
access : read-write

JSTATE : Live USB differential receiver JSTATE signal
bits : 7 - 7 (1 bit)
access : read-write


ADDR

Address Register
address_offset : 0x98 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADDR ADDR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ADDR LSEN

ADDR : USB address
bits : 0 - 6 (7 bit)
access : read-write

LSEN : Low Speed Enable bit
bits : 7 - 7 (1 bit)
access : read-write


BDTPAGE1

BDT Page Register 1
address_offset : 0x9C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BDTPAGE1 BDTPAGE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BDTBA

BDTBA : no description available
bits : 1 - 7 (7 bit)
access : read-write


ENDPT10

Endpoint Control Register
address_offset : 0x9DC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT10 ENDPT10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


FRMNUML

Frame Number Register Low
address_offset : 0xA0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRMNUML FRMNUML read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FRM

FRM : no description available
bits : 0 - 7 (8 bit)
access : read-write


FRMNUMH

Frame Number Register High
address_offset : 0xA4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRMNUMH FRMNUMH read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FRM

FRM : no description available
bits : 0 - 2 (3 bit)
access : read-write


TOKEN

Token Register
address_offset : 0xA8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TOKEN TOKEN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TOKENENDPT TOKENPID

TOKENENDPT : no description available
bits : 0 - 3 (4 bit)
access : read-write

TOKENPID : no description available
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

#0001 : 0001

OUT Token. USB Module performs an OUT (TX) transaction.

#1001 : 1001

IN Token. USB Module performs an In (RX) transaction.

#1101 : 1101

SETUP Token. USB Module performs a SETUP (TX) transaction

End of enumeration elements list.


SOFTHLD

SOF Threshold Register
address_offset : 0xAC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SOFTHLD SOFTHLD read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CNT

CNT : no description available
bits : 0 - 7 (8 bit)
access : read-write


ENDPT11

Endpoint Control Register
address_offset : 0xAC8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT11 ENDPT11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


BDTPAGE2

BDT Page Register 2
address_offset : 0xB0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BDTPAGE2 BDTPAGE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BDTBA

BDTBA : no description available
bits : 0 - 7 (8 bit)
access : read-write


BDTPAGE3

BDT Page Register 3
address_offset : 0xB4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BDTPAGE3 BDTPAGE3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BDTBA

BDTBA : no description available
bits : 0 - 7 (8 bit)
access : read-write


ENDPT12

Endpoint Control Register
address_offset : 0xBB8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT12 ENDPT12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


ADDINFO

Peripheral Additional Info Register
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDINFO ADDINFO read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 IEHOST IRQNUM

IEHOST : no description available
bits : 0 - 0 (1 bit)
access : read-only

IRQNUM : Assigned Interrupt Request Number
bits : 3 - 7 (5 bit)
access : read-only


ENDPT13

Endpoint Control Register
address_offset : 0xCAC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT13 ENDPT13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


ENDPT14

Endpoint Control Register
address_offset : 0xDA4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT14 ENDPT14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write


ENDPT15

Endpoint Control Register
address_offset : 0xEA0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENDPT15 ENDPT15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 EPHSHK EPSTALL EPTXEN EPRXEN EPCTLDIS RETRYDIS HOSTWOHUB

EPHSHK : no description available
bits : 0 - 0 (1 bit)
access : read-write

EPSTALL : no description available
bits : 1 - 1 (1 bit)
access : read-write

EPTXEN : no description available
bits : 2 - 2 (1 bit)
access : read-write

EPRXEN : no description available
bits : 3 - 3 (1 bit)
access : read-write

EPCTLDIS : no description available
bits : 4 - 4 (1 bit)
access : read-write

RETRYDIS : no description available
bits : 6 - 6 (1 bit)
access : read-write

HOSTWOHUB : no description available
bits : 7 - 7 (1 bit)
access : read-write



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