\n
address_offset : 0x0 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
RNGB Version ID Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MINOR : Minor version number.
bits : 0 - 7 (8 bit)
access : read-only
MAJOR : Major version number.
bits : 8 - 15 (8 bit)
access : read-only
TYPE : Random number generator type
bits : 28 - 31 (4 bit)
access : read-only
Enumeration:
#0000 : 0000
RNGA
#0001 : 0001
RNGB (This is the type used in this module)
#0010 : 0010
RNGC
End of enumeration elements list.
RNGB Error Status Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
LFE : Linear feedback shift register (LFSR) error.
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
#0 : 0
LFSRs are working properly.
#1 : 1
LFSR failure has occurred.
End of enumeration elements list.
OSCE : Oscillator error.
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
RNG oscillator is working properly.
#1 : 1
Problem detected with the RNG oscillator.
End of enumeration elements list.
STE : Self test error.
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
#0 : 0
RNGB has not failed self test.
#1 : 1
RNGB has failed self test.
End of enumeration elements list.
SATE : Statistical test error.
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
#0 : 0
RNGB has not failed the statistical tests.
#1 : 1
RNGB has failed the statistical tests during initialization.
End of enumeration elements list.
FUFE : FIFO underflow error
bits : 4 - 4 (1 bit)
access : read-only
Enumeration:
#0 : 0
FIFO underflow has not occurred.
#1 : 1
FIFO underflow has occurred
End of enumeration elements list.
RNGB Output FIFO
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RANDOUT : Random Output
bits : 0 - 31 (32 bit)
access : read-only
RNGB Command Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ST : Self test.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not in self test mode.
#1 : 1
Self test mode.
End of enumeration elements list.
GS : Generate seed.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Not in seed generation mode.
#1 : 1
Generate seed mode.
End of enumeration elements list.
CI : Clear interrupt.
bits : 4 - 4 (1 bit)
access : write-only
Enumeration:
#0 : 0
Do not clear interrupt.
#1 : 1
Clear interrupt.
End of enumeration elements list.
CE : Clear error.
bits : 5 - 5 (1 bit)
access : write-only
Enumeration:
#0 : 0
Do not clear errors and interrupt.
#1 : 1
Clear errors and interrupt.
End of enumeration elements list.
SR : Software reset.
bits : 6 - 6 (1 bit)
access : write-only
Enumeration:
#0 : 0
Do not perform a software reset.
#1 : 1
Software reset.
End of enumeration elements list.
RNGB Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FUFMOD : FIFO underflow response mode.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
#00 : 00
Return all zeros and set RNG_ESR[FUFE]
#01 : 01
Return all zeros and set RNG_ESR[FUFE]
#10 : 10
Generate bus transfer error
#11 : 11
Generate interrupt and return all zeros (Overrides RNG_CR[MASKERR])
End of enumeration elements list.
AR : Auto-reseed.
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Do not enable automatic reseeding.
#1 : 1
Enable automatic reseeding.
End of enumeration elements list.
MASKDONE : Mask done interrupt.
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
No mask applied.
#1 : 1
Mask applied.
End of enumeration elements list.
MASKERR : Mask error interrupt.
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
No mask applied.
#1 : 1
Mask applied to the error interrupt.
End of enumeration elements list.
RNGB Status Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
BUSY : Busy.
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
Not busy.
#1 : 1
Busy.
End of enumeration elements list.
SLP : Sleep.
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
#0 : 0
RNGB is not in sleep mode.
#1 : 1
RNGB is in sleep mode.
End of enumeration elements list.
RS : Reseed needed.
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
#0 : 0
RNGB does not need to be reseeded.
#1 : 1
RNGB needs to be reseeded.
End of enumeration elements list.
STDN : Self test done.
bits : 4 - 4 (1 bit)
access : read-only
Enumeration:
#0 : 0
Self test not complete.
#1 : 1
Completed a self test since the last reset.
End of enumeration elements list.
SDN : Seed done.
bits : 5 - 5 (1 bit)
access : read-only
Enumeration:
#0 : 0
Seed generation process not complete.
#1 : 1
Completed seed generation since the last reset.
End of enumeration elements list.
NSDN : New seed done.
bits : 6 - 6 (1 bit)
access : read-only
FIFO_LVL : FIFO level.
bits : 8 - 11 (4 bit)
access : read-only
FIFO_SIZE : FIFO size.
bits : 12 - 15 (4 bit)
access : read-only
ERR : Error.
bits : 16 - 16 (1 bit)
access : read-only
Enumeration:
#0 : 0
No error.
#1 : 1
Error detected.
End of enumeration elements list.
ST_PF : Self Test Pass Fail.
bits : 21 - 23 (3 bit)
access : read-only
Enumeration:
#0 : 0
Pass.
#1 : 1
Fail.
End of enumeration elements list.
STATPF : Statistics test pass fail.
bits : 24 - 31 (8 bit)
access : read-only
Enumeration:
#0 : 0
Pass.
#1 : 1
Fail.
End of enumeration elements list.
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