\n
address_offset : 0x0 Bytes (0x0)
size : 0x6 byte (0x0)
mem_usage : registers
protection : not protected
CMP Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HYSTCTR : Comparator hard block hysteresis control
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
#00 : 00
Level 0
#01 : 01
Level 1
#10 : 10
Level 2
#11 : 11
Level 3
End of enumeration elements list.
FILTER_CNT : Filter Sample Count
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
#000 : 000
Filter is disabled. If SE = 1, then COUT is a logic 0. This is not a legal state, and is not recommended. If SE = 0, COUT = COUTA.
#001 : 001
One sample must agree. The comparator output is simply sampled.
#010 : 010
2 consecutive samples must agree.
#011 : 011
3 consecutive samples must agree.
#100 : 100
4 consecutive samples must agree.
#101 : 101
5 consecutive samples must agree.
#110 : 110
6 consecutive samples must agree.
#111 : 111
7 consecutive samples must agree.
End of enumeration elements list.
CMP Control Register 1
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Comparator Module Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Analog Comparator is disabled.
#1 : 1
Analog Comparator is enabled.
End of enumeration elements list.
OPE : Comparator Output Pin Enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
CMPO is not available on the associated CMPO output pin. If the comparator does not own the pin, this field has no effect.
#1 : 1
CMPO is available on the associated CMPO output pin. The comparator output (CMPO) is driven out on the associated CMPO output pin if the comparator owns the pin. If the comparator does not own the field, this bit has no effect.
End of enumeration elements list.
COS : Comparator Output Select
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Set the filtered comparator output (CMPO) to equal COUT.
#1 : 1
Set the unfiltered comparator output (CMPO) to equal COUTA.
End of enumeration elements list.
INV : Comparator INVERT
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Does not invert the comparator output.
#1 : 1
Inverts the comparator output.
End of enumeration elements list.
PMODE : Power Mode Select
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Low-Speed (LS) Comparison mode selected. In this mode, CMP has slower output propagation delay and lower current consumption.
#1 : 1
High-Speed (HS) Comparison mode selected. In this mode, CMP has faster output propagation delay and higher current consumption.
End of enumeration elements list.
TRIGM : Trigger Mode Enable
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Trigger mode is disabled.
#1 : 1
Trigger mode is enabled.
End of enumeration elements list.
WE : Windowing Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Windowing mode is not selected.
#1 : 1
Windowing mode is selected.
End of enumeration elements list.
SE : Sample Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Sampling mode is not selected.
#1 : 1
Sampling mode is selected.
End of enumeration elements list.
CMP Filter Period Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILT_PER : Filter Sample Period
bits : 0 - 7 (8 bit)
access : read-write
CMP Status and Control Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COUT : Analog Comparator Output
bits : 0 - 0 (1 bit)
access : read-only
CFF : Analog Comparator Flag Falling
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Falling-edge on COUT has not been detected.
#1 : 1
Falling-edge on COUT has occurred.
End of enumeration elements list.
CFR : Analog Comparator Flag Rising
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Rising-edge on COUT has not been detected.
#1 : 1
Rising-edge on COUT has occurred.
End of enumeration elements list.
IEF : Comparator Interrupt Enable Falling
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Interrupt is disabled.
#1 : 1
Interrupt is enabled.
End of enumeration elements list.
IER : Comparator Interrupt Enable Rising
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Interrupt is disabled.
#1 : 1
Interrupt is enabled.
End of enumeration elements list.
DMAEN : DMA Enable Control
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA is disabled.
#1 : 1
DMA is enabled.
End of enumeration elements list.
DAC Control Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VOSEL : DAC Output Voltage Select
bits : 0 - 5 (6 bit)
access : read-write
VRSEL : Supply Voltage Reference Source Select
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Vin1 is selected as resistor ladder network supply reference.
#1 : 1
Vin2 is selected as resistor ladder network supply reference.
End of enumeration elements list.
DACEN : DAC Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
DAC is disabled.
#1 : 1
DAC is enabled.
End of enumeration elements list.
MUX Control Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MSEL : Minus Input Mux Control
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#000 : 000
IN0
#001 : 001
IN1
#010 : 010
IN2
#011 : 011
IN3
#100 : 100
IN4
#101 : 101
IN5
#110 : 110
IN6
#111 : 111
IN7
End of enumeration elements list.
PSEL : Plus Input Mux Control
bits : 3 - 5 (3 bit)
access : read-write
Enumeration:
#000 : 000
IN0
#001 : 001
IN1
#010 : 010
IN2
#011 : 011
IN3
#100 : 100
IN4
#101 : 101
IN5
#110 : 110
IN6
#111 : 111
IN7
End of enumeration elements list.
PSTM : Pass Through Mode Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pass Through Mode is disabled.
#1 : 1
Pass Through Mode is enabled.
End of enumeration elements list.
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