\n
address_offset : 0x4 Bytes (0x0)
size : 0x1804 byte (0x0)
mem_usage : registers
protection : not protected
DryIce Control Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWR : Software Reset
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
No effect.
#1 : 1
Perform a software reset.
End of enumeration elements list.
DEN : DryIce Enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
DryIce clock and prescaler are disabled.
#1 : 1
DryIce clock and prescaler are enabled.
End of enumeration elements list.
TFSR : Tamper Force System Reset
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Do not force chip reset when tampering is detected.
#1 : 1
Force chip reset when tampering is detected.
End of enumeration elements list.
UM : Update Mode
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
DryIce status register cannot be written when the Status Register Lock bit within the Lock Register (LR[SRL]) is clear.
#1 : 1
DryIce status register cannot be written when the Status Register Lock bit within the Lock Register (LR[SRL]) is clear and DryIce tamper flag (SR[DTF]) is set.
End of enumeration elements list.
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
RESERVED : no description available
bits : 4 - 7 (4 bit)
access : read-only
THYS : Tamper Hysteresis Select
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Hysteresis is set to a range of 305 mV to 440 mV.
#1 : 1
Hysteresis is set to a range of 490 mV to 705 mV.
End of enumeration elements list.
TPFE : Tamper Passive Filter Enable
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper pins are configured with passive input filter disabled
#1 : 1
Tamper pins are configured with passive input filter enabled
End of enumeration elements list.
TDSE : Tamper Drive Strength Enable
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper pins are configured for low drive strength
#1 : 1
Tamper pins are configured for high drive strength
End of enumeration elements list.
TSRE : Tamper Slew Rate Enable
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper pins are configured for slow slew rate.
#1 : 1
Tamper pins are configured for fast slew rate.
End of enumeration elements list.
DPR : DryIce Prescaler Register
bits : 17 - 31 (15 bit)
access : read-write
DryIce Pin Glitch Filter Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GFW : Glitch Filter Width
bits : 0 - 5 (6 bit)
access : read-write
GFP : Glitch Filter Prescaler
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is clocked by the 512 Hz prescaler clock.
#1 : 1
The glitch filter on tamper pin is clocked by the 32.768 kHz clock.
End of enumeration elements list.
GFE : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is bypassed.
#1 : 1
The glitch filter on tamper pin is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
TPEX : Tamper Pin Expected
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
#00 : 00
Tamper pin expected value is logic zero.
#01 : 01
Tamper pin expected value is active tamper 0 output.
#10 : 10
Tamper pin expected value is active tamper 1 output.
#11 : 11
Tamper pin 0 expected value is active tamper 0 output XORed with active tamper 1 output.
End of enumeration elements list.
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
TPE : Tamper Pull Enable
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pull resistor is disabled on tamper pin.
#1 : 1
Pull resistor is enabled on tamper pin.
End of enumeration elements list.
DryIce Status Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DTF : DryIce Tamper Flag
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
DryIce tampering not detected.
#1 : 1
DryIce tampering detected.
End of enumeration elements list.
TAF : Tamper Acknowledge Flag
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
DryIce tamper flag (SR[DTF]) is clear or chip reset has not occurred after DryIce tamper flag (SR[DTF]) was set.
#1 : 1
Chip reset has occurred after DryIce tamper flag (SR[DTF]) was set.
End of enumeration elements list.
TOF : Time Overflow Flag
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper not detected.
#1 : 1
RTC time overflow tamper detected.
End of enumeration elements list.
MOF : Monotonic Overflow Flag
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper not detected.
#1 : 1
RTC monotonic overflow tamper detected.
End of enumeration elements list.
VTF : Voltage Tamper Flag
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper not detected.
#1 : 1
Voltage tampering detected.
End of enumeration elements list.
CTF : Clock Tamper Flag
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper not detected.
#1 : 1
Clock tampering detected.
End of enumeration elements list.
TTF : Temperature Tamper Flag
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper not detected.
#1 : 1
Temperature tampering detected.
End of enumeration elements list.
STF : Security Tamper Flag
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper not detected.
#1 : 1
Security module tamper detected.
End of enumeration elements list.
FSF : Flash Security Flag
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper not detected.
#1 : 1
Flash security tamper detected.
End of enumeration elements list.
TMF : Test Mode Flag
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper not detected.
#1 : 1
Test mode tamper detected.
End of enumeration elements list.
RESERVED : no description available
bits : 10 - 15 (6 bit)
access : read-only
RESERVED : no description available
bits : 10 - 15 (6 bit)
access : read-only
TPF : Tamper Pin Flag
bits : 16 - 23 (8 bit)
access : read-write
Enumeration:
#0 : 0
Tamper not detected.
#1 : 1
Tamper pin tamper detected.
End of enumeration elements list.
DryIce Pin Glitch Filter Register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GFW : Glitch Filter Width
bits : 0 - 5 (6 bit)
access : read-write
GFP : Glitch Filter Prescaler
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is clocked by the 512 Hz prescaler clock.
#1 : 1
The glitch filter on tamper pin is clocked by the 32.768 kHz clock.
End of enumeration elements list.
GFE : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is bypassed.
#1 : 1
The glitch filter on tamper pin is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
TPEX : Tamper Pin Expected
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
#00 : 00
Tamper pin expected value is logic zero.
#01 : 01
Tamper pin expected value is active tamper 0 output.
#10 : 10
Tamper pin expected value is active tamper 1 output.
#11 : 11
Tamper pin 0 expected value is active tamper 0 output XORed with active tamper 1 output.
End of enumeration elements list.
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
TPE : Tamper Pull Enable
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pull resistor is disabled on tamper pin.
#1 : 1
Pull resistor is enabled on tamper pin.
End of enumeration elements list.
DryIce Lock Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 0 (1 bit)
access : read-only
KVL : Key Valid Lock
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Secure key valid register is locked and writes are ignored.
#1 : 1
Secure key valid register is not locked and writes complete as normal.
End of enumeration elements list.
KWL : Key Write Lock
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Secure Key Write Lock Register is locked and writes are ignored.
#1 : 1
Secure Key Write Lock Register is not locked and writes complete as normal.
End of enumeration elements list.
KRL : Key Read Lock
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Secure Key Read Lock Register is locked and writes are ignored.
#1 : 1
Secure Key Read Lock Register is not locked and writes complete as normal.
End of enumeration elements list.
CRL : Control Register Lock
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Control register is locked and writes are ignored.
#1 : 1
Control register is not locked and writes complete as normal.
End of enumeration elements list.
SRL : Status Register Lock
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Status register is locked and writes are ignored.
#1 : 1
Status register is not locked and writes complete as normal.
End of enumeration elements list.
LRL : Lock Register Lock
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Lock register is locked and writes are ignored.
#1 : 1
Lock register is not locked and writes complete as normal.
End of enumeration elements list.
IEL : Interrupt Enable Lock
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Interrupt enable register is locked and writes are ignored.
#1 : 1
Interrupt enable register is not locked and writes complete as normal.
End of enumeration elements list.
TSL : Tamper Seconds Lock
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper seconds register is locked and writes are ignored.
#1 : 1
Tamper seconds register is not locked and writes complete as normal.
End of enumeration elements list.
TEL : Tamper Enable Lock
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Tamper enable register is locked and writes are ignored.
#1 : 1
Tamper enable register is not locked and writes complete as normal.
End of enumeration elements list.
PDL : Pin Direction Lock
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pin direction register is locked and writes are ignored.
#1 : 1
Pin direction register is not locked and writes complete as normal.
End of enumeration elements list.
PPL : Pin Polarity Lock
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pin polarity register is locked and writes are ignored.
#1 : 1
Pin polarity register is not locked and writes complete as normal.
End of enumeration elements list.
ATL : Active Tamper Lock
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
#0 : 0
Active tamper register is locked and writes are ignored.
#1 : 1
Active tamper register is not locked and writes complete as normal.
End of enumeration elements list.
RESERVED : no description available
bits : 14 - 15 (2 bit)
access : read-only
RESERVED : no description available
bits : 14 - 15 (2 bit)
access : read-only
GFL : Glitch Filter Lock
bits : 16 - 23 (8 bit)
access : read-write
Enumeration:
#0 : 0
Pin glitch filter register is locked and writes are ignored.
#1 : 1
Pin glitch filter register is not locked and writes complete as normal.
End of enumeration elements list.
Secure Write Access Control
address_offset : 0x1800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SKRW : Secure Key Register Write
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the corresponding secure key register are ignored.
#1 : 1
Writes to the corresponding secure key register complete as normal.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 31 (24 bit)
access : read-only
Secure Read Access Control
address_offset : 0x1804 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SKRR : Secure Key Register Read
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the corresponding secure key register are ignored.
#1 : 1
Reads to the corresponding secure key register complete as normal.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 31 (24 bit)
access : read-only
DryIce Pin Glitch Filter Register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GFW : Glitch Filter Width
bits : 0 - 5 (6 bit)
access : read-write
GFP : Glitch Filter Prescaler
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is clocked by the 512 Hz prescaler clock.
#1 : 1
The glitch filter on tamper pin is clocked by the 32.768 kHz clock.
End of enumeration elements list.
GFE : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is bypassed.
#1 : 1
The glitch filter on tamper pin is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
TPEX : Tamper Pin Expected
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
#00 : 00
Tamper pin expected value is logic zero.
#01 : 01
Tamper pin expected value is active tamper 0 output.
#10 : 10
Tamper pin expected value is active tamper 1 output.
#11 : 11
Tamper pin 0 expected value is active tamper 0 output XORed with active tamper 1 output.
End of enumeration elements list.
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
TPE : Tamper Pull Enable
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pull resistor is disabled on tamper pin.
#1 : 1
Pull resistor is enabled on tamper pin.
End of enumeration elements list.
DryIce Interrupt Enable Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DTIE : DryIce Tamper Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
When DryIce tamper flag (SR[DTF]) is set, an interrupt is not generated.
#1 : 1
When DryIce tamper flag (SR[DTF]) is set, an interrupt is generated.
End of enumeration elements list.
RESERVED : no description available
bits : 1 - 1 (1 bit)
access : read-only
TOIE : Time Overflow Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
When time overflow flag is set, an interrupt is not generated.
#1 : 1
When time overflow flag is set, an interrupt is generated.
End of enumeration elements list.
MOIE : Monotonic Overflow Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
When monotonic overflow flag is set, an interrupt is not generated.
#1 : 1
When monotonic overflow flag is set, an interrupt is generated.
End of enumeration elements list.
VTIE : Voltage Tamper Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
When voltage tamper flag is set, an interrupt is not generated.
#1 : 1
When voltage tamper flag is set, an interrupt is generated.
End of enumeration elements list.
CTIE : Clock Tamper Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
When clock tamper flag is set, an interrupt is not generated.
#1 : 1
When clock tamper flag is set, an interrupt is generated.
End of enumeration elements list.
TTIE : Temperature Tamper Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
When temperature tamper flag is set, an interrupt is not generated.
#1 : 1
When temperature tamper flag is set, an interrupt is generated.
End of enumeration elements list.
STIE : Security Tamper Interrupt Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
When security tamper flag is set, an interrupt is not generated.
#1 : 1
When security tamper flag is set, an interrupt is generated.
End of enumeration elements list.
FSIE : Flash Security Interrupt Enable
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
When flash security flag is set, an interrupt is not generated.
#1 : 1
When flash security flag is set, an interrupt is generated.
End of enumeration elements list.
TMIE : Test Mode Interrupt Enable
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
When test mode flag is set, an interrupt is not generated.
#1 : 1
When test mode flag is set, an interrupt is generated.
End of enumeration elements list.
RESERVED : no description available
bits : 10 - 15 (6 bit)
access : read-only
RESERVED : no description available
bits : 10 - 15 (6 bit)
access : read-only
TPIE : Tamper Pin Interrupt Enable
bits : 16 - 23 (8 bit)
access : read-write
Enumeration:
#0 : 0
When corresponding tamper pin flag is set, an interrupt is not generated.
#1 : 1
When corresponding tamper pin flag is set, an interrupt is generated.
End of enumeration elements list.
DryIce Pin Glitch Filter Register
address_offset : 0x1FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GFW : Glitch Filter Width
bits : 0 - 5 (6 bit)
access : read-write
GFP : Glitch Filter Prescaler
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is clocked by the 512 Hz prescaler clock.
#1 : 1
The glitch filter on tamper pin is clocked by the 32.768 kHz clock.
End of enumeration elements list.
GFE : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is bypassed.
#1 : 1
The glitch filter on tamper pin is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
TPEX : Tamper Pin Expected
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
#00 : 00
Tamper pin expected value is logic zero.
#01 : 01
Tamper pin expected value is active tamper 0 output.
#10 : 10
Tamper pin expected value is active tamper 1 output.
#11 : 11
Tamper pin 0 expected value is active tamper 0 output XORed with active tamper 1 output.
End of enumeration elements list.
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
TPE : Tamper Pull Enable
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pull resistor is disabled on tamper pin.
#1 : 1
Pull resistor is enabled on tamper pin.
End of enumeration elements list.
DryIce Tamper Seconds Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TTS : Tamper Time Seconds
bits : 0 - 31 (32 bit)
access : read-write
Secure Key Register
address_offset : 0x2000 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SK : Secure Key
bits : 0 - 31 (32 bit)
access : read-write
DryIce Tamper Enable Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 1 (2 bit)
access : read-only
TOE : Time Overflow Enable
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
When time overflow flag is set, tampering is not detected.
#1 : 1
When time overflow flag is set, tampering is detected.
End of enumeration elements list.
MOE : Monotonic Overflow Enable
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
When monotonic overflow flag is set, tampering is not detected.
#1 : 1
When monotonic overflow flag is set, tampering is detected.
End of enumeration elements list.
VTE : Voltage Tamper Enable
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
When voltage tamper flag is set, tampering is not detected.
#1 : 1
When voltage tamper flag is set, tampering is detected.
End of enumeration elements list.
CTE : Clock Tamper Enable
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
When clock tamper flag is set, tampering is not detected.
#1 : 1
When clock tamper flag is set, tampering is detected.
End of enumeration elements list.
TTE : Temperature Tamper Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
When temperature tamper flag is set, tampering is not detected.
#1 : 1
When temperature tamper flag is set, tampering is detected.
End of enumeration elements list.
STE : Security Tamper Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
When security tamper flag is set, tampering is not detected.
#1 : 1
When security tamper flag is set, tampering is detected.
End of enumeration elements list.
FSE : Flash Security Enable
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
When flash security flag is set, tampering is not detected.
#1 : 1
When flash security flag is set, tampering is detected.
End of enumeration elements list.
TME : Test Mode Enable
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
When test mode flag is set, tampering is not detected.
#1 : 1
When test mode flag is set, tampering is detected.
End of enumeration elements list.
RESERVED : no description available
bits : 10 - 15 (6 bit)
access : read-only
RESERVED : no description available
bits : 10 - 15 (6 bit)
access : read-only
TPE : Tamper Pin Enable
bits : 16 - 23 (8 bit)
access : read-write
Enumeration:
#0 : 0
When corresponding tamper pin flag is set, tampering is not detected.
#1 : 1
When corresponding tamper pin flag is set, tampering is detected.
End of enumeration elements list.
DryIce Pin Glitch Filter Register
address_offset : 0x254 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GFW : Glitch Filter Width
bits : 0 - 5 (6 bit)
access : read-write
GFP : Glitch Filter Prescaler
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is clocked by the 512 Hz prescaler clock.
#1 : 1
The glitch filter on tamper pin is clocked by the 32.768 kHz clock.
End of enumeration elements list.
GFE : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is bypassed.
#1 : 1
The glitch filter on tamper pin is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
TPEX : Tamper Pin Expected
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
#00 : 00
Tamper pin expected value is logic zero.
#01 : 01
Tamper pin expected value is active tamper 0 output.
#10 : 10
Tamper pin expected value is active tamper 1 output.
#11 : 11
Tamper pin 0 expected value is active tamper 0 output XORed with active tamper 1 output.
End of enumeration elements list.
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
TPE : Tamper Pull Enable
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pull resistor is disabled on tamper pin.
#1 : 1
Pull resistor is enabled on tamper pin.
End of enumeration elements list.
DryIce Pin Direction Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TPD : Tamper Pin Direction
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
#0 : 0
Tamper pin is input
#1 : 1
Tamper pin is output and drives inverse of expected value (tamper pin is asserted)
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
TPOD : Tamper Pin Output Data
bits : 16 - 23 (8 bit)
access : read-only
Enumeration:
#0 : 0
Tamper pin output data is logic zero.
#1 : 1
Tamper pin output data is logic one.
End of enumeration elements list.
DryIce Pin Glitch Filter Register
address_offset : 0x2B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GFW : Glitch Filter Width
bits : 0 - 5 (6 bit)
access : read-write
GFP : Glitch Filter Prescaler
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is clocked by the 512 Hz prescaler clock.
#1 : 1
The glitch filter on tamper pin is clocked by the 32.768 kHz clock.
End of enumeration elements list.
GFE : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is bypassed.
#1 : 1
The glitch filter on tamper pin is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
TPEX : Tamper Pin Expected
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
#00 : 00
Tamper pin expected value is logic zero.
#01 : 01
Tamper pin expected value is active tamper 0 output.
#10 : 10
Tamper pin expected value is active tamper 1 output.
#11 : 11
Tamper pin 0 expected value is active tamper 0 output XORed with active tamper 1 output.
End of enumeration elements list.
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
TPE : Tamper Pull Enable
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pull resistor is disabled on tamper pin.
#1 : 1
Pull resistor is enabled on tamper pin.
End of enumeration elements list.
DryIce Pin Polarity Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TPP : Tamper Pin Polarity
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
#0 : 0
Tamper pin expected value is not inverted.
#1 : 1
Tamper pin expected value is inverted.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
TPID : Tamper Pin Input Data
bits : 16 - 23 (8 bit)
access : read-only
Enumeration:
#0 : 0
Tamper pin input data (before glitch filter) is logic zero.
#1 : 1
Tamper pin input data (before glitch filter) is logic one.
End of enumeration elements list.
Secure Key Register
address_offset : 0x3004 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SK : Secure Key
bits : 0 - 31 (32 bit)
access : read-write
DryIce Secure Key Valid Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SKV : Secure Key Valid
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding Secure Key Register has not been initialized since last invalidation, tamper or reset.
#1 : 1
Corresponding Secure Key Register has been initialized since last invalidation, tamper or reset.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 31 (24 bit)
access : read-only
Secure Key Register
address_offset : 0x400C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SK : Secure Key
bits : 0 - 31 (32 bit)
access : read-write
Secure Key Register
address_offset : 0x5018 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SK : Secure Key
bits : 0 - 31 (32 bit)
access : read-write
DryIce Active Tamper Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ATSR : Active Tamper Shift Register
bits : 0 - 15 (16 bit)
access : read-write
ATP : Active Tamper Polynomial
bits : 16 - 31 (16 bit)
access : read-write
Secure Key Register
address_offset : 0x6028 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SK : Secure Key
bits : 0 - 31 (32 bit)
access : read-write
Secure Key Register
address_offset : 0x703C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SK : Secure Key
bits : 0 - 31 (32 bit)
access : read-write
DryIce Secure Key Write Lock Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SKWL : Secure Key Write Lock
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding Secure Key Register is locked and cannot be written by software.
#1 : 1
Corresponding Secure Key Register can be written by software.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 31 (24 bit)
access : read-only
DryIce Pin Glitch Filter Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GFW : Glitch Filter Width
bits : 0 - 5 (6 bit)
access : read-write
GFP : Glitch Filter Prescaler
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is clocked by the 512 Hz prescaler clock.
#1 : 1
The glitch filter on tamper pin is clocked by the 32.768 kHz clock.
End of enumeration elements list.
GFE : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is bypassed.
#1 : 1
The glitch filter on tamper pin is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
TPEX : Tamper Pin Expected
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
#00 : 00
Tamper pin expected value is logic zero.
#01 : 01
Tamper pin expected value is active tamper 0 output.
#10 : 10
Tamper pin expected value is active tamper 1 output.
#11 : 11
Tamper pin 0 expected value is active tamper 0 output XORed with active tamper 1 output.
End of enumeration elements list.
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
TPE : Tamper Pull Enable
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pull resistor is disabled on tamper pin.
#1 : 1
Pull resistor is enabled on tamper pin.
End of enumeration elements list.
DryIce Write Access Control Register
address_offset : 0x800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 0 (1 bit)
access : read-write
SKVW : Secure Key Valid Write
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the secure key valid register are ignored.
#1 : 1
Writes to the secure key valid register complete as normal.
End of enumeration elements list.
SKWRW : Secure Key Write Lock Register Write
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the Secure Key Write Lock Register are ignored.
#1 : 1
Writes to the Secure Key Write Lock Register complete as normal.
End of enumeration elements list.
SKRRW : Secure Key Read Lock Register Write
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the Secure Key Read Lock Register are ignored.
#1 : 1
Writes to the Secure Key Read Lock Register complete as normal.
End of enumeration elements list.
CRW : Control Register Write
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the Control register are ignored.
#1 : 1
Writes to the Control register complete as normal.
End of enumeration elements list.
SRW : Status Register Write
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the Status register are ignored.
#1 : 1
Writes to the Status register complete as normal.
End of enumeration elements list.
LRW : Lock Register Write
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the Lock register are ignored.
#1 : 1
Writes to the Lock register complete as normal.
End of enumeration elements list.
IEW : Interrupt Enable Write
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the Interrupt enable register are ignored.
#1 : 1
Writes to the Interrupt enable register complete as normal.
End of enumeration elements list.
TSRW : Tamper Seconds Register Write
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the Tamper Seconds register are ignored.
#1 : 1
Writes to the Tamper Seconds register complete as normal.
End of enumeration elements list.
TEW : Tamper Enable Write
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the tamper enable register are ignored.
#1 : 1
Writes to the tamper enable register complete as normal.
End of enumeration elements list.
PDW : Pin Direction Write
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the pin direction register are ignored.
#1 : 1
Writes to the pin direction register complete as normal.
End of enumeration elements list.
PPW : Pin Polarity Write
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the pin polarity register are ignored.
#1 : 1
Writes to the pin polarity register complete as normal.
End of enumeration elements list.
ATW : Active Tamper Write
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the active tamper register are ignored.
#1 : 1
Writes to the active tamper register complete as normal.
End of enumeration elements list.
RESERVED : no description available
bits : 14 - 15 (2 bit)
access : read-only
RESERVED : no description available
bits : 14 - 15 (2 bit)
access : read-only
GFW : Glitch Filter Write
bits : 16 - 23 (8 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the pin glitch filter register are ignored.
#1 : 1
Writes to the pin glitch filter register complete as normal.
End of enumeration elements list.
DryIce Read Access Control Register
address_offset : 0x804 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 0 (1 bit)
access : read-write
SKVR : Secure Key Valid Read
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the secure key valid register are ignored.
#1 : 1
Reads to the secure key valid register complete as normal.
End of enumeration elements list.
SKWRR : Secure Key Write Lock Register Read
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the Secure Key Write Lock Register are ignored.
#1 : 1
Reads to the Secure Key Write Lock Register complete as normal.
End of enumeration elements list.
SKRRR : Secure Key Read Lock Register Read
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the Secure Key Read Lock Register are ignored.
#1 : 1
Reads to the Secure Key Read Lock Register complete as normal.
End of enumeration elements list.
CRR : Control Register Read
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the Control register are ignored.
#1 : 1
Reads to the Control register complete as normal.
End of enumeration elements list.
SRR : Status Register Read
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the Status register are ignored.
#1 : 1
Reads to the Status register complete as normal.
End of enumeration elements list.
LRR : Lock Register Read
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the Lock register are ignored.
#1 : 1
Reads to the Lock register complete as normal.
End of enumeration elements list.
IER : Interrupt Enable Read
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the Interrupt enable register are ignored.
#1 : 1
Reads to the Interrupt enable register complete as normal.
End of enumeration elements list.
TSRR : Tamper Seconds Register Read
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the tamper seconds register are ignored.
#1 : 1
Reads to the tamper seconds register complete as normal.
End of enumeration elements list.
TER : Tamper Enable Read
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the tamper enable register are ignored.
#1 : 1
Reads to the tamper enable register complete as normal.
End of enumeration elements list.
PDR : Pin Direction Read
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the pin direction register are ignored.
#1 : 1
Reads to the pin direction register complete as normal.
End of enumeration elements list.
PPR : Pin Polarity Read
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the pin polarity register are ignored.
#1 : 1
Reads to the pin polarity register complete as normal.
End of enumeration elements list.
ATR : Active Tamper Read
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the active tamper register are ignored.
#1 : 1
Reads to the active tamper register complete as normal.
End of enumeration elements list.
RESERVED : no description available
bits : 14 - 15 (2 bit)
access : read-only
RESERVED : no description available
bits : 14 - 15 (2 bit)
access : read-only
GFR : Glitch Filter Read
bits : 16 - 23 (8 bit)
access : read-write
Enumeration:
#0 : 0
Reads to the pin glitch filter register are ignored.
#1 : 1
Reads to the pin glitch filter register complete as normal.
End of enumeration elements list.
Secure Key Register
address_offset : 0x8054 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SK : Secure Key
bits : 0 - 31 (32 bit)
access : read-write
Secure Key Register
address_offset : 0x9070 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SK : Secure Key
bits : 0 - 31 (32 bit)
access : read-write
DryIce Active Tamper Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ATSR : Active Tamper Shift Register
bits : 0 - 15 (16 bit)
access : read-write
ATP : Active Tamper Polynomial
bits : 16 - 31 (16 bit)
access : read-write
DryIce Secure Key Read Lock Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SKRL : Secure Key Read Lock
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding Secure Key Register is locked and cannot be read by software.
#1 : 1
Corresponding Secure Key Register can be read by software.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 31 (24 bit)
access : read-only
DryIce Pin Glitch Filter Register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GFW : Glitch Filter Width
bits : 0 - 5 (6 bit)
access : read-write
GFP : Glitch Filter Prescaler
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is clocked by the 512 Hz prescaler clock.
#1 : 1
The glitch filter on tamper pin is clocked by the 32.768 kHz clock.
End of enumeration elements list.
GFE : Glitch Filter Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
The glitch filter on tamper pin is bypassed.
#1 : 1
The glitch filter on tamper pin is enabled.
End of enumeration elements list.
RESERVED : no description available
bits : 8 - 15 (8 bit)
access : read-only
TPEX : Tamper Pin Expected
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
#00 : 00
Tamper pin expected value is logic zero.
#01 : 01
Tamper pin expected value is active tamper 0 output.
#10 : 10
Tamper pin expected value is active tamper 1 output.
#11 : 11
Tamper pin 0 expected value is active tamper 0 output XORed with active tamper 1 output.
End of enumeration elements list.
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
RESERVED : no description available
bits : 18 - 23 (6 bit)
access : read-only
TPE : Tamper Pull Enable
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pull resistor is disabled on tamper pin.
#1 : 1
Pull resistor is enabled on tamper pin.
End of enumeration elements list.
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