\n

TSI0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x124 byte (0x0)
mem_usage : registers
protection : not protected

Registers

GENCS

THRESHOLD

CNTR1

CNTR3

SCANC

CNTR5

CNTR7

CNTR9

CNTR11

PEN

CNTR13

CNTR15

WUCNTR


GENCS

General Control and Status Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GENCS GENCS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STPE STM RESERVED RESERVED ESOR ERIE TSIIE TSIEN SWTS SCNIP RESERVED RESERVED OVRF EXTERF OUTRGF EOSF PS NSCN LPSCNITV LPCLKS

STPE : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disable TSI when MCU goes into low power modes.

#1 : 1

Allows TSI to continue running in all low power modes.

End of enumeration elements list.

STM : Scan Trigger Mode. This bit-field can only be changed if the TSI module is disabled (TSIEN bit = 0).
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Software trigger scan.

#1 : 1

Periodical Scan.

End of enumeration elements list.

RESERVED : Reserved
bits : 2 - 2 (1 bit)
access : read-write

RESERVED : no description available
bits : 3 - 3 (1 bit)
access : read-only

ESOR : End-of-Scan or Out-of-Range Interrupt select
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

Out-of-Range interrupt is allowed.

#1 : 1

End-of-Scan interrupt is allowed.

End of enumeration elements list.

ERIE : Error Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Interrupt disabled for error.

#1 : 1

Interrupt enabled for error.

End of enumeration elements list.

TSIIE : Touch Sensing Input Interrupt Module Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Interrupt from TSI is disabled

#1 : 1

Interrupt from TSI is enabled

End of enumeration elements list.

TSIEN : Touch Sensing Input Module Enable
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

TSI module is disabled

#1 : 1

TSI module is enabled

End of enumeration elements list.

SWTS : Software Trigger Start
bits : 8 - 8 (1 bit)
access : write-only

SCNIP : Scan In Progress status
bits : 9 - 9 (1 bit)
access : read-only

RESERVED : no description available
bits : 10 - 11 (2 bit)
access : read-only

RESERVED : no description available
bits : 10 - 11 (2 bit)
access : read-only

OVRF : Overrun error Flag. This flag is set when a scan trigger occurs while a scan is still in progress. Writing "1" to this bit will clear the flag to 0.
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#0 : 0

No over run.

#1 : 1

Over Run occurred.

End of enumeration elements list.

EXTERF : External Electrode error occurred
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

#0 : 0

No fault happend on TSI electrodes

#1 : 1

Short to VDD or VSS was detected on one or more electrodes.

End of enumeration elements list.

OUTRGF : Out of Range Flag.
bits : 14 - 14 (1 bit)
access : read-write

EOSF : End of Scan Flag.
bits : 15 - 15 (1 bit)
access : read-write

PS : Electrode Oscillator prescaler. .
bits : 16 - 18 (3 bit)
access : read-write

Enumeration:

#000 : 000

Electrode Oscillator Frequency divided by 1

#001 : 001

Electrode Oscillator Frequency divided by 2

#010 : 010

Electrode Oscillator Frequency divided by 4

#011 : 011

Electrode Oscillator Frequency divided by 8

#100 : 100

Electrode Oscillator Frequency divided by 16

#101 : 101

Electrode Oscillator Frequency divided by 32

#110 : 110

Electrode Oscillator Frequency divided by 64

#111 : 111

Electrode Oscillator Frequency divided by 128

End of enumeration elements list.

NSCN : Number of Consecutive Scans per Electrode electrode.
bits : 19 - 23 (5 bit)
access : read-write

Enumeration:

#00000 : 00000

Once per electrode

#00001 : 00001

Twice per electrode

#00010 : 00010

3 times per electrode

#00011 : 00011

4 times per electrode

#00100 : 00100

5 times per electrode

#00101 : 00101

6 times per electrode

#00110 : 00110

7 times per electrode

#00111 : 00111

8 times per electrode

#01000 : 01000

9 times per electrode

#01001 : 01001

10 times per electrode

#01010 : 01010

11 times per electrode

#01011 : 01011

12 times per electrode

#01100 : 01100

13 times per electrode

#01101 : 01101

14 times per electrode

#01110 : 01110

15 times per electrode

#01111 : 01111

16 times per electrode

#10000 : 10000

17 times per electrode

#10001 : 10001

18 times per electrode

#10010 : 10010

19 times per electrode

#10011 : 10011

20 times per electrode

#10100 : 10100

21 times per electrode

#10101 : 10101

22 times per electrode

#10110 : 10110

23 times per electrode

#10111 : 10111

24 times per electrode

#11000 : 11000

25 times per electrode

#11001 : 11001

26 times per electrode

#11010 : 11010

27 times per electrode

#11011 : 11011

28 times per electrode

#11100 : 11100

29 times per electrode

#11101 : 11101

30 times per electrode

#11110 : 11110

31 times per electrode

#11111 : 11111

32 times per electrode

End of enumeration elements list.

LPSCNITV : TSI Low Power Mode Scan Interval.
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

#0000 : 0000

1 ms scan interval

#0001 : 0001

5 ms scan interval

#0010 : 0010

10 ms scan interval

#0011 : 0011

15 ms scan interval

#0100 : 0100

20 ms scan interval

#0101 : 0101

30 ms scan interval

#0110 : 0110

40 ms scan interval

#0111 : 0111

50 ms scan interval

#1000 : 1000

75 ms scan interval

#1001 : 1001

100 ms scan interval

#1010 : 1010

125 ms scan interval

#1011 : 1011

150 ms scan interval

#1100 : 1100

200 ms scan interval

#1101 : 1101

300 ms scan interval

#1110 : 1110

400 ms scan interval

#1111 : 1111

500 ms scan interval

End of enumeration elements list.

LPCLKS : Low Power Mode Clock Source Selection.
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

#0 : 0

LPOCLK is selected to determine the scan period in low power mode

#1 : 1

VLPOSCCLK is selected to determine the scan period in low power mode

End of enumeration elements list.


THRESHOLD

Low Power Channel Threshold Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

THRESHOLD THRESHOLD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HTHH LTHH

HTHH : Touch Sensing Channel High Threshold value
bits : 0 - 15 (16 bit)
access : read-write

LTHH : Touch Sensing Channel Low Threshold value
bits : 16 - 31 (16 bit)
access : read-write


CNTR1

Counter Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CNTR1 CNTR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTN1 CTN

CTN1 : TouchSensing Channel n-1 16-bit counter value
bits : 0 - 15 (16 bit)
access : read-only

CTN : TouchSensing Channel n 16-bit counter value
bits : 16 - 31 (16 bit)
access : read-only


CNTR3

Counter Register
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CNTR3 CNTR3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTN1 CTN

CTN1 : TouchSensing Channel n-1 16-bit counter value
bits : 0 - 15 (16 bit)
access : read-only

CTN : TouchSensing Channel n 16-bit counter value
bits : 16 - 31 (16 bit)
access : read-only


SCANC

SCAN Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCANC SCANC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AMPSC AMCLKS RESERVED RESERVED SMOD EXTCHRG RESERVED RESERVED REFCHRG

AMPSC : Active Mode Prescaler
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

#000 : 000

Input Clock Source divided by 1.

#001 : 001

Input Clock Source divided by 2.

#010 : 010

Input Clock Source divided by 4.

#011 : 011

Input Clock Source divided by 8.

#100 : 100

Input Clock Source divided by 16.

#101 : 101

Input Clock Source divided by 32.

#110 : 110

Input Clock Source divided by 64.

#111 : 111

Input Clock Source divided by 128.

End of enumeration elements list.

AMCLKS : Active Mode Clock Source
bits : 3 - 4 (2 bit)
access : read-write

Enumeration:

#00 : 00

LPOSCCLK

#01 : 01

MCGIRCLK.

#10 : 10

OSC0ERCLK.

#11 : 11

Not valid.

End of enumeration elements list.

RESERVED : no description available
bits : 5 - 5 (1 bit)
access : read-only

RESERVED : no description available
bits : 6 - 7 (2 bit)
access : read-only

SMOD : Scan Module
bits : 8 - 15 (8 bit)
access : read-write

Enumeration:

#00000000 : 00000000

Continue Scan.

End of enumeration elements list.

EXTCHRG : External OSC Charge Current select
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

#0000 : 0000

2 uA charge current.

#0001 : 0001

4 uA charge current.

#0010 : 0010

6 uA charge current.

#0011 : 0011

8 uA charge current.

#0100 : 0100

10 uA charge current.

#0101 : 0101

12 uA charge current.

#0110 : 0110

14 uA charge current.

#0111 : 0111

16 uA charge current.

#1000 : 1000

18 uA charge current.

#1001 : 1001

20 uA charge current.

#1010 : 1010

22 uA charge current.

#1011 : 1011

24 uA charge current.

#1100 : 1100

26 uA charge current.

#1101 : 1101

28 uA charge current.

#1110 : 1110

30 uA charge current.

#1111 : 1111

32 uA charge current.

End of enumeration elements list.

RESERVED : no description available
bits : 20 - 23 (4 bit)
access : read-only

RESERVED : no description available
bits : 20 - 23 (4 bit)
access : read-only

REFCHRG : Ref OSC Charge Current select
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

#0000 : 0000

2 uA charge current.

#0001 : 0001

4 uA charge current.

#0010 : 0010

6 uA charge current.

#0011 : 0011

8 uA charge current.

#0100 : 0100

10 uA charge current.

#0101 : 0101

12 uA charge current.

#0110 : 0110

14 uA charge current.

#0111 : 0111

16 uA charge current.

#1000 : 1000

18 uA charge current.

#1001 : 1001

20 uA charge current.

#1010 : 1010

22 uA charge current.

#1011 : 1011

24 uA charge current.

#1100 : 1100

26 uA charge current.

#1101 : 1101

28 uA charge current.

#1110 : 1110

30 uA charge current.

#1111 : 1111

32 uA charge current.

End of enumeration elements list.


CNTR5

Counter Register
address_offset : 0x40C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CNTR5 CNTR5 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTN1 CTN

CTN1 : TouchSensing Channel n-1 16-bit counter value
bits : 0 - 15 (16 bit)
access : read-only

CTN : TouchSensing Channel n 16-bit counter value
bits : 16 - 31 (16 bit)
access : read-only


CNTR7

Counter Register
address_offset : 0x518 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CNTR7 CNTR7 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTN1 CTN

CTN1 : TouchSensing Channel n-1 16-bit counter value
bits : 0 - 15 (16 bit)
access : read-only

CTN : TouchSensing Channel n 16-bit counter value
bits : 16 - 31 (16 bit)
access : read-only


CNTR9

Counter Register
address_offset : 0x628 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CNTR9 CNTR9 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTN1 CTN

CTN1 : TouchSensing Channel n-1 16-bit counter value
bits : 0 - 15 (16 bit)
access : read-only

CTN : TouchSensing Channel n 16-bit counter value
bits : 16 - 31 (16 bit)
access : read-only


CNTR11

Counter Register
address_offset : 0x73C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CNTR11 CNTR11 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTN1 CTN

CTN1 : TouchSensing Channel n-1 16-bit counter value
bits : 0 - 15 (16 bit)
access : read-only

CTN : TouchSensing Channel n 16-bit counter value
bits : 16 - 31 (16 bit)
access : read-only


PEN

Pin Enable Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PEN PEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEN0 PEN1 PEN2 PEN3 PEN4 PEN5 PEN6 PEN7 PEN8 PEN9 PEN10 PEN11 PEN12 PEN13 PEN14 PEN15 LPSP RESERVED

PEN0 : Touch Sensing Input Pin Enable Register 0
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN1 : Touch Sensing Input Pin Enable Register 1
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN2 : Touch Sensing Input Pin Enable Register 2
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN3 : Touch Sensing Input Pin Enable Register 3
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN4 : Touch Sensing Input Pin Enable Register 4
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN5 : Touch Sensing Input Pin Enable Register 5
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN6 : Touch Sensing Input Pin Enable Register 6
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN7 : Touch Sensing Input Pin Enable Register 7
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN8 : Touch Sensing Input Pin Enable Register 8
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN9 : Touch Sensing Input Pin Enable Register 9
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN10 : Touch Sensing Input Pin Enable Register 10
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN11 : Touch Sensing Input Pin Enable Register 11
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN12 : Touch Sensing Input Pin Enable Register 12
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN13 : Touch Sensing Input Pin Enable Register 13
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN14 : Touch Sensing Input Pin Enable Register 14
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

PEN15 : Touch Sensing Input Pin Enable Register 15
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

#0 : 0

The corresponding pin is not used by TSI.

#1 : 1

The corresponding pin is used by TSI.

End of enumeration elements list.

LPSP : Low Power Scan Pin
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

#0000 : 0000

TSI_IN[0] is active in low power mode.

#0001 : 0001

TSI_IN[1] is active in low power mode.

#0010 : 0010

TSI_IN[2] is active in low power mode.

#0011 : 0011

TSI_IN[3] is active in low power mode.

#0100 : 0100

TSI_IN[4] is active in low power mode.

#0101 : 0101

TSI_IN[5] is active in low power mode.

#0110 : 0110

TSI_IN[6] is active in low power mode.

#0111 : 0111

TSI_IN[7] is active in low power mode.

#1000 : 1000

TSI_IN[8] is active in low power mode.

#1001 : 1001

TSI_IN[9] is active in low power mode.

#1010 : 1010

TSI_IN[10] is active in low power mode.

#1011 : 1011

TSI_IN[11] is active in low power mode.

#1100 : 1100

TSI_IN[12] is active in low power mode.

#1101 : 1101

TSI_IN[13] is active in low power mode.

#1110 : 1110

TSI_IN[14] is active in low power mode.

#1111 : 1111

TSI_IN[15] is active in low power mode.

End of enumeration elements list.

RESERVED : no description available
bits : 20 - 31 (12 bit)
access : read-only


CNTR13

Counter Register
address_offset : 0x854 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CNTR13 CNTR13 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTN1 CTN

CTN1 : TouchSensing Channel n-1 16-bit counter value
bits : 0 - 15 (16 bit)
access : read-only

CTN : TouchSensing Channel n 16-bit counter value
bits : 16 - 31 (16 bit)
access : read-only


CNTR15

Counter Register
address_offset : 0x970 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CNTR15 CNTR15 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTN1 CTN

CTN1 : TouchSensing Channel n-1 16-bit counter value
bits : 0 - 15 (16 bit)
access : read-only

CTN : TouchSensing Channel n 16-bit counter value
bits : 16 - 31 (16 bit)
access : read-only


WUCNTR

Wake-Up Channel Counter Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

WUCNTR WUCNTR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WUCNT RESERVED

WUCNT : TouchSensing wake-up Channel 16bit counter value
bits : 0 - 15 (16 bit)
access : read-only

RESERVED : no description available
bits : 16 - 31 (16 bit)
access : read-only



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.