Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x5C byte (0x0)
mem_usage : registers
protection : not protected
Version ID Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FEATURE : Feature Number
bits : 0 - 15 (16 bit)
access : read-only
MINOR : Minor Version Number
bits : 16 - 23 (8 bit)
access : read-only
MAJOR : Major Version Number
bits : 24 - 31 (8 bit)
access : read-only
Module Interrupt Enable Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIE0 : Channel 0 Timer Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Interrupt generation is disabled
#1 : 1
Interrupt generation is enabled
End of enumeration elements list.
TIE1 : Channel 1 Timer Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Interrupt generation is disabled
#1 : 1
Interrupt generation is enabled
End of enumeration elements list.
TIE2 : Channel 2 Timer Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Interrupt generation is disabled
#1 : 1
Interrupt generation is enabled
End of enumeration elements list.
TIE3 : Channel 3 Timer Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Interrupt generation is disabled
#1 : 1
Interrupt generation is enabled
End of enumeration elements list.
Timer Value Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMR_VAL : Timer Value
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
#0 : 0
Invalid load value in compare modes
End of enumeration elements list.
Current Timer Value
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TMR_CUR_VAL : Current Timer Value
bits : 0 - 31 (32 bit)
access : read-only
Timer Control Register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
T_EN : Timer Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer Channel is disabled
#1 : 1
Timer Channel is enabled
End of enumeration elements list.
CHAIN : Chain Channel
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Channel Chaining is disabled. Channel Timer runs independently.
#1 : 1
Channel Chaining is enabled. Timer decrements on previous channel's timeout
End of enumeration elements list.
MODE : Timer Operation Mode
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
#00 : 00
32-bit Periodic Counter
#01 : 01
Dual 16-bit Periodic Counter
#10 : 10
32-bit Trigger Accumulator
#11 : 11
32-bit Trigger Input Capture
End of enumeration elements list.
TSOT : Timer Start On Trigger
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)
#1 : 1
Timer starts to decrement when rising edge on selected trigger is detected
End of enumeration elements list.
TSOI : Timer Stop On Interrupt
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer does not stop after timeout
#1 : 1
Timer will stop after timeout and will restart after rising edge on the T_EN bit is detected (i.e. timer channel is disabled and then enabled)
End of enumeration elements list.
TROT : Timer Reload On Trigger
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer will not reload on selected trigger
#1 : 1
Timer will reload on selected trigger
End of enumeration elements list.
TRG_SRC : Trigger Source
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Trigger source selected in external
#1 : 1
Trigger source selected is the internal trigger
End of enumeration elements list.
TRG_SEL : Trigger Select
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
#0000 : 0
Timer channel 0 trigger source is selected
#0001 : 1
Timer channel 1 trigger source is selected
#0010 : 10
Timer channel 2 trigger source is selected
End of enumeration elements list.
Set Timer Enable Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SET_T_EN_0 : Set Timer 0 Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
No effect
#1 : 1
Enables the Timer Channel 0
End of enumeration elements list.
SET_T_EN_1 : Set Timer 1 Enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
No Effect
#1 : 1
Enables the Timer Channel 1
End of enumeration elements list.
SET_T_EN_2 : Set Timer 2 Enable
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
No Effect
#1 : 1
Enables the Timer Channel 2
End of enumeration elements list.
SET_T_EN_3 : Set Timer 3 Enable
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
No effect
#1 : 1
Enables the Timer Channel 3
End of enumeration elements list.
Clear Timer Enable Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLR_T_EN_0 : Clear Timer 0 Enable
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
#0 : 0
No action
#1 : 1
Clear T_EN bit for Timer Channel 0
End of enumeration elements list.
CLR_T_EN_1 : Clear Timer 1 Enable
bits : 1 - 1 (1 bit)
access : write-only
Enumeration:
#0 : 0
No Action
#1 : 1
Clear T_EN bit for Timer Channel 1
End of enumeration elements list.
CLR_T_EN_2 : Clear Timer 2 Enable
bits : 2 - 2 (1 bit)
access : write-only
Enumeration:
#0 : 0
No Action
#1 : 1
Clear T_EN bit for Timer Channel 2
End of enumeration elements list.
CLR_T_EN_3 : Clear Timer 3 Enable
bits : 3 - 3 (1 bit)
access : write-only
Enumeration:
#0 : 0
No Action
#1 : 1
Clear T_EN bit for Timer Channel 3
End of enumeration elements list.
Parameter Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CHANNEL : Number of Timer Channels
bits : 0 - 7 (8 bit)
access : read-only
EXT_TRIG : Number of External Trigger Inputs
bits : 8 - 15 (8 bit)
access : read-only
Timer Value Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMR_VAL : Timer Value
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
#0 : 0
Invalid load value in compare modes
End of enumeration elements list.
Current Timer Value
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TMR_CUR_VAL : Current Timer Value
bits : 0 - 31 (32 bit)
access : read-only
Timer Control Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
T_EN : Timer Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer Channel is disabled
#1 : 1
Timer Channel is enabled
End of enumeration elements list.
CHAIN : Chain Channel
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Channel Chaining is disabled. Channel Timer runs independently.
#1 : 1
Channel Chaining is enabled. Timer decrements on previous channel's timeout
End of enumeration elements list.
MODE : Timer Operation Mode
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
#00 : 00
32-bit Periodic Counter
#01 : 01
Dual 16-bit Periodic Counter
#10 : 10
32-bit Trigger Accumulator
#11 : 11
32-bit Trigger Input Capture
End of enumeration elements list.
TSOT : Timer Start On Trigger
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)
#1 : 1
Timer starts to decrement when rising edge on selected trigger is detected
End of enumeration elements list.
TSOI : Timer Stop On Interrupt
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer does not stop after timeout
#1 : 1
Timer will stop after timeout and will restart after rising edge on the T_EN bit is detected (i.e. timer channel is disabled and then enabled)
End of enumeration elements list.
TROT : Timer Reload On Trigger
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer will not reload on selected trigger
#1 : 1
Timer will reload on selected trigger
End of enumeration elements list.
TRG_SRC : Trigger Source
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Trigger source selected in external
#1 : 1
Trigger source selected is the internal trigger
End of enumeration elements list.
TRG_SEL : Trigger Select
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
#0000 : 0
Timer channel 0 trigger source is selected
#0001 : 1
Timer channel 1 trigger source is selected
#0010 : 10
Timer channel 2 trigger source is selected
End of enumeration elements list.
Timer Value Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMR_VAL : Timer Value
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
#0 : 0
Invalid load value in compare modes
End of enumeration elements list.
Current Timer Value
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TMR_CUR_VAL : Current Timer Value
bits : 0 - 31 (32 bit)
access : read-only
Module Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
M_CEN : Module Clock Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Protocol clock to timers is disabled
#1 : 1
Protocol clock to timers is enabled
End of enumeration elements list.
SW_RST : Software Reset Bit
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer channels and registers are not reset
#1 : 1
Timer channels and registers are reset
End of enumeration elements list.
DOZE_EN : DOZE Mode Enable Bit
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer channels are stopped in DOZE mode
#1 : 1
Timer channels continue to run in DOZE mode
End of enumeration elements list.
DBG_EN : Debug Enable Bit
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer channels are stopped in Debug mode
#1 : 1
Timer channels continue to run in Debug mode
End of enumeration elements list.
Timer Control Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
T_EN : Timer Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer Channel is disabled
#1 : 1
Timer Channel is enabled
End of enumeration elements list.
CHAIN : Chain Channel
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Channel Chaining is disabled. Channel Timer runs independently.
#1 : 1
Channel Chaining is enabled. Timer decrements on previous channel's timeout
End of enumeration elements list.
MODE : Timer Operation Mode
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
#00 : 00
32-bit Periodic Counter
#01 : 01
Dual 16-bit Periodic Counter
#10 : 10
32-bit Trigger Accumulator
#11 : 11
32-bit Trigger Input Capture
End of enumeration elements list.
TSOT : Timer Start On Trigger
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)
#1 : 1
Timer starts to decrement when rising edge on selected trigger is detected
End of enumeration elements list.
TSOI : Timer Stop On Interrupt
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer does not stop after timeout
#1 : 1
Timer will stop after timeout and will restart after rising edge on the T_EN bit is detected (i.e. timer channel is disabled and then enabled)
End of enumeration elements list.
TROT : Timer Reload On Trigger
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer will not reload on selected trigger
#1 : 1
Timer will reload on selected trigger
End of enumeration elements list.
TRG_SRC : Trigger Source
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Trigger source selected in external
#1 : 1
Trigger source selected is the internal trigger
End of enumeration elements list.
TRG_SEL : Trigger Select
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
#0000 : 0
Timer channel 0 trigger source is selected
#0001 : 1
Timer channel 1 trigger source is selected
#0010 : 10
Timer channel 2 trigger source is selected
End of enumeration elements list.
Timer Value Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMR_VAL : Timer Value
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
#0 : 0
Invalid load value in compare modes
End of enumeration elements list.
Module Status Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIF0 : Channel 0 Timer Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer has not timed out
#1 : 1
Timeout has occurred
End of enumeration elements list.
TIF1 : Channel 1 Timer Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer has not timed out
#1 : 1
Timeout has occurred
End of enumeration elements list.
TIF2 : Channel 2 Timer Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer has not timed out
#1 : 1
Timeout has occurred
End of enumeration elements list.
TIF3 : Channel 3 Timer Interrupt Flag
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer has not timed out
#1 : 1
Timeout has occurred
End of enumeration elements list.
Current Timer Value
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TMR_CUR_VAL : Current Timer Value
bits : 0 - 31 (32 bit)
access : read-only
Timer Control Register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
T_EN : Timer Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer Channel is disabled
#1 : 1
Timer Channel is enabled
End of enumeration elements list.
CHAIN : Chain Channel
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Channel Chaining is disabled. Channel Timer runs independently.
#1 : 1
Channel Chaining is enabled. Timer decrements on previous channel's timeout
End of enumeration elements list.
MODE : Timer Operation Mode
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
#00 : 00
32-bit Periodic Counter
#01 : 01
Dual 16-bit Periodic Counter
#10 : 10
32-bit Trigger Accumulator
#11 : 11
32-bit Trigger Input Capture
End of enumeration elements list.
TSOT : Timer Start On Trigger
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer starts to decrement immediately based on restart condition (controlled by TSOI bit)
#1 : 1
Timer starts to decrement when rising edge on selected trigger is detected
End of enumeration elements list.
TSOI : Timer Stop On Interrupt
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer does not stop after timeout
#1 : 1
Timer will stop after timeout and will restart after rising edge on the T_EN bit is detected (i.e. timer channel is disabled and then enabled)
End of enumeration elements list.
TROT : Timer Reload On Trigger
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer will not reload on selected trigger
#1 : 1
Timer will reload on selected trigger
End of enumeration elements list.
TRG_SRC : Trigger Source
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
Trigger source selected in external
#1 : 1
Trigger source selected is the internal trigger
End of enumeration elements list.
TRG_SEL : Trigger Select
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
#0000 : 0
Timer channel 0 trigger source is selected
#0001 : 1
Timer channel 1 trigger source is selected
#0010 : 10
Timer channel 2 trigger source is selected
End of enumeration elements list.
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