\n
address_offset : 0x0 Bytes (0x0)
size : 0x10F0 byte (0x0)
mem_usage : registers
protection : not protected
System Options Register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
USBVSTBY : USB voltage regulator in standby mode during VLPR and VLPW modes
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
USB voltage regulator not in standby during VLPR and VLPW modes.
#1 : 1
USB voltage regulator in standby during VLPR and VLPW modes.
End of enumeration elements list.
USBSSTBY : USB voltage regulator in standby mode during Stop, VLPS, LLS and VLLS modes.
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
USB voltage regulator not in standby during Stop, VLPS, LLS and VLLS modes.
#1 : 1
USB voltage regulator in standby during Stop, VLPS, LLS and VLLS modes.
End of enumeration elements list.
USBREGEN : USB voltage regulator enable
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
USB voltage regulator is disabled.
#1 : 1
USB voltage regulator is enabled.
End of enumeration elements list.
System Device Identification Register
address_offset : 0x1024 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PINID : Pin count identification
bits : 0 - 3 (4 bit)
access : read-only
Enumeration:
#0000 : 0000
16-pin
#0001 : 0001
24-pin
#0010 : 0010
32-pin
#0011 : 0011
36-pin
#0100 : 0100
48-pin
#0101 : 0101
64-pin
#0110 : 0110
80-pin
#1000 : 1000
100-pin
#1001 : 1001
121-pin
#1011 : 1011
Custom pin-out(WLCSP)
End of enumeration elements list.
KEYATT : Core configuration of the device.
bits : 4 - 6 (3 bit)
access : read-only
Enumeration:
#000 : 000
Cortex CM0+ Core
#001 : 001
Cortex CM0+ Core with additional Core (Core0 and Core1)
End of enumeration elements list.
DIEID : Device Die Number
bits : 7 - 11 (5 bit)
access : read-only
REVID : Device Revision Number
bits : 12 - 15 (4 bit)
access : read-only
SRAMSIZE : System SRAM Size
bits : 16 - 19 (4 bit)
access : read-only
Enumeration:
#1000 : 1000
96 KB
#1001 : 1001
128 KB
End of enumeration elements list.
SERIESID : Kinetis Series ID
bits : 20 - 23 (4 bit)
access : read-only
Enumeration:
#0001 : 0001
KL family
End of enumeration elements list.
SUBFAMID : Kinetis Sub-Family ID
bits : 24 - 27 (4 bit)
access : read-only
Enumeration:
#0010 : 0010
KLx2 Subfamily
#0011 : 0011
KLx3 Subfamily
#0100 : 0100
KLx4 Subfamily
#0101 : 0101
KLx5 Subfamily
#0110 : 0110
KLx6 Subfamily
#0111 : 0111
KLx7 Subfamily
#1000 : 1000
KLx8 Subfamily
#1001 : 1001
KLx9 Subfamily
End of enumeration elements list.
FAMID : Kinetis family ID
bits : 28 - 31 (4 bit)
access : read-only
Enumeration:
#0010 : 0010
KL2x Family (USB)
End of enumeration elements list.
Flash Configuration Register 1
address_offset : 0x104C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FLASHDIS : Flash Disable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Flash is enabled.
#1 : 1
Flash is disabled.
End of enumeration elements list.
FLASHDOZE : Flash Doze
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Flash remains enabled during Doze mode.
#1 : 1
Flash is disabled for the duration of Doze mode.
End of enumeration elements list.
PFSIZE : Program Flash Size
bits : 24 - 27 (4 bit)
access : read-only
Enumeration:
#0101 : 0101
64 KB of program flash memory, 2 KB protection region
#0111 : 0111
128 KB of program flash memory, 4 KB protection region
#1001 : 1001
256 KB of program flash memory, 8 KB protection region
#1011 : 1011
512 KB of program flash memory, 16 KB protection region
End of enumeration elements list.
Flash Configuration Register 2
address_offset : 0x1050 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MAXADDR0 : Max Address lock
bits : 24 - 30 (7 bit)
access : read-only
Unique Identification Register Mid-High
address_offset : 0x1058 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
UID : Unique Identification
bits : 0 - 15 (16 bit)
access : read-only
Unique Identification Register Mid Low
address_offset : 0x105C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
UID : Unique Identification
bits : 0 - 31 (32 bit)
access : read-only
Unique Identification Register Low
address_offset : 0x1060 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
UID : Unique Identification
bits : 0 - 31 (32 bit)
access : read-only
Peripheral Clock Status Register
address_offset : 0x10EC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CS1 : Clock Source 1
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
Clock not ready.
#1 : 1
Clock ready.
End of enumeration elements list.
CS2 : Clock Source 2
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
#0 : 0
Clock not ready.
#1 : 1
Clock ready.
End of enumeration elements list.
CS3 : Clock Source 3
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
#0 : 0
Clock not ready.
#1 : 1
Clock ready.
End of enumeration elements list.
CS4 : Clock Source 4
bits : 4 - 4 (1 bit)
access : read-only
Enumeration:
#0 : 0
Clock not ready.
#1 : 1
Clock ready.
End of enumeration elements list.
CS5 : Clock Source 5
bits : 5 - 5 (1 bit)
access : read-only
Enumeration:
#0 : 0
Clock not ready.
#1 : 1
Clock ready.
End of enumeration elements list.
CS6 : Clock Source 6
bits : 6 - 6 (1 bit)
access : read-only
Enumeration:
#0 : 0
Clock not ready.
#1 : 1
Clock ready.
End of enumeration elements list.
CS7 : Clock Source 7
bits : 7 - 7 (1 bit)
access : read-only
Enumeration:
#0 : 0
Clock not ready.
#1 : 1
Clock ready.
End of enumeration elements list.
SOPT1 Configuration Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
URWE : USB voltage regulator enable write enable
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
SOPT1 USBREGEN cannot be written.
#1 : 1
SOPT1 USBREGEN can be written.
End of enumeration elements list.
UVSWE : USB voltage regulator VLP standby write enable
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
SOPT1 USBVSTB cannot be written.
#1 : 1
SOPT1 USBVSTB can be written.
End of enumeration elements list.
USSWE : USB voltage regulator stop standby write enable
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
SOPT1 USBSSTB cannot be written.
#1 : 1
SOPT1 USBSSTB can be written.
End of enumeration elements list.
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.