\n
address_offset : 0x0 Bytes (0x0)
size : 0x30 byte (0x0)
mem_usage : registers
protection : not protected
SYSCFG configuration register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MEM_MODE : Memory mapping selection bits
bits : 0 - 1 (2 bit)
PA11_PA12_RMP : PA11 and PA12 remapping bit.
bits : 4 - 4 (1 bit)
IR_POL : IR output polarity selection
bits : 5 - 5 (1 bit)
IR_MOD : IR Modulation Envelope signal selection.
bits : 6 - 7 (2 bit)
BOOSTEN : I/O analog switch voltage booster enable
bits : 8 - 8 (1 bit)
I2C_PBx_FMP : Fast Mode Plus (FM+) driving capability activation bits
bits : 16 - 19 (4 bit)
I2C1_FMP : FM+ driving capability activation for I2C1
bits : 20 - 20 (1 bit)
I2C2_FMP : FM+ driving capability activation for I2C2
bits : 21 - 21 (1 bit)
I2C_PAx_FMP : Fast Mode Plus (FM+) driving capability activation bits
bits : 22 - 23 (2 bit)
SYSCFG configuration register 1
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LOCKUP_LOCK : Cortex-M0+ LOCKUP bit enable bit
bits : 0 - 0 (1 bit)
SRAM_PARITY_LOCK : SRAM parity lock bit
bits : 1 - 1 (1 bit)
PVD_LOCK : PVD lock enable bit
bits : 2 - 2 (1 bit)
ECC_LOCK : ECC error lock bit
bits : 3 - 3 (1 bit)
SRAM_PEF : SRAM parity error flag
bits : 8 - 8 (1 bit)
PA1_CDEN : PA1_CDEN
bits : 16 - 16 (1 bit)
PA3_CDEN : PA3_CDEN
bits : 17 - 17 (1 bit)
PA5_CDEN : PA5_CDEN
bits : 18 - 18 (1 bit)
PA6_CDEN : PA6_CDEN
bits : 19 - 19 (1 bit)
PA13_CDEN : PA13_CDEN
bits : 20 - 20 (1 bit)
PB0_CDEN : PB0_CDEN
bits : 21 - 21 (1 bit)
PB1_CDEN : PB1_CDEN
bits : 22 - 22 (1 bit)
PB2_CDEN : PB2_CDEN
bits : 23 - 23 (1 bit)
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