Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x38 byte (0x0)
mem_usage : registers
protection : not protected
Version ID register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FEATURE : Feature Specification Number
bits : 0 - 15 (16 bit)
access : read-only
Enumeration:
#0 : 0
Standard features implemented
End of enumeration elements list.
MINOR : Minor Version Number
bits : 16 - 23 (8 bit)
access : read-only
MAJOR : Major Version Number
bits : 24 - 31 (8 bit)
access : read-only
Regulator Status And Control register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BGBE : Bandgap Buffer Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Bandgap buffer not enabled
#1 : 1
Bandgap buffer enabled
End of enumeration elements list.
REGONS : Regulator In Run Regulation Status
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
#0 : 0
Regulator is in stop regulation or in transition to/from it
#1 : 1
Regulator is in run regulation
End of enumeration elements list.
ACKISO : Acknowledge Isolation
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Peripherals and I/O pads are in normal run state.
#1 : 1
Certain peripherals and I/O pads are in an isolated and latched state.
End of enumeration elements list.
BGEN : Bandgap Enable In VLPx Operation
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Bandgap voltage reference is disabled in VLPx , LLS , and VLLSx modes.
#1 : 1
Bandgap voltage reference is enabled in VLPx , LLS , and VLLSx modes.
End of enumeration elements list.
VLPO : VLPx Option
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Operating frequencies and SCG clocking modes are restricted during VLPx modes as listed in the Power Management chapter.
#1 : 1
If BGEN is also set, operating frequencies and SCG clocking modes are unrestricted during VLPx modes. Note that flash access frequency is still restricted however.
End of enumeration elements list.
High Voltage Detect Status And Control 1 register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HVDV : High-Voltage Detect Voltage Select
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Low trip point selected (V HVD = V HVDL )
#1 : 1
High trip point selected (V HVD = V HVDH )
End of enumeration elements list.
HVDRE : High-Voltage Detect Reset Enable
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
HVDF does not generate hardware resets
#1 : 1
Force an MCU reset when HVDF = 1
End of enumeration elements list.
HVDIE : High-Voltage Detect Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Hardware interrupt disabled (use polling)
#1 : 1
Request a hardware interrupt when HVDF = 1
End of enumeration elements list.
HVDACK : High-Voltage Detect Acknowledge
bits : 6 - 6 (1 bit)
access : write-only
HVDF : High-Voltage Detect Flag
bits : 7 - 7 (1 bit)
access : read-only
Enumeration:
#0 : 0
High-voltage event not detected
#1 : 1
High-voltage event detected
End of enumeration elements list.
Parameter register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
VLPOE : VLPO Enable
bits : 0 - 0 (1 bit)
access : read-only
HVDE : HVD Enabled
bits : 1 - 1 (1 bit)
access : read-only
Low Voltage Detect Status And Control 1 register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LVDV : Low-Voltage Detect Voltage Select
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
#00 : 00
Low trip point selected (V LVD = V LVDL )
#01 : 01
High trip point selected (V LVD = V LVDH )
End of enumeration elements list.
LVDRE : Low-Voltage Detect Reset Enable
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
LVDF does not generate hardware resets
#1 : 1
Force an MCU reset when LVDF = 1
End of enumeration elements list.
LVDIE : Low-Voltage Detect Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Hardware interrupt disabled (use polling)
#1 : 1
Request a hardware interrupt when LVDF = 1
End of enumeration elements list.
LVDACK : Low-Voltage Detect Acknowledge
bits : 6 - 6 (1 bit)
access : write-only
LVDF : Low-Voltage Detect Flag
bits : 7 - 7 (1 bit)
access : read-only
Enumeration:
#0 : 0
Low-voltage event not detected
#1 : 1
Low-voltage event detected
End of enumeration elements list.
Low Voltage Detect Status And Control 2 register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LVWV : Low-Voltage Warning Voltage Select
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
#00 : 00
Low trip point selected (VLVW = VLVW1)
#01 : 01
Mid 1 trip point selected (VLVW = VLVW2)
#10 : 10
Mid 2 trip point selected (VLVW = VLVW3)
#11 : 11
High trip point selected (VLVW = VLVW4)
End of enumeration elements list.
LVWIE : Low-Voltage Warning Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Hardware interrupt disabled (use polling)
#1 : 1
Request a hardware interrupt when LVWF = 1
End of enumeration elements list.
LVWACK : Low-Voltage Warning Acknowledge
bits : 6 - 6 (1 bit)
access : write-only
LVWF : Low-Voltage Warning Flag
bits : 7 - 7 (1 bit)
access : read-only
Enumeration:
#0 : 0
Low-voltage warning event not detected
#1 : 1
Low-voltage warning event detected
End of enumeration elements list.
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