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LCD

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x60 byte (0x0)
mem_usage : registers
protection : not protected

Registers

GCR

PENL

WF3TO0

WF0

WF1

WF2

WF3

WF7TO4

WF4

WF5

WF6

WF7

WF11TO8

WF8

WF9

WF10

WF11

WF15TO12

WF12

WF13

WF14

WF15

BPENL

WF19TO16

WF16

WF17

WF18

WF19

PENH

WF23TO20

WF20

WF21

WF22

WF23

WF27TO24

WF24

WF25

WF26

WF27

WF31TO28

WF28

WF29

WF30

WF31

AR

WF35TO32

WF32

WF33

WF34

WF35

WF39TO36

WF36

WF37

WF38

WF39

WF43TO40

WF40

WF41

WF42

WF43

BPENH

WF47TO44

WF44

WF45

WF46

WF47

WF51TO48

WF48

WF49

WF50

WF51

WF55TO52

WF52

WF53

WF54

WF55

WF59TO56

WF56

WF57

WF58

WF59

WF63TO60

WF60

WF61

WF62

WF63

FDCR

FDSR


GCR

LCD General Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GCR GCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DUTY LCLK SOURCE LCDEN LCDSTP LCDDOZE FFR ALTSOURCE ALTDIV FDCIEN PADSAFE VSUPPLY LADJ CPSEL RVTRIM RVEN

DUTY : LCD duty select
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

#000 : 000

Use 1 BP (1/1 duty cycle).

#001 : 001

Use 2 BP (1/2 duty cycle).

#010 : 010

Use 3 BP (1/3 duty cycle).

#011 : 011

Use 4 BP (1/4 duty cycle). (Default)

#111 : 111

Use 8 BP (1/8 duty cycle).

End of enumeration elements list.

LCLK : LCD Clock Prescaler
bits : 3 - 5 (3 bit)
access : read-write

SOURCE : LCD Clock Source Select
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Selects the default clock as the LCD clock source.

#1 : 1

Selects output of the alternate clock source selection (see ALTSOURCE) as the LCD clock source.

End of enumeration elements list.

LCDEN : LCD Driver Enable
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

All front plane and back plane pins are disabled. The LCD controller system is also disabled, and all LCD waveform generation clocks are stopped. V LL3 is connected to V DD internally. All LCD pins, LCD_Pn, enabled using the LCD Pin Enable register, output a low value.

#1 : 1

LCD controller driver system is enabled, and front plane and back plane waveforms are generated. All LCD pins, LCD_Pn, enabled if PAD_SAFE is clearusing the LCD Pin Enable register, output an LCD driver waveform. The back plane pins output an LCD driver back plane waveform based on the settings of DUTY[2:0]. Charge pump or resistor bias is enabled.

End of enumeration elements list.

LCDSTP : LCD Stop
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

Allows the LCD driver, charge pump, resistor bias network, and voltage regulator to continue running during Stop mode.

#1 : 1

Disables the LCD driver, charge pump, resistor bias network, and voltage regulator when MCU enters Stop mode.

End of enumeration elements list.

LCDDOZE : LCD Doze enable
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

Allows the LCD driver, charge pump, resistor bias network, and voltage regulator to continue running during Doze mode.

#1 : 1

Disables the LCD driver, charge pump, resistor bias network, and voltage regulator when MCU enters Doze mode.

End of enumeration elements list.

FFR : Fast Frame Rate Select
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Standard Frame Rate LCD Frame Freq: 23.3 (min) 73.1 (max)

#1 : 1

Fast Frame Rate (Standard Frame Rate x2) LCD Frame Freq: 46.6 (min) 146.2 (max)

End of enumeration elements list.

ALTSOURCE : Selects the alternate clock source
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Select Alternate Clock Source 1 (default)

#1 : 1

Select Alternate Clock Source 2

End of enumeration elements list.

ALTDIV : LCD AlternateClock Divider
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#00 : 0

Divide factor = 1 (No divide)

#01 : 1

Divide factor = 8

#10 : 10

Divide factor = 64

#11 : 11

Divide factor = 512

#00 : 00

Divide factor = 1 (No divide)

#01 : 01

Divide factor = 64

End of enumeration elements list.

FDCIEN : LCD Fault Detection Complete Interrupt Enable
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

#0 : 0

No interrupt request is generated by this event.

#1 : 1

When a fault is detected and FDCF bit is set, this event causes an interrupt request.

End of enumeration elements list.

PADSAFE : Pad Safe State Enable
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD frontplane and backplane functions enabled according to other LCD control bits

#1 : 1

LCD frontplane and backplane functions disabled

End of enumeration elements list.

VSUPPLY : Voltage Supply Control
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

#0 : 0

Drive VLL3 internally from VDD

#1 : 1

Drive VLL3 externally from VDD or drive VLL internally from vIREG

End of enumeration elements list.

LADJ : Load Adjust
bits : 20 - 21 (2 bit)
access : read-write

CPSEL : Charge Pump or Resistor Bias Select
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD charge pump is disabled. Resistor network selected. (The internal 1/3-bias is forced.)

#1 : 1

LCD charge pump is selected. Resistor network disabled. (The internal 1/3-bias is forced.)

End of enumeration elements list.

RVTRIM : Regulated Voltage Trim
bits : 24 - 27 (4 bit)
access : read-write

RVEN : Regulated Voltage Enable
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

Regulated voltage disabled.

#1 : 1

Regulated voltage enabled.

End of enumeration elements list.


PENL

LCD Pin Enable register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PENL PENL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEN

PEN : LCD Pin Enable
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

LCD operation disabled on LCD_Pn.

#1 : 1

LCD operation enabled on LCD_Pn.

End of enumeration elements list.


WF3TO0

LCD Waveform register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF3TO0 WF3TO0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF0 WF1 WF2 WF3

WF0 : Controls segments or phases connected to LCD_P0 as described above for WF3.
bits : 0 - 7 (8 bit)
access : read-write

WF1 : Controls segments or phases connected to LCD_P1 as described above for WF3.
bits : 8 - 15 (8 bit)
access : read-write

WF2 : Controls segments or phases connected to LCD_P2 as described above for WF3.
bits : 16 - 23 (8 bit)
access : read-write

WF3 : Segment-on front plane operation - Each bit turns on or off the segments associated with LCD_P3 in the following pattern: HGFEDCBA (most significant bit controls segment H and least significant bit controls segment A)
bits : 24 - 31 (8 bit)
access : read-write


WF0

LCD Waveform Register 0.
address_offset : 0x20 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF0 WF0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD0 BPBLCD0 BPCLCD0 BPDLCD0 BPELCD0 BPFLCD0 BPGLCD0 BPHLCD0

BPALCD0 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD0 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD0 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD0 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD0 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD0 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD0 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD0 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF1

LCD Waveform Register 1.
address_offset : 0x21 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF1 WF1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD1 BPBLCD1 BPCLCD1 BPDLCD1 BPELCD1 BPFLCD1 BPGLCD1 BPHLCD1

BPALCD1 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD1 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD1 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD1 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD1 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD1 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD1 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD1 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF2

LCD Waveform Register 2.
address_offset : 0x22 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF2 WF2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD2 BPBLCD2 BPCLCD2 BPDLCD2 BPELCD2 BPFLCD2 BPGLCD2 BPHLCD2

BPALCD2 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD2 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD2 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD2 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD2 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD2 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD2 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD2 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF3

LCD Waveform Register 3.
address_offset : 0x23 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF3 WF3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD3 BPBLCD3 BPCLCD3 BPDLCD3 BPELCD3 BPFLCD3 BPGLCD3 BPHLCD3

BPALCD3 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD3 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD3 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD3 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD3 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD3 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD3 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD3 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF7TO4

LCD Waveform register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF7TO4 WF7TO4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF4 WF5 WF6 WF7

WF4 : Controls segments or phases connected to LCD_P4 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF5 : Controls segments or phases connected to LCD_P5 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF6 : Controls segments or phases connected to LCD_P6 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF7 : Controls segments or phases connected to LCD_P7 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF4

LCD Waveform Register 4.
address_offset : 0x24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF4 WF4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD4 BPBLCD4 BPCLCD4 BPDLCD4 BPELCD4 BPFLCD4 BPGLCD4 BPHLCD4

BPALCD4 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD4 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD4 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD4 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD4 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD4 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD4 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD4 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF5

LCD Waveform Register 5.
address_offset : 0x25 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF5 WF5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD5 BPBLCD5 BPCLCD5 BPDLCD5 BPELCD5 BPFLCD5 BPGLCD5 BPHLCD5

BPALCD5 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD5 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD5 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD5 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD5 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD5 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD5 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD5 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF6

LCD Waveform Register 6.
address_offset : 0x26 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF6 WF6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD6 BPBLCD6 BPCLCD6 BPDLCD6 BPELCD6 BPFLCD6 BPGLCD6 BPHLCD6

BPALCD6 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD6 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD6 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD6 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD6 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD6 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD6 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD6 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF7

LCD Waveform Register 7.
address_offset : 0x27 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF7 WF7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD7 BPBLCD7 BPCLCD7 BPDLCD7 BPELCD7 BPFLCD7 BPGLCD7 BPHLCD7

BPALCD7 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD7 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD7 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD7 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD7 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD7 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD7 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD7 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF11TO8

LCD Waveform register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF11TO8 WF11TO8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF8 WF9 WF10 WF11

WF8 : Controls segments or phases connected to LCD_P8 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF9 : Controls segments or phases connected to LCD_P9 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF10 : Controls segments or phases connected to LCD_P10 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF11 : Controls segments or phases connected to LCD_P11 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF8

LCD Waveform Register 8.
address_offset : 0x28 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF8 WF8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD8 BPBLCD8 BPCLCD8 BPDLCD8 BPELCD8 BPFLCD8 BPGLCD8 BPHLCD8

BPALCD8 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD8 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD8 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD8 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD8 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD8 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD8 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD8 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF9

LCD Waveform Register 9.
address_offset : 0x29 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF9 WF9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD9 BPBLCD9 BPCLCD9 BPDLCD9 BPELCD9 BPFLCD9 BPGLCD9 BPHLCD9

BPALCD9 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD9 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD9 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD9 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD9 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD9 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD9 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD9 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF10

LCD Waveform Register 10.
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF10 WF10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD10 BPBLCD10 BPCLCD10 BPDLCD10 BPELCD10 BPFLCD10 BPGLCD10 BPHLCD10

BPALCD10 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD10 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD10 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD10 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD10 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD10 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD10 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD10 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF11

LCD Waveform Register 11.
address_offset : 0x2B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF11 WF11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD11 BPBLCD11 BPCLCD11 BPDLCD11 BPELCD11 BPFLCD11 BPGLCD11 BPHLCD11

BPALCD11 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD11 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD11 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD11 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD11 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD11 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD11 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD11 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF15TO12

LCD Waveform register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF15TO12 WF15TO12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF12 WF13 WF14 WF15

WF12 : Controls segments or phases connected to LCD_P12 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF13 : Controls segments or phases connected to LCD_P13 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF14 : Controls segments or phases connected to LCD_P14 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF15 : Controls segments or phases connected to LCD_P15 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF12

LCD Waveform Register 12.
address_offset : 0x2C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF12 WF12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD12 BPBLCD12 BPCLCD12 BPDLCD12 BPELCD12 BPFLCD12 BPGLCD12 BPHLCD12

BPALCD12 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD12 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD12 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD12 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD12 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD12 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD12 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD12 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF13

LCD Waveform Register 13.
address_offset : 0x2D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF13 WF13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD13 BPBLCD13 BPCLCD13 BPDLCD13 BPELCD13 BPFLCD13 BPGLCD13 BPHLCD13

BPALCD13 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD13 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD13 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD13 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD13 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD13 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD13 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD13 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF14

LCD Waveform Register 14.
address_offset : 0x2E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF14 WF14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD14 BPBLCD14 BPCLCD14 BPDLCD14 BPELCD14 BPFLCD14 BPGLCD14 BPHLCD14

BPALCD14 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD14 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD14 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD14 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD14 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD14 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD14 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD14 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF15

LCD Waveform Register 15.
address_offset : 0x2F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF15 WF15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD15 BPBLCD15 BPCLCD15 BPDLCD15 BPELCD15 BPFLCD15 BPGLCD15 BPHLCD15

BPALCD15 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD15 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD15 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD15 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD15 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD15 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD15 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD15 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


BPENL

LCD Back Plane Enable register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BPENL BPENL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BPEN

BPEN : Back Plane Enable
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

Front plane operation enabled on LCD_Pn.

#1 : 1

Back plane operation enabled on LCD_Pn.

End of enumeration elements list.


WF19TO16

LCD Waveform register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF19TO16 WF19TO16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF16 WF17 WF18 WF19

WF16 : Controls segments or phases connected to LCD_P16 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF17 : Controls segments or phases connected to LCD_P17 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF18 : Controls segments or phases connected to LCD_P18 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF19 : Controls segments or phases connected to LCD_P19 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF16

LCD Waveform Register 16.
address_offset : 0x30 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF16 WF16 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD16 BPBLCD16 BPCLCD16 BPDLCD16 BPELCD16 BPFLCD16 BPGLCD16 BPHLCD16

BPALCD16 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD16 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD16 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD16 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD16 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD16 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD16 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD16 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF17

LCD Waveform Register 17.
address_offset : 0x31 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF17 WF17 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD17 BPBLCD17 BPCLCD17 BPDLCD17 BPELCD17 BPFLCD17 BPGLCD17 BPHLCD17

BPALCD17 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD17 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD17 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD17 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD17 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD17 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD17 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD17 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF18

LCD Waveform Register 18.
address_offset : 0x32 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF18 WF18 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD18 BPBLCD18 BPCLCD18 BPDLCD18 BPELCD18 BPFLCD18 BPGLCD18 BPHLCD18

BPALCD18 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD18 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD18 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD18 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD18 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD18 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD18 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD18 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF19

LCD Waveform Register 19.
address_offset : 0x33 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF19 WF19 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD19 BPBLCD19 BPCLCD19 BPDLCD19 BPELCD19 BPFLCD19 BPGLCD19 BPHLCD19

BPALCD19 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD19 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD19 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD19 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD19 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD19 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD19 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD19 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


PENH

LCD Pin Enable register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PENH PENH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PEN

PEN : LCD Pin Enable
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

LCD operation disabled on LCD_Pn.

#1 : 1

LCD operation enabled on LCD_Pn.

End of enumeration elements list.


WF23TO20

LCD Waveform register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF23TO20 WF23TO20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF20 WF21 WF22 WF23

WF20 : Controls segments or phases connected to LCD_P20 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF21 : Controls segments or phases connected to LCD_P21 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF22 : Controls segments or phases connected to LCD_P22 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF23 : Controls segments or phases connected to LCD_P23 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF20

LCD Waveform Register 20.
address_offset : 0x34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF20 WF20 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD20 BPBLCD20 BPCLCD20 BPDLCD20 BPELCD20 BPFLCD20 BPGLCD20 BPHLCD20

BPALCD20 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD20 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD20 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD20 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD20 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD20 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD20 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD20 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF21

LCD Waveform Register 21.
address_offset : 0x35 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF21 WF21 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD21 BPBLCD21 BPCLCD21 BPDLCD21 BPELCD21 BPFLCD21 BPGLCD21 BPHLCD21

BPALCD21 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD21 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD21 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD21 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD21 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD21 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD21 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD21 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF22

LCD Waveform Register 22.
address_offset : 0x36 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF22 WF22 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD22 BPBLCD22 BPCLCD22 BPDLCD22 BPELCD22 BPFLCD22 BPGLCD22 BPHLCD22

BPALCD22 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD22 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD22 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD22 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD22 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD22 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD22 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD22 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF23

LCD Waveform Register 23.
address_offset : 0x37 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF23 WF23 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD23 BPBLCD23 BPCLCD23 BPDLCD23 BPELCD23 BPFLCD23 BPGLCD23 BPHLCD23

BPALCD23 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD23 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD23 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD23 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD23 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD23 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD23 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD23 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF27TO24

LCD Waveform register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF27TO24 WF27TO24 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF24 WF25 WF26 WF27

WF24 : Controls segments or phases connected to LCD_P24 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF25 : Controls segments or phases connected to LCD_P25 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF26 : Controls segments or phases connected to LCD_P26 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF27 : Controls segments or phases connected to LCD_P27 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF24

LCD Waveform Register 24.
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF24 WF24 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD24 BPBLCD24 BPCLCD24 BPDLCD24 BPELCD24 BPFLCD24 BPGLCD24 BPHLCD24

BPALCD24 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD24 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD24 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD24 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD24 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD24 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD24 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD24 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF25

LCD Waveform Register 25.
address_offset : 0x39 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF25 WF25 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD25 BPBLCD25 BPCLCD25 BPDLCD25 BPELCD25 BPFLCD25 BPGLCD25 BPHLCD25

BPALCD25 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD25 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD25 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD25 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD25 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD25 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD25 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD25 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF26

LCD Waveform Register 26.
address_offset : 0x3A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF26 WF26 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD26 BPBLCD26 BPCLCD26 BPDLCD26 BPELCD26 BPFLCD26 BPGLCD26 BPHLCD26

BPALCD26 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD26 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD26 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD26 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD26 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD26 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD26 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD26 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF27

LCD Waveform Register 27.
address_offset : 0x3B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF27 WF27 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD27 BPBLCD27 BPCLCD27 BPDLCD27 BPELCD27 BPFLCD27 BPGLCD27 BPHLCD27

BPALCD27 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD27 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD27 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD27 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD27 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD27 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD27 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD27 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF31TO28

LCD Waveform register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF31TO28 WF31TO28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF28 WF29 WF30 WF31

WF28 : Controls segments or phases connected to LCD_P28 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF29 : Controls segments or phases connected to LCD_P29 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF30 : Controls segments or phases connected to LCD_P30 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF31 : Controls segments or phases connected to LCD_P31 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF28

LCD Waveform Register 28.
address_offset : 0x3C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF28 WF28 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD28 BPBLCD28 BPCLCD28 BPDLCD28 BPELCD28 BPFLCD28 BPGLCD28 BPHLCD28

BPALCD28 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD28 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD28 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD28 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD28 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD28 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD28 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD28 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF29

LCD Waveform Register 29.
address_offset : 0x3D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF29 WF29 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD29 BPBLCD29 BPCLCD29 BPDLCD29 BPELCD29 BPFLCD29 BPGLCD29 BPHLCD29

BPALCD29 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD29 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD29 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD29 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD29 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD29 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD29 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD29 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF30

LCD Waveform Register 30.
address_offset : 0x3E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF30 WF30 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD30 BPBLCD30 BPCLCD30 BPDLCD30 BPELCD30 BPFLCD30 BPGLCD30 BPHLCD30

BPALCD30 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD30 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD30 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD30 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD30 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD30 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD30 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD30 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF31

LCD Waveform Register 31.
address_offset : 0x3F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF31 WF31 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD31 BPBLCD31 BPCLCD31 BPDLCD31 BPELCD31 BPFLCD31 BPGLCD31 BPHLCD31

BPALCD31 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD31 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD31 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD31 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD31 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD31 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD31 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD31 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


AR

LCD Auxiliary Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AR AR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BRATE BMODE BLANK ALT BLINK

BRATE : Blink-rate configuration
bits : 0 - 2 (3 bit)
access : read-write

BMODE : Blink mode
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Display blank during the blink period.

#1 : 1

Display alternate display during blink period (Ignored if duty is 5 or greater).

End of enumeration elements list.

BLANK : Blank display mode
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal or alternate display mode.

#1 : 1

Blank display mode.

End of enumeration elements list.

ALT : Alternate display mode
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal display mode.

#1 : 1

Alternate display mode.

End of enumeration elements list.

BLINK : Blink command
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disables blinking.

#1 : 1

Starts blinking at blinking frequency specified by LCD blink rate calculation.

End of enumeration elements list.


WF35TO32

LCD Waveform register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF35TO32 WF35TO32 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF32 WF33 WF34 WF35

WF32 : Controls segments or phases connected to LCD_P32 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF33 : Controls segments or phases connected to LCD_P33 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF34 : Controls segments or phases connected to LCD_P34 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF35 : Controls segments or phases connected to LCD_P35 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF32

LCD Waveform Register 32.
address_offset : 0x40 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF32 WF32 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD32 BPBLCD32 BPCLCD32 BPDLCD32 BPELCD32 BPFLCD32 BPGLCD32 BPHLCD32

BPALCD32 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD32 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD32 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD32 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD32 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD32 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD32 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD32 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF33

LCD Waveform Register 33.
address_offset : 0x41 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF33 WF33 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD33 BPBLCD33 BPCLCD33 BPDLCD33 BPELCD33 BPFLCD33 BPGLCD33 BPHLCD33

BPALCD33 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD33 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD33 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD33 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD33 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD33 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD33 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD33 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF34

LCD Waveform Register 34.
address_offset : 0x42 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF34 WF34 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD34 BPBLCD34 BPCLCD34 BPDLCD34 BPELCD34 BPFLCD34 BPGLCD34 BPHLCD34

BPALCD34 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD34 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD34 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD34 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD34 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD34 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD34 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD34 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF35

LCD Waveform Register 35.
address_offset : 0x43 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF35 WF35 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD35 BPBLCD35 BPCLCD35 BPDLCD35 BPELCD35 BPFLCD35 BPGLCD35 BPHLCD35

BPALCD35 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD35 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD35 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD35 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD35 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD35 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD35 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD35 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF39TO36

LCD Waveform register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF39TO36 WF39TO36 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF36 WF37 WF38 WF39

WF36 : Controls segments or phases connected to LCD_P36 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF37 : Controls segments or phases connected to LCD_P37 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF38 : Controls segments or phases connected to LCD_P38 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF39 : Controls segments or phases connected to LCD_P39 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF36

LCD Waveform Register 36.
address_offset : 0x44 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF36 WF36 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD36 BPBLCD36 BPCLCD36 BPDLCD36 BPELCD36 BPFLCD36 BPGLCD36 BPHLCD36

BPALCD36 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD36 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD36 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD36 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD36 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD36 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD36 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD36 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF37

LCD Waveform Register 37.
address_offset : 0x45 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF37 WF37 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD37 BPBLCD37 BPCLCD37 BPDLCD37 BPELCD37 BPFLCD37 BPGLCD37 BPHLCD37

BPALCD37 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD37 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD37 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD37 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD37 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD37 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD37 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD37 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF38

LCD Waveform Register 38.
address_offset : 0x46 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF38 WF38 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD38 BPBLCD38 BPCLCD38 BPDLCD38 BPELCD38 BPFLCD38 BPGLCD38 BPHLCD38

BPALCD38 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD38 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD38 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD38 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD38 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD38 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD38 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD38 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF39

LCD Waveform Register 39.
address_offset : 0x47 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF39 WF39 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD39 BPBLCD39 BPCLCD39 BPDLCD39 BPELCD39 BPFLCD39 BPGLCD39 BPHLCD39

BPALCD39 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD39 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD39 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD39 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD39 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD39 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD39 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD39 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF43TO40

LCD Waveform register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF43TO40 WF43TO40 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF40 WF41 WF42 WF43

WF40 : Controls segments or phases connected to LCD_P40 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF41 : Controls segments or phases connected to LCD_P41 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF42 : Controls segments or phases connected to LCD_P42 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF43 : Controls segments or phases connected to LCD_P43 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF40

LCD Waveform Register 40.
address_offset : 0x48 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF40 WF40 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD40 BPBLCD40 BPCLCD40 BPDLCD40 BPELCD40 BPFLCD40 BPGLCD40 BPHLCD40

BPALCD40 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD40 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD40 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD40 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD40 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD40 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD40 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD40 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF41

LCD Waveform Register 41.
address_offset : 0x49 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF41 WF41 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD41 BPBLCD41 BPCLCD41 BPDLCD41 BPELCD41 BPFLCD41 BPGLCD41 BPHLCD41

BPALCD41 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD41 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD41 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD41 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD41 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD41 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD41 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD41 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF42

LCD Waveform Register 42.
address_offset : 0x4A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF42 WF42 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD42 BPBLCD42 BPCLCD42 BPDLCD42 BPELCD42 BPFLCD42 BPGLCD42 BPHLCD42

BPALCD42 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD42 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD42 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD42 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD42 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD42 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD42 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD42 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF43

LCD Waveform Register 43.
address_offset : 0x4B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF43 WF43 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD43 BPBLCD43 BPCLCD43 BPDLCD43 BPELCD43 BPFLCD43 BPGLCD43 BPHLCD43

BPALCD43 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD43 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD43 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD43 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD43 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD43 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD43 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD43 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


BPENH

LCD Back Plane Enable register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BPENH BPENH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BPEN

BPEN : Back Plane Enable
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

#0 : 0

Front plane operation enabled on LCD_Pn.

#1 : 1

Back plane operation enabled on LCD_Pn.

End of enumeration elements list.


WF47TO44

LCD Waveform register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF47TO44 WF47TO44 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF44 WF45 WF46 WF47

WF44 : Controls segments or phases connected to LCD_P44 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF45 : Controls segments or phases connected to LCD_P45 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF46 : Controls segments or phases connected to LCD_P46 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF47 : Controls segments or phases connected to LCD_P47 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF44

LCD Waveform Register 44.
address_offset : 0x4C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF44 WF44 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD44 BPBLCD44 BPCLCD44 BPDLCD44 BPELCD44 BPFLCD44 BPGLCD44 BPHLCD44

BPALCD44 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD44 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD44 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD44 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD44 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD44 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD44 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD44 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF45

LCD Waveform Register 45.
address_offset : 0x4D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF45 WF45 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD45 BPBLCD45 BPCLCD45 BPDLCD45 BPELCD45 BPFLCD45 BPGLCD45 BPHLCD45

BPALCD45 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD45 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD45 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD45 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD45 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD45 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD45 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD45 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF46

LCD Waveform Register 46.
address_offset : 0x4E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF46 WF46 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD46 BPBLCD46 BPCLCD46 BPDLCD46 BPELCD46 BPFLCD46 BPGLCD46 BPHLCD46

BPALCD46 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD46 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD46 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD46 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD46 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD46 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD46 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD46 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF47

LCD Waveform Register 47.
address_offset : 0x4F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF47 WF47 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD47 BPBLCD47 BPCLCD47 BPDLCD47 BPELCD47 BPFLCD47 BPGLCD47 BPHLCD47

BPALCD47 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD47 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD47 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD47 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD47 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD47 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD47 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD47 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF51TO48

LCD Waveform register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF51TO48 WF51TO48 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF48 WF49 WF50 WF51

WF48 : Controls segments or phases connected to LCD_P48 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF49 : Controls segments or phases connected to LCD_P49 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF50 : Controls segments or phases connected to LCD_P50 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF51 : Controls segments or phases connected to LCD_P51 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF48

LCD Waveform Register 48.
address_offset : 0x50 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF48 WF48 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD48 BPBLCD48 BPCLCD48 BPDLCD48 BPELCD48 BPFLCD48 BPGLCD48 BPHLCD48

BPALCD48 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD48 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD48 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD48 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD48 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD48 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD48 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD48 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF49

LCD Waveform Register 49.
address_offset : 0x51 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF49 WF49 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD49 BPBLCD49 BPCLCD49 BPDLCD49 BPELCD49 BPFLCD49 BPGLCD49 BPHLCD49

BPALCD49 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD49 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD49 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD49 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD49 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD49 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD49 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD49 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF50

LCD Waveform Register 50.
address_offset : 0x52 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF50 WF50 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD50 BPBLCD50 BPCLCD50 BPDLCD50 BPELCD50 BPFLCD50 BPGLCD50 BPHLCD50

BPALCD50 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD50 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD50 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD50 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD50 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD50 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD50 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD50 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF51

LCD Waveform Register 51.
address_offset : 0x53 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF51 WF51 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD51 BPBLCD51 BPCLCD51 BPDLCD51 BPELCD51 BPFLCD51 BPGLCD51 BPHLCD51

BPALCD51 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD51 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD51 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD51 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD51 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD51 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD51 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD51 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF55TO52

LCD Waveform register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF55TO52 WF55TO52 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF52 WF53 WF54 WF55

WF52 : Controls segments or phases connected to LCD_P52 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF53 : Controls segments or phases connected to LCD_P53 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF54 : Controls segments or phases connected to LCD_P54 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF55 : Controls segments or phases connected to LCD_P55 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF52

LCD Waveform Register 52.
address_offset : 0x54 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF52 WF52 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD52 BPBLCD52 BPCLCD52 BPDLCD52 BPELCD52 BPFLCD52 BPGLCD52 BPHLCD52

BPALCD52 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD52 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD52 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD52 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD52 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD52 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD52 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD52 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF53

LCD Waveform Register 53.
address_offset : 0x55 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF53 WF53 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD53 BPBLCD53 BPCLCD53 BPDLCD53 BPELCD53 BPFLCD53 BPGLCD53 BPHLCD53

BPALCD53 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD53 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD53 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD53 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD53 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD53 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD53 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD53 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF54

LCD Waveform Register 54.
address_offset : 0x56 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF54 WF54 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD54 BPBLCD54 BPCLCD54 BPDLCD54 BPELCD54 BPFLCD54 BPGLCD54 BPHLCD54

BPALCD54 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD54 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD54 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD54 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD54 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD54 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD54 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD54 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF55

LCD Waveform Register 55.
address_offset : 0x57 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF55 WF55 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD55 BPBLCD55 BPCLCD55 BPDLCD55 BPELCD55 BPFLCD55 BPGLCD55 BPHLCD55

BPALCD55 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD55 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD55 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD55 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD55 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD55 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD55 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD55 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF59TO56

LCD Waveform register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF59TO56 WF59TO56 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF56 WF57 WF58 WF59

WF56 : Controls segments or phases connected to LCD_P56 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF57 : Controls segments or phases connected to LCD_P57 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF58 : Controls segments or phases connected to LCD_P58 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF59 : Controls segments or phases connected to LCD_P59 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF56

LCD Waveform Register 56.
address_offset : 0x58 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF56 WF56 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD56 BPBLCD56 BPCLCD56 BPDLCD56 BPELCD56 BPFLCD56 BPGLCD56 BPHLCD56

BPALCD56 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD56 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD56 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD56 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD56 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD56 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD56 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD56 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF57

LCD Waveform Register 57.
address_offset : 0x59 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF57 WF57 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD57 BPBLCD57 BPCLCD57 BPDLCD57 BPELCD57 BPFLCD57 BPGLCD57 BPHLCD57

BPALCD57 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD57 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD57 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD57 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD57 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD57 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD57 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD57 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF58

LCD Waveform Register 58.
address_offset : 0x5A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF58 WF58 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD58 BPBLCD58 BPCLCD58 BPDLCD58 BPELCD58 BPFLCD58 BPGLCD58 BPHLCD58

BPALCD58 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD58 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD58 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD58 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD58 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD58 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD58 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD58 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF59

LCD Waveform Register 59.
address_offset : 0x5B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF59 WF59 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD59 BPBLCD59 BPCLCD59 BPDLCD59 BPELCD59 BPFLCD59 BPGLCD59 BPHLCD59

BPALCD59 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD59 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD59 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD59 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD59 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD59 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD59 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD59 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF63TO60

LCD Waveform register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF63TO60 WF63TO60 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WF60 WF61 WF62 WF63

WF60 : Controls segments or phases connected to LCD_P60 as described above for WF3TO0[WF3].
bits : 0 - 7 (8 bit)
access : read-write

WF61 : Controls segments or phases connected to LCD_P61 as described above for WF3TO0[WF3].
bits : 8 - 15 (8 bit)
access : read-write

WF62 : Controls segments or phases connected to LCD_P62 as described above for WF3TO0[WF3].
bits : 16 - 23 (8 bit)
access : read-write

WF63 : Controls segments or phases connected to LCD_P63 as described above for WF3TO0[WF3].
bits : 24 - 31 (8 bit)
access : read-write


WF60

LCD Waveform Register 60.
address_offset : 0x5C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LCD
reset_Mask : 0x0

WF60 WF60 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD60 BPBLCD60 BPCLCD60 BPDLCD60 BPELCD60 BPFLCD60 BPGLCD60 BPHLCD60

BPALCD60 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD60 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD60 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD60 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD60 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD60 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD60 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD60 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF61

LCD Waveform Register 61.
address_offset : 0x5D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF61 WF61 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD61 BPBLCD61 BPCLCD61 BPDLCD61 BPELCD61 BPFLCD61 BPGLCD61 BPHLCD61

BPALCD61 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD61 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD61 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD61 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD61 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD61 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD61 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD61 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF62

LCD Waveform Register 62.
address_offset : 0x5E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF62 WF62 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD62 BPBLCD62 BPCLCD62 BPDLCD62 BPELCD62 BPFLCD62 BPGLCD62 BPHLCD62

BPALCD62 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD62 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD62 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD62 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD62 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD62 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD62 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD62 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


WF63

LCD Waveform Register 63.
address_offset : 0x5F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WF63 WF63 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BPALCD63 BPBLCD63 BPCLCD63 BPDLCD63 BPELCD63 BPFLCD63 BPGLCD63 BPHLCD63

BPALCD63 : no description available
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase A

#1 : 1

LCD segment on or LCD backplane active for phase A

End of enumeration elements list.

BPBLCD63 : no description available
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase B

#1 : 1

LCD segment on or LCD backplane active for phase B

End of enumeration elements list.

BPCLCD63 : no description available
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase C

#1 : 1

LCD segment on or LCD backplane active for phase C

End of enumeration elements list.

BPDLCD63 : no description available
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase D

#1 : 1

LCD segment on or LCD backplane active for phase D

End of enumeration elements list.

BPELCD63 : no description available
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase E

#1 : 1

LCD segment on or LCD backplane active for phase E

End of enumeration elements list.

BPFLCD63 : no description available
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase F

#1 : 1

LCD segment on or LCD backplane active for phase F

End of enumeration elements list.

BPGLCD63 : no description available
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase G

#1 : 1

LCD segment on or LCD backplane active for phase G

End of enumeration elements list.

BPHLCD63 : no description available
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

LCD segment off or LCD backplane inactive for phase H

#1 : 1

LCD segment on or LCD backplane active for phase H

End of enumeration elements list.


FDCR

LCD Fault Detect Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FDCR FDCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FDPINID FDBPEN FDEN FDSWW FDPRS

FDPINID : Fault Detect Pin ID
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

#0 : 0

Fault detection for LCD_P0 pin.

#1 : 1

Fault detection for LCD_P1 pin.

#111111 : 111111

Fault detection for LCD_P63 pin.

End of enumeration elements list.

FDBPEN : Fault Detect Back Plane Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Type of the selected pin under fault detect test is front plane.

#1 : 1

Type of the selected pin under fault detect test is back plane.

End of enumeration elements list.

FDEN : Fault Detect Enable
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disable fault detection.

#1 : 1

Enable fault detection.

End of enumeration elements list.

FDSWW : Fault Detect Sample Window Width
bits : 9 - 11 (3 bit)
access : read-write

Enumeration:

#000 : 0

Sample window width is 4 sample clock cycles.

#001 : 1

Sample window width is 8 sample clock cycles.

#010 : 10

Sample window width is 16 sample clock cycles.

#011 : 11

Sample window width is 32 sample clock cycles.

#100 : 100

Sample window width is 64 sample clock cycles.

#101 : 101

Sample window width is 128 sample clock cycles.

#110 : 110

Sample window width is 256 sample clock cycles.

#111 : 111

Sample window width is 512 sample clock cycles.

End of enumeration elements list.

FDPRS : Fault Detect Clock Prescaler
bits : 12 - 14 (3 bit)
access : read-write

Enumeration:

#000 : 0

1/1 bus clock.

#001 : 1

1/2 bus clock.

#010 : 10

1/4 bus clock.

#011 : 11

1/8 bus clock.

#100 : 100

1/16 bus clock.

#101 : 101

1/32 bus clock.

#110 : 110

1/64 bus clock.

#111 : 111

1/128 bus clock.

End of enumeration elements list.


FDSR

LCD Fault Detect Status Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FDSR FDSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FDCNT FDCF

FDCNT : Fault Detect Counter
bits : 0 - 7 (8 bit)
access : read-only

Enumeration:

#0 : 0

No "one" samples.

#1 : 1

1 "one" samples.

#10 : 10

2 "one" samples.

#11111110 : 11111110

254 "one" samples.

#11111111 : 11111111

255 or more "one" samples. The FDCNT can overflow. Therefore, FDSWW and FDPRS must be reconfigured for proper sampling.

End of enumeration elements list.

FDCF : Fault Detection Complete Flag
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

#0 : 0

Fault detection is not completed.

#1 : 1

Fault detection is completed.

End of enumeration elements list.



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