Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
Low Power Timer Control Status Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TEN : Timer Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
LPTMR is disabled and internal logic is reset.
#1 : 1
LPTMR is enabled.
End of enumeration elements list.
TMS : Timer Mode Select
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Time Counter mode.
#1 : 1
Pulse Counter mode.
End of enumeration elements list.
TFC : Timer Free-Running Counter
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
CNR is reset whenever TCF is set.
#1 : 1
CNR is reset on overflow.
End of enumeration elements list.
TPP : Timer Pin Polarity
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pulse Counter input source is active-high, and the CNR will increment on the rising-edge.
#1 : 1
Pulse Counter input source is active-low, and the CNR will increment on the falling-edge.
End of enumeration elements list.
TPS : Timer Pin Select
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
#00 : 00
Pulse counter input 0 is selected.
#01 : 01
Pulse counter input 1 is selected.
#10 : 10
Pulse counter input 2 is selected.
#11 : 11
Pulse counter input 3 is selected.
End of enumeration elements list.
TIE : Timer Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Timer interrupt disabled.
#1 : 1
Timer interrupt enabled.
End of enumeration elements list.
TCF : Timer Compare Flag
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
The value of CNR is not equal to CMR and increments.
#1 : 1
The value of CNR is equal to CMR and increments.
End of enumeration elements list.
Low Power Timer Prescale Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PCS : Prescaler Clock Select
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
#00 : 00
Prescaler/glitch filter clock 0 selected.
#01 : 01
Prescaler/glitch filter clock 1 selected.
#10 : 10
Prescaler/glitch filter clock 2 selected.
#11 : 11
Prescaler/glitch filter clock 3 selected.
End of enumeration elements list.
PBYP : Prescaler Bypass
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Prescaler/glitch filter is enabled.
#1 : 1
Prescaler/glitch filter is bypassed.
End of enumeration elements list.
PRESCALE : Prescale Value
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
#0000 : 0000
Prescaler divides the prescaler clock by 2; glitch filter does not support this configuration.
#0001 : 0001
Prescaler divides the prescaler clock by 4; glitch filter recognizes change on input pin after 2 rising clock edges.
#0010 : 0010
Prescaler divides the prescaler clock by 8; glitch filter recognizes change on input pin after 4 rising clock edges.
#0011 : 0011
Prescaler divides the prescaler clock by 16; glitch filter recognizes change on input pin after 8 rising clock edges.
#0100 : 0100
Prescaler divides the prescaler clock by 32; glitch filter recognizes change on input pin after 16 rising clock edges.
#0101 : 0101
Prescaler divides the prescaler clock by 64; glitch filter recognizes change on input pin after 32 rising clock edges.
#0110 : 0110
Prescaler divides the prescaler clock by 128; glitch filter recognizes change on input pin after 64 rising clock edges.
#0111 : 0111
Prescaler divides the prescaler clock by 256; glitch filter recognizes change on input pin after 128 rising clock edges.
#1000 : 1000
Prescaler divides the prescaler clock by 512; glitch filter recognizes change on input pin after 256 rising clock edges.
#1001 : 1001
Prescaler divides the prescaler clock by 1024; glitch filter recognizes change on input pin after 512 rising clock edges.
#1010 : 1010
Prescaler divides the prescaler clock by 2048; glitch filter recognizes change on input pin after 1024 rising clock edges.
#1011 : 1011
Prescaler divides the prescaler clock by 4096; glitch filter recognizes change on input pin after 2048 rising clock edges.
#1100 : 1100
Prescaler divides the prescaler clock by 8192; glitch filter recognizes change on input pin after 4096 rising clock edges.
#1101 : 1101
Prescaler divides the prescaler clock by 16,384; glitch filter recognizes change on input pin after 8192 rising clock edges.
#1110 : 1110
Prescaler divides the prescaler clock by 32,768; glitch filter recognizes change on input pin after 16,384 rising clock edges.
#1111 : 1111
Prescaler divides the prescaler clock by 65,536; glitch filter recognizes change on input pin after 32,768 rising clock edges.
End of enumeration elements list.
Low Power Timer Compare Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMPARE : Compare Value
bits : 0 - 15 (16 bit)
access : read-write
Low Power Timer Counter Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COUNTER : Counter Value
bits : 0 - 15 (16 bit)
access : read-write
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