\n
address_offset : 0x0 Bytes (0x0)
size : 0x33D byte (0x0)
mem_usage : registers
protection : not protected
Interrupt Set Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : SETENA
bits : 0 - 31 (32 bit)
Interrupt Set-Pending Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : SETPEND
bits : 0 - 31 (32 bit)
Interrupt Clear-Pending Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : CLRPEND
bits : 0 - 31 (32 bit)
Interrupt Priority Register 0
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_0 : priority for interrupt 0
bits : 0 - 7 (8 bit)
PRI_1 : priority for interrupt 1
bits : 8 - 15 (8 bit)
PRI_2 : priority for interrupt 2
bits : 16 - 23 (8 bit)
PRI_3 : priority for interrupt 3
bits : 24 - 31 (8 bit)
Interrupt Priority Register 1
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_4 : priority for interrupt n
bits : 0 - 7 (8 bit)
PRI_5 : priority for interrupt n
bits : 8 - 15 (8 bit)
PRI_6 : priority for interrupt n
bits : 16 - 23 (8 bit)
PRI_7 : priority for interrupt n
bits : 24 - 31 (8 bit)
Interrupt Priority Register 2
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_8 : priority for interrupt n
bits : 0 - 7 (8 bit)
PRI_9 : priority for interrupt n
bits : 8 - 15 (8 bit)
PRI_10 : priority for interrupt n
bits : 16 - 23 (8 bit)
PRI_11 : priority for interrupt n
bits : 24 - 31 (8 bit)
Interrupt Priority Register 3
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_12 : priority for interrupt n
bits : 0 - 7 (8 bit)
PRI_13 : priority for interrupt n
bits : 8 - 15 (8 bit)
PRI_14 : priority for interrupt n
bits : 16 - 23 (8 bit)
PRI_15 : priority for interrupt n
bits : 24 - 31 (8 bit)
Interrupt Priority Register 4
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_16 : priority for interrupt n
bits : 0 - 7 (8 bit)
PRI_17 : priority for interrupt n
bits : 8 - 15 (8 bit)
PRI_18 : priority for interrupt n
bits : 16 - 23 (8 bit)
PRI_19 : priority for interrupt n
bits : 24 - 31 (8 bit)
Interrupt Priority Register 5
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_20 : priority for interrupt n
bits : 0 - 7 (8 bit)
PRI_21 : priority for interrupt n
bits : 8 - 15 (8 bit)
PRI_22 : priority for interrupt n
bits : 16 - 23 (8 bit)
PRI_23 : priority for interrupt n
bits : 24 - 31 (8 bit)
Interrupt Priority Register 6
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_24 : priority for interrupt n
bits : 0 - 7 (8 bit)
PRI_25 : priority for interrupt n
bits : 8 - 15 (8 bit)
PRI_26 : priority for interrupt n
bits : 16 - 23 (8 bit)
PRI_27 : priority for interrupt n
bits : 24 - 31 (8 bit)
Interrupt Priority Register 7
address_offset : 0x31C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_28 : priority for interrupt n
bits : 0 - 7 (8 bit)
PRI_29 : priority for interrupt n
bits : 8 - 15 (8 bit)
PRI_30 : priority for interrupt n
bits : 16 - 23 (8 bit)
PRI_31 : priority for interrupt n
bits : 24 - 31 (8 bit)
Interrupt Clear Enable Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : CLRENA
bits : 0 - 31 (32 bit)
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