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DAC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection : not protected

Registers

DAT0L

DAT15H

DAT3H

DAT4L

DAT4H

DAT5L

DAT1L

DAT0H

SR

C0

C1

C2

DAT5H

DAT6L

DAT6H

DAT7L

DAT7H

DAT8L

DAT1H

DAT8H

DAT9L

DAT2L

DAT9H

DAT10L

DAT10H

DAT11L

DAT11H

DAT12L

DAT2H

DAT12H

DAT13L

DAT3L

DAT13H

DAT14L

DAT14H

DAT15L


DAT0L

DAC Data Low Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT0L DAT0L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT15H

DAC Data High Register
address_offset : 0x101 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT15H DAT15H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT3H

DAC Data High Register
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT3H DAT3H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT4L

DAC Data Low Register
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT4L DAT4L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT4H

DAC Data High Register
address_offset : 0x1A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT4H DAT4H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT5L

DAC Data Low Register
address_offset : 0x1E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT5L DAT5L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT1L

DAC Data Low Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT1L DAT1L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT0H

DAC Data High Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT0H DAT0H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


SR

DAC Status Register
address_offset : 0x20 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SR SR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DACBFRPBF DACBFRPTF DACBFWMF

DACBFRPBF : DAC Buffer Read Pointer Bottom Position Flag
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

The DAC buffer read pointer is not equal to C2[DACBFUP].

#1 : 1

The DAC buffer read pointer is equal to C2[DACBFUP].

End of enumeration elements list.

DACBFRPTF : DAC Buffer Read Pointer Top Position Flag
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

The DAC buffer read pointer is not zero.

#1 : 1

The DAC buffer read pointer is zero.

End of enumeration elements list.

DACBFWMF : DAC Buffer Watermark Flag
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

The DAC buffer read pointer has not reached the watermark level.

#1 : 1

The DAC buffer read pointer has reached the watermark level.

End of enumeration elements list.


C0

DAC Control Register
address_offset : 0x21 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

C0 C0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DACBBIEN DACBTIEN DACBWIEN LPEN DACSWTRG DACTRGSEL DACRFS DACEN

DACBBIEN : DAC Buffer Read Pointer Bottom Flag Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

The DAC buffer read pointer bottom flag interrupt is disabled.

#1 : 1

The DAC buffer read pointer bottom flag interrupt is enabled.

End of enumeration elements list.

DACBTIEN : DAC Buffer Read Pointer Top Flag Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

The DAC buffer read pointer top flag interrupt is disabled.

#1 : 1

The DAC buffer read pointer top flag interrupt is enabled.

End of enumeration elements list.

DACBWIEN : DAC Buffer Watermark Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

The DAC buffer watermark interrupt is disabled.

#1 : 1

The DAC buffer watermark interrupt is enabled.

End of enumeration elements list.

LPEN : DAC Low Power Control
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

High-Power mode

#1 : 1

Low-Power mode

End of enumeration elements list.

DACSWTRG : DAC Software Trigger
bits : 4 - 4 (1 bit)
access : write-only

Enumeration:

#0 : 0

The DAC soft trigger is not valid.

#1 : 1

The DAC soft trigger is valid.

End of enumeration elements list.

DACTRGSEL : DAC Trigger Select
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

The DAC hardware trigger is selected.

#1 : 1

The DAC software trigger is selected.

End of enumeration elements list.

DACRFS : DAC Reference Select
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

The DAC selects DACREF_1 as the reference voltage.

#1 : 1

The DAC selects DACREF_2 as the reference voltage.

End of enumeration elements list.

DACEN : DAC Enable
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

The DAC system is disabled.

#1 : 1

The DAC system is enabled.

End of enumeration elements list.


C1

DAC Control Register 1
address_offset : 0x22 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

C1 C1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DACBFEN DACBFMD DACBFWM DMAEN

DACBFEN : DAC Buffer Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Buffer read pointer is disabled. The converted data is always the first word of the buffer.

#1 : 1

Buffer read pointer is enabled. The converted data is the word that the read pointer points to. It means converted data can be from any word of the buffer.

End of enumeration elements list.

DACBFMD : DAC Buffer Work Mode Select
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

#00 : 00

Normal mode

#01 : 01

Swing mode

#10 : 10

One-Time Scan mode

#11 : 11

FIFO mode

End of enumeration elements list.

DACBFWM : DAC Buffer Watermark Select
bits : 3 - 4 (2 bit)
access : read-write

Enumeration:

#00 : 00

In normal mode, 1 word . In FIFO mode, 2 or less than 2 data remaining in FIFO will set watermark status bit.

#01 : 01

In normal mode, 2 words . In FIFO mode, Max/4 or less than Max/4 data remaining in FIFO will set watermark status bit.

#10 : 10

In normal mode, 3 words . In FIFO mode, Max/2 or less than Max/2 data remaining in FIFO will set watermark status bit.

#11 : 11

In normal mode, 4 words . In FIFO mode, Max-2 or less than Max-2 data remaining in FIFO will set watermark status bit.

End of enumeration elements list.

DMAEN : DMA Enable Select
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

DMA is disabled.

#1 : 1

DMA is enabled. When DMA is enabled, the DMA request will be generated by original interrupts. The interrupts will not be presented on this module at the same time.

End of enumeration elements list.


C2

DAC Control Register 2
address_offset : 0x23 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

C2 C2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DACBFUP DACBFRP

DACBFUP : DAC Buffer Upper Limit
bits : 0 - 3 (4 bit)
access : read-write

DACBFRP : DAC Buffer Read Pointer
bits : 4 - 7 (4 bit)
access : read-write


DAT5H

DAC Data High Register
address_offset : 0x25 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT5H DAT5H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT6L

DAC Data Low Register
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT6L DAT6L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT6H

DAC Data High Register
address_offset : 0x32 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT6H DAT6H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT7L

DAC Data Low Register
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT7L DAT7L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT7H

DAC Data High Register
address_offset : 0x41 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT7H DAT7H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT8L

DAC Data Low Register
address_offset : 0x48 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT8L DAT8L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT1H

DAC Data High Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT1H DAT1H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT8H

DAC Data High Register
address_offset : 0x52 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT8H DAT8H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT9L

DAC Data Low Register
address_offset : 0x5A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT9L DAT9L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT2L

DAC Data Low Register
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT2L DAT2L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT9H

DAC Data High Register
address_offset : 0x65 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT9H DAT9H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT10L

DAC Data Low Register
address_offset : 0x6E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT10L DAT10L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT10H

DAC Data High Register
address_offset : 0x7A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT10H DAT10H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT11L

DAC Data Low Register
address_offset : 0x84 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT11L DAT11L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT11H

DAC Data High Register
address_offset : 0x91 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT11H DAT11H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT12L

DAC Data Low Register
address_offset : 0x9C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT12L DAT12L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT2H

DAC Data High Register
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT2H DAT2H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT12H

DAC Data High Register
address_offset : 0xAA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT12H DAT12H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT13L

DAC Data Low Register
address_offset : 0xB6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT13L DAT13L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT3L

DAC Data Low Register
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT3L DAT3L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT13H

DAC Data High Register
address_offset : 0xC5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT13H DAT13H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT14L

DAC Data Low Register
address_offset : 0xD2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT14L DAT14L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write


DAT14H

DAC Data High Register
address_offset : 0xE2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT14H DAT14H read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA1

DATA1 : DATA1
bits : 0 - 3 (4 bit)
access : read-write


DAT15L

DAC Data Low Register
address_offset : 0xF0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAT15L DAT15L read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA0

DATA0 : DATA0
bits : 0 - 7 (8 bit)
access : read-write



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