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MTB

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

POSITION

PERIPHID4

COMPID0

PERIPHID5

COMPID1

PERIPHID6

COMPID2

MASTER

PERIPHID7

COMPID3

PERIPHID0

PERIPHID1

PERIPHID2

FLOW

PERIPHID3

BASE

MODECTRL

TAGSET

TAGCLEAR

LOCKACCESS

LOCKSTAT

AUTHSTAT

DEVICEARCH

DEVICECFG

DEVICETYPID


POSITION

MTB Position Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

POSITION POSITION read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRAP POINTER

WRAP : WRAP
bits : 2 - 2 (1 bit)
access : read-write

POINTER : Trace Packet Address Pointer[28:0]
bits : 3 - 31 (29 bit)
access : read-write


PERIPHID4

Peripheral ID Register
address_offset : 0x1FA0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PERIPHID4 PERIPHID4 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PERIPHID

PERIPHID : PERIPHID
bits : 0 - 31 (32 bit)
access : read-only


COMPID0

Component ID Register
address_offset : 0x1FE0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

COMPID0 COMPID0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPID

COMPID : Component ID
bits : 0 - 31 (32 bit)
access : read-only


PERIPHID5

Peripheral ID Register
address_offset : 0x2F74 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PERIPHID5 PERIPHID5 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PERIPHID

PERIPHID : PERIPHID
bits : 0 - 31 (32 bit)
access : read-only


COMPID1

Component ID Register
address_offset : 0x2FD4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

COMPID1 COMPID1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPID

COMPID : Component ID
bits : 0 - 31 (32 bit)
access : read-only


PERIPHID6

Peripheral ID Register
address_offset : 0x3F4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PERIPHID6 PERIPHID6 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PERIPHID

PERIPHID : PERIPHID
bits : 0 - 31 (32 bit)
access : read-only


COMPID2

Component ID Register
address_offset : 0x3FCC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

COMPID2 COMPID2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPID

COMPID : Component ID
bits : 0 - 31 (32 bit)
access : read-only


MASTER

MTB Master Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MASTER MASTER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MASK TSTARTEN TSTOPEN SFRWPRIV RAMPRIV HALTREQ EN

MASK : Mask
bits : 0 - 4 (5 bit)
access : read-write

TSTARTEN : Trace Start Input Enable
bits : 5 - 5 (1 bit)
access : read-write

TSTOPEN : Trace Stop Input Enable
bits : 6 - 6 (1 bit)
access : read-write

SFRWPRIV : Special Function Register Write Privilege
bits : 7 - 7 (1 bit)
access : read-write

RAMPRIV : RAM Privilege
bits : 8 - 8 (1 bit)
access : read-write

HALTREQ : Halt Request
bits : 9 - 9 (1 bit)
access : read-write

EN : Main Trace Enable
bits : 31 - 31 (1 bit)
access : read-write


PERIPHID7

Peripheral ID Register
address_offset : 0x4F28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PERIPHID7 PERIPHID7 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PERIPHID

PERIPHID : PERIPHID
bits : 0 - 31 (32 bit)
access : read-only


COMPID3

Component ID Register
address_offset : 0x4FC8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

COMPID3 COMPID3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPID

COMPID : Component ID
bits : 0 - 31 (32 bit)
access : read-only


PERIPHID0

Peripheral ID Register
address_offset : 0x5F08 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PERIPHID0 PERIPHID0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PERIPHID

PERIPHID : PERIPHID
bits : 0 - 31 (32 bit)
access : read-only


PERIPHID1

Peripheral ID Register
address_offset : 0x6EEC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PERIPHID1 PERIPHID1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PERIPHID

PERIPHID : PERIPHID
bits : 0 - 31 (32 bit)
access : read-only


PERIPHID2

Peripheral ID Register
address_offset : 0x7ED4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PERIPHID2 PERIPHID2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PERIPHID

PERIPHID : PERIPHID
bits : 0 - 31 (32 bit)
access : read-only


FLOW

MTB Flow Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLOW FLOW read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AUTOSTOP AUTOHALT WATERMARK

AUTOSTOP : AUTOSTOP
bits : 0 - 0 (1 bit)
access : read-write

AUTOHALT : AUTOHALT
bits : 1 - 1 (1 bit)
access : read-write

WATERMARK : WATERMARK[28:0]
bits : 3 - 31 (29 bit)
access : read-write


PERIPHID3

Peripheral ID Register
address_offset : 0x8EC0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PERIPHID3 PERIPHID3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PERIPHID

PERIPHID : PERIPHID
bits : 0 - 31 (32 bit)
access : read-only


BASE

MTB Base Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BASE BASE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASEADDR

BASEADDR : BASEADDR
bits : 0 - 31 (32 bit)
access : read-only


MODECTRL

Integration Mode Control Register
address_offset : 0xF00 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

MODECTRL MODECTRL read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODECTRL

MODECTRL : MODECTRL
bits : 0 - 31 (32 bit)
access : read-only


TAGSET

Claim TAG Set Register
address_offset : 0xFA0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TAGSET TAGSET read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TAGSET

TAGSET : TAGSET
bits : 0 - 31 (32 bit)
access : read-only


TAGCLEAR

Claim TAG Clear Register
address_offset : 0xFA4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TAGCLEAR TAGCLEAR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TAGCLEAR

TAGCLEAR : TAGCLEAR
bits : 0 - 31 (32 bit)
access : read-only


LOCKACCESS

Lock Access Register
address_offset : 0xFB0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

LOCKACCESS LOCKACCESS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKACCESS

LOCKACCESS : Hardwired to 0x0000_0000
bits : 0 - 31 (32 bit)
access : read-only


LOCKSTAT

Lock Status Register
address_offset : 0xFB4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

LOCKSTAT LOCKSTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKSTAT

LOCKSTAT : LOCKSTAT
bits : 0 - 31 (32 bit)
access : read-only


AUTHSTAT

Authentication Status Register
address_offset : 0xFB8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

AUTHSTAT AUTHSTAT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BIT0 BIT1 BIT2 BIT3

BIT0 : Connected to DBGEN.
bits : 0 - 0 (1 bit)
access : read-only

BIT1 : BIT1
bits : 1 - 1 (1 bit)
access : read-only

BIT2 : BIT2
bits : 2 - 2 (1 bit)
access : read-only

BIT3 : BIT3
bits : 3 - 3 (1 bit)
access : read-only


DEVICEARCH

Device Architecture Register
address_offset : 0xFBC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DEVICEARCH DEVICEARCH read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEVICEARCH

DEVICEARCH : DEVICEARCH
bits : 0 - 31 (32 bit)
access : read-only


DEVICECFG

Device Configuration Register
address_offset : 0xFC8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DEVICECFG DEVICECFG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEVICECFG

DEVICECFG : DEVICECFG
bits : 0 - 31 (32 bit)
access : read-only


DEVICETYPID

Device Type Identifier Register
address_offset : 0xFCC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DEVICETYPID DEVICETYPID read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEVICETYPID

DEVICETYPID : DEVICETYPID
bits : 0 - 31 (32 bit)
access : read-only



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