\n
address_offset : 0x1 Bytes (0x0)
size : 0xF byte (0x0)
mem_usage : registers
protection : not protected
Flash CCOB Index Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCOBIX : Common Command Register Index
bits : 0 - 2 (3 bit)
access : read-write
RESERVED : no description available
bits : 3 - 7 (5 bit)
access : read-only
Flash Security Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SEC : Flash Security Bits
bits : 0 - 1 (2 bit)
access : read-only
Enumeration:
#00 : 00
Secured
#01 : 01
Secured
#10 : 10
Unsecured
#11 : 11
Secured
End of enumeration elements list.
RESERVED : no description available
bits : 2 - 5 (4 bit)
access : read-only
KEYEN : Backdoor Key Security Enable Bits
bits : 6 - 7 (2 bit)
access : read-only
Enumeration:
#00 : 00
Disabled
#01 : 01
Disabled
#10 : 10
Enabled
#11 : 11
Disabled
End of enumeration elements list.
Flash Clock Divider Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FDIV : Clock Divider Bits
bits : 0 - 5 (6 bit)
access : read-write
FDIVLCK : Clock Divider Locked
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
FDIV field is open for writing.
#1 : 1
FDIV value is locked and cannot be changed. After the lock bit is set high, only reset can clear this bit and restore writability to the FDIV field in user mode.
End of enumeration elements list.
FDIVLD : Clock Divider Loaded
bits : 7 - 7 (1 bit)
access : read-only
Enumeration:
#0 : 0
FCLKDIV register has not been written since the last reset.
#1 : 1
FCLKDIV register has been written since the last reset.
End of enumeration elements list.
Flash Status Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MGSTAT : Memory Controller Command Completion Status Flag
bits : 0 - 1 (2 bit)
access : read-only
RESERVED : no description available
bits : 2 - 2 (1 bit)
access : read-only
MGBUSY : Memory Controller Busy Flag
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
#0 : 0
Memory controller is idle.
#1 : 1
Memory controller is busy executing a flash command (CCIF = 0).
End of enumeration elements list.
FPVIOL : Flash Protection Violation Flag
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
No protection violation is detected.
#1 : 1
Protection violation is detected.
End of enumeration elements list.
ACCERR : Flash Access Error Flag
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
No access error is detected.
#1 : 1
Access error is detected.
End of enumeration elements list.
RESERVED : no description available
bits : 6 - 6 (1 bit)
access : read-only
CCIF : Command Complete Interrupt Flag
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Flash command is in progress.
#1 : 1
Flash command has completed.
End of enumeration elements list.
Flash Configuration Register
address_offset : 0x7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESERVED : no description available
bits : 0 - 4 (5 bit)
access : read-only
ERSAREQ : Debugger Mass Erase Request
bits : 5 - 5 (1 bit)
access : read-only
Enumeration:
#0 : 0
No request or request complete
#1 : 1
Request to run the Erase All Blocks command verify the erased state program the security byte in the Flash Configuration Field to the unsecure state release MCU security by setting FSEC[SEC] to the unsecure state
End of enumeration elements list.
RESERVED : no description available
bits : 6 - 6 (1 bit)
access : read-only
CCIE : Command Complete Interrupt Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Command complete interrupt is disabled.
#1 : 1
An interrupt will be requested whenever the CCIF flag in the FSTAT register is set.
End of enumeration elements list.
Flash Common Command Object Register: Low
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCOB : Common Command Object Bit 7:0
bits : 0 - 7 (8 bit)
access : read-write
Flash Common Command Object Register:High
address_offset : 0x9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCOB : Common Command Object Bit 15:8
bits : 0 - 7 (8 bit)
access : read-write
Flash Protection Register
address_offset : 0xB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FPLS : Flash Protection Lower Address Size
bits : 0 - 1 (2 bit)
access : read-write
FPLDIS : Flash Protection Lower Address Range Disable
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Protection/Unprotection enabled.
#1 : 1
Protection/Unprotection disabled.
End of enumeration elements list.
FPHS : Flash Protection Higher Address Size
bits : 3 - 4 (2 bit)
access : read-write
FPHDIS : Flash Protection Higher Address Range Disable
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Protection/Unprotection enabled.
#1 : 1
Protection/Unprotection disabled.
End of enumeration elements list.
RNV6 : Reserved Nonvolatile Bit
bits : 6 - 6 (1 bit)
access : read-only
FPOPEN : Flash Protection Operation Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
When FPOPEN is clear, the FPHDIS and FPLDIS fields define unprotected address ranges as specified by the corresponding FPHS and FPLS fields.
#1 : 1
When FPOPEN is set, the FPHDIS and FPLDIS fields enable protection for the address range specified by the corresponding FPHS and FPLS fields.
End of enumeration elements list.
Flash Option Register
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
NV : Nonvolatile Bits
bits : 0 - 7 (8 bit)
access : read-only
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