\n

NVIC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x320 byte (0x0)
mem_usage : registers
protection : not protected

Registers

ISER

ISPR

ICPR

IPR0

IPR1

IPR2

IPR3

IPR4

IPR5

IPR6

IPR7

ICER


ISER

Interrupt Set Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISER ISER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETENA

SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
access : read-write


ISPR

Interrupt Set Pending Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISPR ISPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETPEND

SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
access : read-write


ICPR

Interrupt Clear Pending Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICPR ICPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRPEND

CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
access : read-write


IPR0

Interrupt Priority Register n
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR0 IPR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_0 PRI_1 PRI_2 PRI_3

PRI_0 : Priority of interrupt 0
bits : 0 - 7 (8 bit)
access : read-write

PRI_1 : Priority of interrupt 1
bits : 8 - 15 (8 bit)
access : read-write

PRI_2 : Priority of interrupt 2
bits : 16 - 23 (8 bit)
access : read-write

PRI_3 : Priority of interrupt 3
bits : 24 - 31 (8 bit)
access : read-write


IPR1

Interrupt Priority Register n
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR1 IPR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_4 PRI_5 PRI_6 PRI_7

PRI_4 : Priority of interrupt 4
bits : 0 - 7 (8 bit)
access : read-write

PRI_5 : Priority of interrupt 5
bits : 8 - 15 (8 bit)
access : read-write

PRI_6 : Priority of interrupt 6
bits : 16 - 23 (8 bit)
access : read-write

PRI_7 : Priority of interrupt 7
bits : 24 - 31 (8 bit)
access : read-write


IPR2

Interrupt Priority Register n
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR2 IPR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_8 PRI_9 PRI_10 PRI_11

PRI_8 : Priority of interrupt 8
bits : 0 - 7 (8 bit)
access : read-write

PRI_9 : Priority of interrupt 9
bits : 8 - 15 (8 bit)
access : read-write

PRI_10 : Priority of interrupt 10
bits : 16 - 23 (8 bit)
access : read-write

PRI_11 : Priority of interrupt 11
bits : 24 - 31 (8 bit)
access : read-write


IPR3

Interrupt Priority Register n
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR3 IPR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_12 PRI_13 PRI_14 PRI_15

PRI_12 : Priority of interrupt 11
bits : 0 - 7 (8 bit)
access : read-write

PRI_13 : Priority of interrupt 12
bits : 8 - 15 (8 bit)
access : read-write

PRI_14 : Priority of interrupt 14
bits : 16 - 23 (8 bit)
access : read-write

PRI_15 : Priority of interrupt 15
bits : 24 - 31 (8 bit)
access : read-write


IPR4

Interrupt Priority Register n
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR4 IPR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_16 PRI_17 PRI_18 PRI_19

PRI_16 : Priority of interrupt 17
bits : 0 - 7 (8 bit)
access : read-write

PRI_17 : Priority of interrupt 18
bits : 8 - 15 (8 bit)
access : read-write

PRI_18 : Priority of interrupt 19
bits : 16 - 23 (8 bit)
access : read-write

PRI_19 : Priority of interrupt 20
bits : 24 - 31 (8 bit)
access : read-write


IPR5

Interrupt Priority Register n
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR5 IPR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_20 PRI_21 PRI_22 PRI_23

PRI_20 : Priority of interrupt 0
bits : 0 - 7 (8 bit)
access : read-write

PRI_21 : Priority of interrupt 21
bits : 8 - 15 (8 bit)
access : read-write

PRI_22 : Priority of interrupt 22
bits : 16 - 23 (8 bit)
access : read-write

PRI_23 : Priority of interrupt 23
bits : 24 - 31 (8 bit)
access : read-write


IPR6

Interrupt Priority Register n
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR6 IPR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_24 PRI_25 PRI_26 PRI_27

PRI_24 : Priority of interrupt 24
bits : 0 - 7 (8 bit)
access : read-write

PRI_25 : Priority of interrupt 25
bits : 8 - 15 (8 bit)
access : read-write

PRI_26 : Priority of interrupt 26
bits : 16 - 23 (8 bit)
access : read-write

PRI_27 : Priority of interrupt 27
bits : 24 - 31 (8 bit)
access : read-write


IPR7

Interrupt Priority Register n
address_offset : 0x31C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR7 IPR7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_28 PRI_29 PRI_30 PRI_31

PRI_28 : Priority of interrupt 28
bits : 0 - 7 (8 bit)
access : read-write

PRI_29 : Priority of interrupt 29
bits : 8 - 15 (8 bit)
access : read-write

PRI_30 : Priority of interrupt 30
bits : 16 - 23 (8 bit)
access : read-write

PRI_31 : Priority of interrupt 31
bits : 24 - 31 (8 bit)
access : read-write


ICER

Interrupt Clear Enable Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICER ICER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRENA

CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
access : read-write



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