\n
address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x10 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x14 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x18 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x4 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
Enable Interrupt Request Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN0 : Bit0 of ENIR
bits : 0 - -1 (0 bit)
access : read-write
EN1 : Bit1 of ENIR
bits : 1 - 0 (0 bit)
access : read-write
EN2 : Bit2 of ENIR
bits : 2 - 1 (0 bit)
access : read-write
EN3 : Bit3 of ENIR
bits : 3 - 2 (0 bit)
access : read-write
EN4 : Bit4 of ENIR
bits : 4 - 3 (0 bit)
access : read-write
EN5 : Bit5 of ENIR
bits : 5 - 4 (0 bit)
access : read-write
EN6 : Bit6 of ENIR
bits : 6 - 5 (0 bit)
access : read-write
EN7 : Bit7 of ENIR
bits : 7 - 6 (0 bit)
access : read-write
EN8 : Bit8 of ENIR
bits : 8 - 7 (0 bit)
access : read-write
EN10 : Bit10 of ENIR
bits : 10 - 9 (0 bit)
access : read-write
EN11 : Bit11 of ENIR
bits : 11 - 10 (0 bit)
access : read-write
EN12 : Bit12 of ENIR
bits : 12 - 11 (0 bit)
access : read-write
EN13 : Bit13 of ENIR
bits : 13 - 12 (0 bit)
access : read-write
EN14 : Bit14 of ENIR
bits : 14 - 13 (0 bit)
access : read-write
EN15 : Bit15 of ENIR
bits : 15 - 14 (0 bit)
access : read-write
EN16 : Bit16 of ENIR
bits : 16 - 15 (0 bit)
access : read-write
EN17 : Bit17 of ENIR
bits : 17 - 16 (0 bit)
access : read-write
EN18 : Bit18 of ENIR
bits : 18 - 17 (0 bit)
access : read-write
EN19 : Bit19 of ENIR
bits : 19 - 18 (0 bit)
access : read-write
EN20 : Bit20 of ENIR
bits : 20 - 19 (0 bit)
access : read-write
EN21 : Bit21 of ENIR
bits : 21 - 20 (0 bit)
access : read-write
EN22 : Bit22 of ENIR
bits : 22 - 21 (0 bit)
access : read-write
EN23 : Bit23 of ENIR
bits : 23 - 22 (0 bit)
access : read-write
External Interrupt Level Register 1
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LA16 : Bit0 of ELVR1
bits : 0 - -1 (0 bit)
access : read-write
LB16 : Bit1 of ELVR1
bits : 1 - 0 (0 bit)
access : read-write
LA17 : Bit2 of ELVR1
bits : 2 - 1 (0 bit)
access : read-write
LB17 : Bit3 of ELVR1
bits : 3 - 2 (0 bit)
access : read-write
LA18 : Bit4 of ELVR1
bits : 4 - 3 (0 bit)
access : read-write
LB18 : Bit5 of ELVR1
bits : 5 - 4 (0 bit)
access : read-write
LA19 : Bit6 of ELVR1
bits : 6 - 5 (0 bit)
access : read-write
LB19 : Bit7 of ELVR1
bits : 7 - 6 (0 bit)
access : read-write
LA20 : Bit8 of ELVR1
bits : 8 - 7 (0 bit)
access : read-write
LB20 : Bit9 of ELVR1
bits : 9 - 8 (0 bit)
access : read-write
LA21 : Bit10 of ELVR1
bits : 10 - 9 (0 bit)
access : read-write
LB21 : Bit11 of ELVR1
bits : 11 - 10 (0 bit)
access : read-write
LA22 : Bit12 of ELVR1
bits : 12 - 11 (0 bit)
access : read-write
LB22 : Bit13 of ELVR1
bits : 13 - 12 (0 bit)
access : read-write
LA23 : Bit14 of ELVR1
bits : 14 - 13 (0 bit)
access : read-write
LB23 : Bit15 of ELVR1
bits : 15 - 14 (0 bit)
access : read-write
Non Maskable Interrupt Request Register
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
NR : NMI interrupt request detection bit
bits : 0 - -1 (0 bit)
access : read-only
Non Maskable Interrupt Clear Register
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NCL : NMI interrupt cause clear bit
bits : 0 - -1 (0 bit)
access : read-write
External Interrupt Request Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ER0 : Bit0 of EIRR
bits : 0 - -1 (0 bit)
access : read-only
ER1 : Bit1 of EIRR
bits : 1 - 0 (0 bit)
access : read-only
ER2 : Bit2 of EIRR
bits : 2 - 1 (0 bit)
access : read-only
ER3 : Bit3 of EIRR
bits : 3 - 2 (0 bit)
access : read-only
ER4 : Bit4 of EIRR
bits : 4 - 3 (0 bit)
access : read-only
ER5 : Bit5 of EIRR
bits : 5 - 4 (0 bit)
access : read-only
ER6 : Bit6 of EIRR
bits : 6 - 5 (0 bit)
access : read-only
ER7 : Bit7 of EIRR
bits : 7 - 6 (0 bit)
access : read-only
ER8 : Bit8 of EIRR
bits : 8 - 7 (0 bit)
access : read-only
ER10 : Bit10 of EIRR
bits : 10 - 9 (0 bit)
access : read-only
ER11 : Bit11 of EIRR
bits : 11 - 10 (0 bit)
access : read-only
ER12 : Bit12 of EIRR
bits : 12 - 11 (0 bit)
access : read-only
ER13 : Bit13 of EIRR
bits : 13 - 12 (0 bit)
access : read-only
ER14 : Bit14 of EIRR
bits : 14 - 13 (0 bit)
access : read-only
ER15 : Bit15 of EIRR
bits : 15 - 14 (0 bit)
access : read-only
ER16 : Bit16 of EIRR
bits : 16 - 15 (0 bit)
access : read-write
ER17 : Bit17 of EIRR
bits : 17 - 16 (0 bit)
access : read-write
ER18 : Bit18 of EIRR
bits : 18 - 17 (0 bit)
access : read-write
ER19 : Bit19 of EIRR
bits : 19 - 18 (0 bit)
access : read-write
ER20 : Bit20 of EIRR
bits : 20 - 19 (0 bit)
access : read-write
ER21 : Bit21 of EIRR
bits : 21 - 20 (0 bit)
access : read-write
ER22 : Bit22 of EIRR
bits : 22 - 21 (0 bit)
access : read-write
ER23 : Bit23 of EIRR
bits : 23 - 22 (0 bit)
access : read-write
External Interrupt Clear Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ECL0 : Bit0 of EICL
bits : 0 - -1 (0 bit)
access : read-write
ECL1 : Bit1 of EICL
bits : 1 - 0 (0 bit)
access : read-write
ECL2 : Bit2 of EICL
bits : 2 - 1 (0 bit)
access : read-write
ECL3 : Bit3 of EICL
bits : 3 - 2 (0 bit)
access : read-write
ECL4 : Bit4 of EICL
bits : 4 - 3 (0 bit)
access : read-write
ECL5 : Bit5 of EICL
bits : 5 - 4 (0 bit)
access : read-write
ECL6 : Bit6 of EICL
bits : 6 - 5 (0 bit)
access : read-write
ECL7 : Bit7 of EICL
bits : 7 - 6 (0 bit)
access : read-write
ECL8 : Bit8 of EICL
bits : 8 - 7 (0 bit)
access : read-write
ECL10 : Bit10 of EICL
bits : 10 - 9 (0 bit)
access : read-write
ECL11 : Bit11 of EICL
bits : 11 - 10 (0 bit)
access : read-write
ECL12 : Bit12 of EICL
bits : 12 - 11 (0 bit)
access : read-write
ECL13 : Bit13 of EICL
bits : 13 - 12 (0 bit)
access : read-write
ECL14 : Bit14 of EICL
bits : 14 - 13 (0 bit)
access : read-write
ECL15 : Bit15 of EICL
bits : 15 - 14 (0 bit)
access : read-write
ECL16 : Bit16 of EICL
bits : 16 - 15 (0 bit)
access : read-write
ECL17 : Bit17 of EICL
bits : 17 - 16 (0 bit)
access : read-write
ECL18 : Bit18 of EICL
bits : 18 - 17 (0 bit)
access : read-write
ECL19 : Bit19 of EICL
bits : 19 - 18 (0 bit)
access : read-write
ECL20 : Bit20 of EICL
bits : 20 - 19 (0 bit)
access : read-write
ECL21 : Bit21 of EICL
bits : 21 - 20 (0 bit)
access : read-write
ECL22 : Bit22 of EICL
bits : 22 - 21 (0 bit)
access : read-write
ECL23 : Bit23 of EICL
bits : 23 - 22 (0 bit)
access : read-write
External Interrupt Level Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LA0 : Bit0 of ELVR
bits : 0 - -1 (0 bit)
access : read-write
LB0 : Bit1 of ELVR
bits : 1 - 0 (0 bit)
access : read-write
LA1 : Bit2 of ELVR
bits : 2 - 1 (0 bit)
access : read-write
LB1 : Bit3 of ELVR
bits : 3 - 2 (0 bit)
access : read-write
LA2 : Bit4 of ELVR
bits : 4 - 3 (0 bit)
access : read-write
LB2 : Bit5 of ELVR
bits : 5 - 4 (0 bit)
access : read-write
LA3 : Bit6 of ELVR
bits : 6 - 5 (0 bit)
access : read-write
LB3 : Bit7 of ELVR
bits : 7 - 6 (0 bit)
access : read-write
LA4 : Bit8 of ELVR
bits : 8 - 7 (0 bit)
access : read-write
LB4 : Bit9 of ELVR
bits : 9 - 8 (0 bit)
access : read-write
LA5 : Bit10 of ELVR
bits : 10 - 9 (0 bit)
access : read-write
LB5 : Bit11 of ELVR
bits : 11 - 10 (0 bit)
access : read-write
LA6 : Bit12 of ELVR
bits : 12 - 11 (0 bit)
access : read-write
LB6 : Bit13 of ELVR
bits : 13 - 12 (0 bit)
access : read-write
LA7 : Bit14 of ELVR
bits : 14 - 13 (0 bit)
access : read-write
LB7 : Bit15 of ELVR
bits : 15 - 14 (0 bit)
access : read-write
LA8 : Bit16 of ELVR
bits : 16 - 15 (0 bit)
access : read-write
LB8 : Bit17 of ELVR
bits : 17 - 16 (0 bit)
access : read-write
LA10 : Bit20 of ELVR
bits : 20 - 19 (0 bit)
access : read-write
LB10 : Bit21 of ELVR
bits : 21 - 20 (0 bit)
access : read-write
LA11 : Bit22 of ELVR
bits : 22 - 21 (0 bit)
access : read-write
LB11 : Bit23 of ELVR
bits : 23 - 22 (0 bit)
access : read-write
LA12 : Bit24 of ELVR
bits : 24 - 23 (0 bit)
access : read-write
LB12 : Bit25 of ELVR
bits : 25 - 24 (0 bit)
access : read-write
LA13 : Bit26 of ELVR
bits : 26 - 25 (0 bit)
access : read-write
LB13 : Bit27 of ELVR
bits : 27 - 26 (0 bit)
access : read-write
LA14 : Bit28 of ELVR
bits : 28 - 27 (0 bit)
access : read-write
LB14 : Bit29 of ELVR
bits : 29 - 28 (0 bit)
access : read-write
LA15 : Bit30 of ELVR
bits : 30 - 29 (0 bit)
access : read-write
LB15 : Bit31 of ELVR
bits : 31 - 30 (0 bit)
access : read-write
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