\n
address_offset : 0x0 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x4 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
High-speed CR oscillation Frequency Division Setup Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR : High-speed CR oscillation frequency division ratio setting bits
bits : 0 - 1 (2 bit)
access : read-write
High-speed CR oscillation Frequency Trimming Register
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRD : Frequency trimming setup bits
bits : 0 - 8 (9 bit)
access : read-write
High-speed CR oscillation Temperature Trimming Register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRT : Temperature trimming setup bits
bits : 0 - 3 (4 bit)
access : read-write
High-Speed CR Oscillation Register Write-Protect Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRMLCK : Register write-protect bits
bits : 0 - 30 (31 bit)
access : read-write
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