\n
address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x14 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x10 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x100 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x104 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x200 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x204 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x208 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x20C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x210 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x214 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x218 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x240 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x244 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x248 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x24C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x250 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x254 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x258 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x380 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
PPG Start Trigger Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STR0 : 8-bit UP counter operation enable bit for comparison
bits : 8 - 7 (0 bit)
access : read-write
MONI0 : 8-bit UP counter operation state monitor bit for comparison
bits : 9 - 8 (0 bit)
access : read-only
CS0 : 8-bit UP counter clock select bits for comparison
bits : 10 - 10 (1 bit)
access : read-write
TRG0O : PPG0 trigger stop bit
bits : 12 - 11 (0 bit)
access : read-write
TRG2O : PPG2 trigger stop bit
bits : 13 - 12 (0 bit)
access : read-write
TRG4O : PPG4 trigger stop bit
bits : 14 - 13 (0 bit)
access : read-write
TRG6O : PPG6 trigger stop bit
bits : 15 - 14 (0 bit)
access : read-write
PPG Compare Register 4
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG Start Register 0
address_offset : 0x100 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PEN00 : PPG0 Start Trigger bit
bits : 0 - -1 (0 bit)
access : read-write
PEN01 : PPG1 Start Trigger bit
bits : 1 - 0 (0 bit)
access : read-write
PEN02 : PPG2 Start Trigger bit
bits : 2 - 1 (0 bit)
access : read-write
PEN03 : PPG3 Start Trigger bit
bits : 3 - 2 (0 bit)
access : read-write
PEN04 : PPG4 Start Trigger bit
bits : 4 - 3 (0 bit)
access : read-write
PEN05 : PPG5 Start Trigger bit
bits : 5 - 4 (0 bit)
access : read-write
PEN06 : PPG6 Start Trigger bit
bits : 6 - 5 (0 bit)
access : read-write
PEN07 : PPG7 Start Trigger bit
bits : 7 - 6 (0 bit)
access : read-write
Output Reverse Register 0
address_offset : 0x104 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REV00 : PPG0 Output Reverse Enable bit
bits : 0 - -1 (0 bit)
access : read-write
REV01 : PPG1 Output Reverse Enable bit
bits : 1 - 0 (0 bit)
access : read-write
REV02 : PPG2 Output Reverse Enable bit
bits : 2 - 1 (0 bit)
access : read-write
REV03 : PPG3 Output Reverse Enable bit
bits : 3 - 2 (0 bit)
access : read-write
REV04 : PPG4 Output Reverse Enable bit
bits : 4 - 3 (0 bit)
access : read-write
REV05 : PPG5 Output Reverse Enable bit
bits : 5 - 4 (0 bit)
access : read-write
REV06 : PPG6 Output Reverse Enable bit
bits : 6 - 5 (0 bit)
access : read-write
REV07 : PPG7 Output Reverse Enable bit
bits : 7 - 6 (0 bit)
access : read-write
PPG Compare Register 6
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG Operation Mode Control Register 1
address_offset : 0x200 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG Operation Mode Control Register 0
address_offset : 0x201 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TTRG : PPG start trigger select bit
bits : 0 - -1 (0 bit)
access : read-write
MD : PPG Operation Mode Set bits
bits : 1 - 1 (1 bit)
access : read-write
PCS : PPG DOWN Counter Operation Clock Select bits
bits : 3 - 3 (1 bit)
access : read-write
INTM : Interrupt Mode Select bit
bits : 5 - 4 (0 bit)
access : read-write
PUF : PPG Counter Underflow bit
bits : 6 - 5 (0 bit)
access : read-write
PIE : PPG Interrupt Enable bit
bits : 7 - 6 (0 bit)
access : read-write
PPG Operation Mode Control Register 3
address_offset : 0x204 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG Operation Mode Control Register 2
address_offset : 0x205 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG0 Reload Registers Low
address_offset : 0x208 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRLL : Reload Registers Low
bits : 0 - 6 (7 bit)
access : read-write
PPG0 Reload Registers High
address_offset : 0x209 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRLH : Reload Registers High
bits : 0 - 6 (7 bit)
access : read-write
PPG1 Reload Registers Low
address_offset : 0x20C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG1 Reload Registers High
address_offset : 0x20D Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG2 Reload Registers Low
address_offset : 0x210 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG2 Reload Registers High
address_offset : 0x211 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG3 Reload Registers Low
address_offset : 0x214 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG3 Reload Registers High
address_offset : 0x215 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG Gate Function Control Registers 0
address_offset : 0x218 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EDGE0 : Select Start Effective Level for PPG0
bits : 0 - -1 (0 bit)
access : read-write
STRG0 : Select a trigger for PPG0
bits : 1 - 0 (0 bit)
access : read-write
EDGE2 : Select Start Effective Level for PPG2
bits : 4 - 3 (0 bit)
access : read-write
STRG2 : Select a trigger for PPG2
bits : 5 - 4 (0 bit)
access : read-write
PPG Operation Mode Control Register 5
address_offset : 0x240 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG Operation Mode Control Register 4
address_offset : 0x241 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG Operation Mode Control Register 7
address_offset : 0x244 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG Operation Mode Control Register 6
address_offset : 0x245 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG4 Reload Registers Low
address_offset : 0x248 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG4 Reload Registers High
address_offset : 0x249 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG5 Reload Registers Low
address_offset : 0x24C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG5 Reload Registers High
address_offset : 0x24D Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG6 Reload Registers Low
address_offset : 0x250 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG6 Reload Registers High
address_offset : 0x251 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG7 Reload Registers Low
address_offset : 0x254 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG7 Reload Registers High
address_offset : 0x255 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG Gate Function Control Registers 4
address_offset : 0x258 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EDGE4 : Select Start Effective Level for PPG4
bits : 0 - -1 (0 bit)
access : read-write
STRG4 : Select a trigger for PPG4
bits : 1 - 0 (0 bit)
access : read-write
EDGE6 : Select Start Effective Level for PPG6
bits : 4 - 3 (0 bit)
access : read-write
STRG6 : Select a trigger for PPG6
bits : 5 - 4 (0 bit)
access : read-write
IGBT Mode Control Register
address_offset : 0x380 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IGBTMD : IGBT mode selection bit
bits : 0 - -1 (0 bit)
access : read-write
IGTRGLV : Trigger input level selection bit
bits : 1 - 0 (0 bit)
access : read-write
IGOSEL : Output level selection bit
bits : 2 - 2 (1 bit)
access : read-write
IGNFW : Noise filter width selection bit
bits : 4 - 5 (2 bit)
access : read-write
IGATIH : Stop prohibition mode selection in output active bit
bits : 7 - 6 (0 bit)
access : read-write
PPG Compare Register 0
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PPG Compare Register 2
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
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