\n
address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x10 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x100 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
Flash Access Size Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ASZ : Flash Access Size
bits : 0 - 0 (1 bit)
access : read-write
Flash Sync Down Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SD : Flash Sync
bits : 0 - 1 (2 bit)
access : read-write
CR Trimming Data Mirror Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TRMM : CR Trimming Data Mirror
bits : 0 - 8 (9 bit)
access : read-only
Flash Read Wait Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RWT : Read Wait Cycle
bits : 0 - 0 (1 bit)
access : read-write
Flash Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RDY : Flash Rdy
bits : 0 - -1 (0 bit)
access : read-only
HNG : Flash Hang flag
bits : 1 - 0 (0 bit)
access : read-only
ERR : Flash ECC Error
bits : 2 - 1 (0 bit)
access : read-write
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