\n
address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x4 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x10 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x14 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x18 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1D Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
Serial Mode Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0
SOE : Serial data output enable bit
bits : 0 - -1 (0 bit)
access : read-write
BDS : Transfer direction select bit
bits : 2 - 1 (0 bit)
access : read-write
SBL : Stop bit length select bit
bits : 3 - 2 (0 bit)
access : read-write
WUCR : Wake-up control bit
bits : 4 - 3 (0 bit)
access : read-write
MD : Operation mode set bit
bits : 5 - 6 (2 bit)
access : read-write
Serial Mode Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0
SOE : Serial data output enable bit
bits : 0 - -1 (0 bit)
access : read-write
SCKE : Master mode serial clock output enable bit
bits : 1 - 0 (0 bit)
access : read-write
BDS : Transfer direction select bit
bits : 2 - 1 (0 bit)
access : read-write
SCINV : Serial clock invert bit
bits : 3 - 2 (0 bit)
access : read-write
WUCR : Wake-up control bit
bits : 4 - 3 (0 bit)
access : read-write
MD : Operation mode set bits
bits : 5 - 6 (2 bit)
access : read-write
Serial Mode Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0
SOE : Serial data output enable bit
bits : 0 - -1 (0 bit)
access : read-write
SBL : Stop bit length select bit
bits : 3 - 2 (0 bit)
access : read-write
WUCR : Wake-up control bit
bits : 4 - 3 (0 bit)
access : read-write
MD : Operation mode setting bits
bits : 5 - 6 (2 bit)
access : read-write
Serial Mode Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
TIE : Transmit interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write
RIE : Received interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write
WUCR : Wake-up control bit
bits : 4 - 3 (0 bit)
access : read-write
MD : operation mode set bits
bits : 5 - 6 (2 bit)
access : read-write
Serial Control Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0
TXE : Transmission operation enable bit
bits : 0 - -1 (0 bit)
access : read-write
RXE : Received operation enable bit
bits : 1 - 0 (0 bit)
access : read-write
TBIE : Transmit bus idle interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write
TIE : Transmit interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write
RIE : Received interrupt enable bit
bits : 4 - 3 (0 bit)
access : read-write
UPCL : Programmable Clear bit
bits : 7 - 6 (0 bit)
access : read-write
Serial Control Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0
TXE : Data transmission enable bit
bits : 0 - -1 (0 bit)
access : read-write
RXE : Data received enable bit
bits : 1 - 0 (0 bit)
access : read-write
TBIE : Transmit bus idle interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write
TIE : Transmit interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write
RIE : Received interrupt enable bit
bits : 4 - 3 (0 bit)
access : read-write
SPI : SPI corresponding bit
bits : 5 - 4 (0 bit)
access : read-write
MS : Master/Slave function select bit
bits : 6 - 5 (0 bit)
access : read-write
UPCL : Programmable clear bit
bits : 7 - 6 (0 bit)
access : read-write
Serial Control Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0
TXE : Data transmission enable bit
bits : 0 - -1 (0 bit)
access : read-write
RXE : Data reception enable bit
bits : 1 - 0 (0 bit)
access : read-write
TBIE : Transmit bus idle interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write
TIE : Transmit interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write
RIE : Received interrupt enable bit
bits : 4 - 3 (0 bit)
access : read-write
LBR : LIN Break Field setting bit (valid in master mode only)
bits : 5 - 4 (0 bit)
access : read-write
MS : Master/Slave function select bit
bits : 6 - 5 (0 bit)
access : read-write
UPCL : Programmable clear bit
bits : 7 - 6 (0 bit)
access : read-write
I2C Bus Control Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
INT : interrupt flag bit
bits : 0 - -1 (0 bit)
access : read-write
BER : Bus error flag bit
bits : 1 - 0 (0 bit)
access : read-only
INTE : Interrupt enable bit
bits : 2 - 1 (0 bit)
access : read-write
CNDE : Condition detection interrupt enable bit
bits : 3 - 2 (0 bit)
access : read-write
WSEL : Wait selection bit
bits : 4 - 3 (0 bit)
access : read-write
ACKE : Data byte acknowledge enable bit
bits : 5 - 4 (0 bit)
access : read-write
ACT_SCC : Operation flag/iteration start condition generation bit
bits : 6 - 5 (0 bit)
access : read-write
MSS : Master/slave select bit
bits : 7 - 6 (0 bit)
access : read-write
7-bit Slave Address Register
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
SA : 7-bit slave address
bits : 0 - 5 (6 bit)
access : read-write
SAEN : Slave address enable bit
bits : 7 - 6 (0 bit)
access : read-write
7-bit Slave Address Mask Register
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
SM : Slave address mask bits
bits : 0 - 5 (6 bit)
access : read-write
EN : I2C interface operation enable bit
bits : 7 - 6 (0 bit)
access : read-write
FIFO Control Register 0
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0
FE1 : FIFO1 operation enable bit
bits : 0 - -1 (0 bit)
access : read-write
FE2 : FIFO2 operation enable bit
bits : 1 - 0 (0 bit)
access : read-write
FCL1 : FIFO1 reset bit
bits : 2 - 1 (0 bit)
access : read-write
FCL2 : FIFO2 reset bit
bits : 3 - 2 (0 bit)
access : read-write
FSET : FIFO pointer save bit
bits : 4 - 3 (0 bit)
access : read-write
FLD : FIFO pointer reload bit
bits : 5 - 4 (0 bit)
access : read-write
FLST : FIFO re-transmit data lost flag bit
bits : 6 - 5 (0 bit)
access : read-only
FIFO Control Register 0
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0
FE1 : FIFO1 operation enable bit
bits : 0 - -1 (0 bit)
access : read-write
FE2 : FIFO2 operation enable bit
bits : 1 - 0 (0 bit)
access : read-write
FCL1 : FIFO1 reset bit
bits : 2 - 1 (0 bit)
access : read-write
FCL2 : FIFO2 reset bit
bits : 3 - 2 (0 bit)
access : read-write
FSET : FIFO pointer save bit
bits : 4 - 3 (0 bit)
access : read-write
FLD : FIFO pointer reload bit
bits : 5 - 4 (0 bit)
access : read-write
FLST : FIFO re-transmit data lost flag bit
bits : 6 - 5 (0 bit)
access : read-only
FIFO Control Register 0
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0
FE1 : FIFO1 operation enable bit
bits : 0 - -1 (0 bit)
access : read-write
FE2 : FIFO2 operation enable bit
bits : 1 - 0 (0 bit)
access : read-write
FCL1 : FIFO1 reset bit
bits : 2 - 1 (0 bit)
access : read-write
FCL2 : FIFO2 reset bit
bits : 3 - 2 (0 bit)
access : read-write
FSET : FIFO pointer save bit
bits : 4 - 3 (0 bit)
access : read-write
FLD : FIFO pointer reload bit
bits : 5 - 4 (0 bit)
access : read-write
FLST : FIFO re-transmit data lost flag bit
bits : 6 - 5 (0 bit)
access : read-only
FIFO Control Register 0
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
FE1 : FIFO1 operation enable bit
bits : 0 - -1 (0 bit)
access : read-write
FE2 : FIFO2 operation enable bit
bits : 1 - 0 (0 bit)
access : read-write
FCL1 : FIFO1 reset bit
bits : 2 - 1 (0 bit)
access : read-write
FCL2 : FIFO2 reset bit
bits : 3 - 2 (0 bit)
access : read-write
FSET : FIFO pointer save bit
bits : 4 - 3 (0 bit)
access : read-write
FLD : FIFO pointer reload bit
bits : 5 - 4 (0 bit)
access : read-write
FLST : FIFO re-transmit data lost flag bit
bits : 6 - 5 (0 bit)
access : read-only
FIFO Control Register 1
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0
FSEL : FIFO select bit
bits : 0 - -1 (0 bit)
access : read-write
FTIE : Transmit FIFO interrupt enable bit
bits : 1 - 0 (0 bit)
access : read-write
FDRQ : Transmit FIFO data request bit
bits : 2 - 1 (0 bit)
access : read-write
FRIIE : Received FIFO idle detection enable bit
bits : 3 - 2 (0 bit)
access : read-write
FLSTE : Re-transmission data lost detect enable bit
bits : 4 - 3 (0 bit)
access : read-write
FIFO Control Register 1
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0
FSEL : FIFO select bit
bits : 0 - -1 (0 bit)
access : read-write
FTIE : Transmit FIFO interrupt enable bit
bits : 1 - 0 (0 bit)
access : read-write
FDRQ : Transmit FIFO data request bit
bits : 2 - 1 (0 bit)
access : read-write
FRIIE : Received FIFO idle detection enable bit
bits : 3 - 2 (0 bit)
access : read-write
FLSTE : Re-transmission data lost detect enable bit
bits : 4 - 3 (0 bit)
access : read-write
FIFO Control Register 1
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0
FSEL : FIFO select bit
bits : 0 - -1 (0 bit)
access : read-write
FTIE : Transmit FIFO interrupt enable bit
bits : 1 - 0 (0 bit)
access : read-write
FDRQ : Transmit FIFO data request bit
bits : 2 - 1 (0 bit)
access : read-write
FRIIE : Received FIFO idle detection enable bit
bits : 3 - 2 (0 bit)
access : read-write
FLSTE : Re-transmission data lost detect enable bit
bits : 4 - 3 (0 bit)
access : read-write
FIFO Control Register 1
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
FSEL : FIFO select bit
bits : 0 - -1 (0 bit)
access : read-write
FTIE : Transmit FIFO interrupt enable bit
bits : 1 - 0 (0 bit)
access : read-write
FDRQ : Transmit FIFO data request bit
bits : 2 - 1 (0 bit)
access : read-write
FRIIE : Received FIFO idle detection enable bit
bits : 3 - 2 (0 bit)
access : read-write
FLSTE : Re-transmission data lost detect enable bit
bits : 4 - 3 (0 bit)
access : read-write
FIFO Byte Register 1
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0
FIFO Byte Register 1
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0
FIFO Byte Register 1
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0
FIFO Byte Register 1
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
FIFO Byte Register 2
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0
FIFO Byte Register 2
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0
FIFO Byte Register 2
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0
FIFO Byte Register 2
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
Extension I2C Bus Control Register
address_offset : 0x1D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
BEC : Bus error control bit
bits : 0 - -1 (0 bit)
access : read-write
SOCE : Serial output enabled bit
bits : 1 - 0 (0 bit)
access : read-write
SCLC : SCL output control bit
bits : 2 - 1 (0 bit)
access : read-write
SDAC : SDA output control bit
bits : 3 - 2 (0 bit)
access : read-write
SCLS : SCL status bit
bits : 4 - 3 (0 bit)
access : read-write
SDAS : SDA status bit
bits : 5 - 4 (0 bit)
access : read-write
Extended Communication Control Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0
L : Data length select bit
bits : 0 - 1 (2 bit)
access : read-write
P : Parity select bit (only functions in operation mode 0)
bits : 3 - 2 (0 bit)
access : read-write
PEN : Parity enable bit (only functions in operation mode 0)
bits : 4 - 3 (0 bit)
access : read-write
INV : Inverted serial data format bit
bits : 5 - 4 (0 bit)
access : read-write
ESBL : Extension stop bit length select bit
bits : 6 - 5 (0 bit)
access : read-write
FLWEN : Flow control enable bit
bits : 7 - 6 (0 bit)
access : read-write
Extended Communication Control Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0
L : Data length select bits
bits : 0 - 1 (2 bit)
access : read-write
WT : Data transmit/received wait select bits
bits : 3 - 3 (1 bit)
access : read-write
SOP : Serial output pin set bit
bits : 7 - 6 (0 bit)
access : read-write
Extended Communication Control Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0
DEL : LIN Break delimiter length select bits (valid in master mode only)
bits : 0 - 0 (1 bit)
access : read-write
LBL : LIN Break field length select bits (valid in master mode only)
bits : 2 - 2 (1 bit)
access : read-write
LBIE : LIN Break field detect interrupt enable bit
bits : 4 - 3 (0 bit)
access : read-write
ESBL : Extended stop bit length select bit
bits : 6 - 5 (0 bit)
access : read-write
I2C Bus Status Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
BB : Bus state bit
bits : 0 - -1 (0 bit)
access : read-only
SPC : Stop condition check bit
bits : 1 - 0 (0 bit)
access : read-write
RSC : Iteration start condition check bit
bits : 2 - 1 (0 bit)
access : read-write
AL : Arbitration lost bit
bits : 3 - 2 (0 bit)
access : read-only
TRX : Data direction bit
bits : 4 - 3 (0 bit)
access : read-only
RSA : Reserved address detection bit
bits : 5 - 4 (0 bit)
access : read-only
RACK : Acknowledge flag bit
bits : 6 - 5 (0 bit)
access : read-only
FBT : First byte bit
bits : 7 - 6 (0 bit)
access : read-only
Serial Status Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0
TBI : Transmit bus idle flag
bits : 0 - -1 (0 bit)
access : read-only
TDRE : Transmit data empty flag bit
bits : 1 - 0 (0 bit)
access : read-only
RDRF : Received data full flag bit
bits : 2 - 1 (0 bit)
access : read-only
ORE : Overrun error flag bit
bits : 3 - 2 (0 bit)
access : read-only
FRE : Framing error flag bit
bits : 4 - 3 (0 bit)
access : read-only
PE : Parity error flag bit (only functions in operation mode 0)
bits : 5 - 4 (0 bit)
access : read-only
REC : Received error flag clear bit
bits : 7 - 6 (0 bit)
access : read-write
Serial Status Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0
TBI : Transmit bus idle flag bit
bits : 0 - -1 (0 bit)
access : read-only
TDRE : Transmit data empty flag bit
bits : 1 - 0 (0 bit)
access : read-only
RDRF : Received data full flag bit
bits : 2 - 1 (0 bit)
access : read-only
ORE : Overrun error flag bit
bits : 3 - 2 (0 bit)
access : read-only
REC : Received error flag clear bit
bits : 7 - 6 (0 bit)
access : read-write
Serial Status Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0
TBI : Transmit bus idle flag bit
bits : 0 - -1 (0 bit)
access : read-only
TDRE : Transmit data empty flag bit
bits : 1 - 0 (0 bit)
access : read-only
RDRF : Received data full flag bit
bits : 2 - 1 (0 bit)
access : read-only
ORE : Overrun error flag bit
bits : 3 - 2 (0 bit)
access : read-only
FRE : Framing error flag bit
bits : 4 - 3 (0 bit)
access : read-only
LBD : LIN Break field detection flag bit
bits : 5 - 4 (0 bit)
access : read-write
REC : Received Error flag clear bit
bits : 7 - 6 (0 bit)
access : read-write
Serial Status Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
TBI : Transmit bus idle flag bit (Effective only when DMA mode is enabled)
bits : 0 - -1 (0 bit)
access : read-only
TDRE : Transmit data empty flag bit
bits : 1 - 0 (0 bit)
access : read-only
RDRF : Received data full flag bit
bits : 2 - 1 (0 bit)
access : read-only
ORE : Overrun error flag bit
bits : 3 - 2 (0 bit)
access : read-only
TBIE : Transmit bus idle interrupt enable bit (Effective only when DMA mode is enabled)
bits : 4 - 3 (0 bit)
access : read-write
DMA : DMA mode enable bit
bits : 5 - 4 (0 bit)
access : read-write
TSET : Transmit empty flag set bit
bits : 6 - 5 (0 bit)
access : read-write
REC : Received error flag clear bit
bits : 7 - 6 (0 bit)
access : read-write
Received Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0
Transmit Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0
Received Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0
Transmit Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0
Received Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0
Transmit Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0
Received Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
Transmit Data Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
Baud Rate Generator Registers
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0
BGR0 : Baud Rate Generator Registers 0
bits : 0 - 6 (7 bit)
access : read-write
BGR1 : Baud Rate Generator Registers 1
bits : 8 - 13 (6 bit)
access : read-write
EXT : External clock select bit
bits : 15 - 14 (0 bit)
access : read-write
Baud Rate Generator Registers
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0
BGR0 : Baud Rate Generator Registers 0
bits : 0 - 6 (7 bit)
access : read-write
BGR1 : Baud Rate Generator Registers 1
bits : 8 - 13 (6 bit)
access : read-write
Baud Rate Generator Registers
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0
BGR0 : Baud Rate Generator Registers 0
bits : 0 - 6 (7 bit)
access : read-write
BGR1 : Baud Rate Generator Registers 1
bits : 8 - 13 (6 bit)
access : read-write
EXT : External clock select bit
bits : 15 - 14 (0 bit)
access : read-write
Baud Rate Generator Registers
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0
BGR0 : Baud Rate Generator Registers 0
bits : 0 - 6 (7 bit)
access : read-write
BGR1 : Baud Rate Generator Registers 1
bits : 8 - 13 (6 bit)
access : read-write
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