\n
address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x4 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x10 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
register PWM_PCSR
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : PWM
reset_Mask : 0x0
register PPG_PRLL
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : PPG
reset_Mask : 0x0
register RT_PCSR
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : RT
reset_Mask : 0x0
register PWM_STC
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : PWM
reset_Mask : 0x0
UDIR : bitfield UDIR
bits : 0 - -1 (0 bit)
access : read-write
DTIR : bitfield DTIR
bits : 1 - 0 (0 bit)
access : read-write
TGIR : bitfield TGIR
bits : 2 - 1 (0 bit)
access : read-write
UDIE : bitfield UDIE
bits : 4 - 3 (0 bit)
access : read-write
DTIE : bitfield DTIE
bits : 5 - 4 (0 bit)
access : read-write
TGIE : bitfield TGIE
bits : 6 - 5 (0 bit)
access : read-write
register PPG_STC
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : PPG
reset_Mask : 0x0
UDIR : bitfield UDIR
bits : 0 - -1 (0 bit)
access : read-write
TGIR : bitfield TGIR
bits : 2 - 1 (0 bit)
access : read-write
UDIE : bitfield UDIE
bits : 4 - 3 (0 bit)
access : read-write
TGIE : bitfield TGIE
bits : 6 - 5 (0 bit)
access : read-write
register RT_STC
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : RT
reset_Mask : 0x0
UDIR : bitfield UDIR
bits : 0 - -1 (0 bit)
access : read-write
TGIR : bitfield TGIR
bits : 2 - 1 (0 bit)
access : read-write
UDIE : bitfield UDIE
bits : 4 - 3 (0 bit)
access : read-write
TGIE : bitfield TGIE
bits : 6 - 5 (0 bit)
access : read-write
register PWC_STC
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : PWC
reset_Mask : 0x0
OVIR : bitfield OVIR
bits : 0 - -1 (0 bit)
access : read-write
EDIR : bitfield EDIR
bits : 2 - 1 (0 bit)
access : read-only
OVIE : bitfield OVIE
bits : 4 - 3 (0 bit)
access : read-write
EDIE : bitfield EDIE
bits : 6 - 5 (0 bit)
access : read-write
ERR : bitfield ERR
bits : 7 - 6 (0 bit)
access : read-only
register PWM_TMCR2
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : PWM
reset_Mask : 0x0
CKS3 : bitfield CKS3
bits : 0 - -1 (0 bit)
access : read-write
register PPG_TMCR2
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : PPG
reset_Mask : 0x0
CKS3 : bitfield CKS3
bits : 1 - 0 (0 bit)
access : read-write
register RT_TMCR2
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : RT
reset_Mask : 0x0
CKS3 : bitfield CKS3
bits : 0 - -1 (0 bit)
access : read-write
register PWC_TMCR2
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : PWC
reset_Mask : 0x0
CKS3 : bitfield CKS3
bits : 0 - -1 (0 bit)
access : read-write
register PWM_PDUT
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : PWM
reset_Mask : 0x0
register PPG_PRLH
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : PPG
reset_Mask : 0x0
register PWC_DTBF
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : PWC
reset_Mask : 0x0
register PWM_TMR
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : PWM
reset_Mask : 0x0
register PPG_TMR
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : PPG
reset_Mask : 0x0
register RT_TMR
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : RT
reset_Mask : 0x0
register PWM_TMCR
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : PWM
reset_Mask : 0x0
STRG : bitfield STRG
bits : 0 - -1 (0 bit)
access : read-write
CTEN : bitfield CTEN
bits : 1 - 0 (0 bit)
access : read-write
MDSE : bitfield MDSE
bits : 2 - 1 (0 bit)
access : read-write
OSEL : bitfield OSEL
bits : 3 - 2 (0 bit)
access : read-write
FMD : bitfield FMD
bits : 4 - 5 (2 bit)
access : read-write
EGS : bitfield EGS
bits : 8 - 8 (1 bit)
access : read-write
PMSK : bitfield PMSK
bits : 10 - 9 (0 bit)
access : read-write
RTGEN : bitfield RTGEN
bits : 11 - 10 (0 bit)
access : read-write
CKS2_0 : bitfield CKS2_0
bits : 12 - 13 (2 bit)
access : read-write
register PPG_TMCR
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : PPG
reset_Mask : 0x0
STRG : bitfield STRG
bits : 0 - -1 (0 bit)
access : read-write
CTEN : bitfield CTEN
bits : 1 - 0 (0 bit)
access : read-write
MDSE : bitfield MDSE
bits : 2 - 1 (0 bit)
access : read-write
OSEL : bitfield OSEL
bits : 3 - 2 (0 bit)
access : read-write
FMD : bitfield FMD
bits : 4 - 5 (2 bit)
access : read-write
EGS : bitfield EGS
bits : 8 - 8 (1 bit)
access : read-write
PMSK : bitfield PMSK
bits : 10 - 9 (0 bit)
access : read-write
RTGEN : bitfield RTGEN
bits : 11 - 10 (0 bit)
access : read-write
CKS2_0 : bitfield CKS2_0
bits : 12 - 13 (2 bit)
access : read-write
register RT_TMCR
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : RT
reset_Mask : 0x0
STRG : bitfield STRG
bits : 0 - -1 (0 bit)
access : read-write
CTEN : bitfield CTEN
bits : 1 - 0 (0 bit)
access : read-write
MDSE : bitfield MDSE
bits : 2 - 1 (0 bit)
access : read-write
OSEL : bitfield OSEL
bits : 3 - 2 (0 bit)
access : read-write
FMD : bitfield FMD
bits : 4 - 5 (2 bit)
access : read-write
T32 : bitfield T32
bits : 7 - 6 (0 bit)
access : read-write
EGS : bitfield EGS
bits : 8 - 8 (1 bit)
access : read-write
CKS2_0 : bitfield CKS2_0
bits : 12 - 13 (2 bit)
access : read-write
register PWC_TMCR
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : PWC
reset_Mask : 0x0
CTEN : bitfield CTEN
bits : 1 - 0 (0 bit)
access : read-write
MDSE : bitfield MDSE
bits : 2 - 1 (0 bit)
access : read-write
FMD : bitfield FMD
bits : 4 - 5 (2 bit)
access : read-write
T32 : bitfield T32
bits : 7 - 6 (0 bit)
access : read-write
EGS : bitfield EGS
bits : 8 - 9 (2 bit)
access : read-write
CKS2_0 : bitfield CKS2_0
bits : 12 - 13 (2 bit)
access : read-write
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