\n

EXTI

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x10 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x14 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x18 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xC Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x4 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x8 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

Registers

ENIR

ELVR1

NMIRR

NMICL

EIRR

EICL

ELVR


ENIR

register ENIR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENIR ENIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN0 EN1 EN2 EN3 EN4 EN5 EN6 EN7 EN8 EN9 EN10 EN11 EN12 EN13 EN14 EN15 EN16 EN17 EN18 EN19 EN20 EN21 EN22 EN23 EN24 EN25 EN26 EN27 EN28 EN29 EN30 EN31

EN0 : bitfield EN0
bits : 0 - -1 (0 bit)
access : read-write

EN1 : bitfield EN1
bits : 1 - 0 (0 bit)
access : read-write

EN2 : bitfield EN2
bits : 2 - 1 (0 bit)
access : read-write

EN3 : bitfield EN3
bits : 3 - 2 (0 bit)
access : read-write

EN4 : bitfield EN4
bits : 4 - 3 (0 bit)
access : read-write

EN5 : bitfield EN5
bits : 5 - 4 (0 bit)
access : read-write

EN6 : bitfield EN6
bits : 6 - 5 (0 bit)
access : read-write

EN7 : bitfield EN7
bits : 7 - 6 (0 bit)
access : read-write

EN8 : bitfield EN8
bits : 8 - 7 (0 bit)
access : read-write

EN9 : bitfield EN9
bits : 9 - 8 (0 bit)
access : read-write

EN10 : bitfield EN10
bits : 10 - 9 (0 bit)
access : read-write

EN11 : bitfield EN11
bits : 11 - 10 (0 bit)
access : read-write

EN12 : bitfield EN12
bits : 12 - 11 (0 bit)
access : read-write

EN13 : bitfield EN13
bits : 13 - 12 (0 bit)
access : read-write

EN14 : bitfield EN14
bits : 14 - 13 (0 bit)
access : read-write

EN15 : bitfield EN15
bits : 15 - 14 (0 bit)
access : read-write

EN16 : bitfield EN16
bits : 16 - 15 (0 bit)
access : read-write

EN17 : bitfield EN17
bits : 17 - 16 (0 bit)
access : read-write

EN18 : bitfield EN18
bits : 18 - 17 (0 bit)
access : read-write

EN19 : bitfield EN19
bits : 19 - 18 (0 bit)
access : read-write

EN20 : bitfield EN20
bits : 20 - 19 (0 bit)
access : read-write

EN21 : bitfield EN21
bits : 21 - 20 (0 bit)
access : read-write

EN22 : bitfield EN22
bits : 22 - 21 (0 bit)
access : read-write

EN23 : bitfield EN23
bits : 23 - 22 (0 bit)
access : read-write

EN24 : bitfield EN24
bits : 24 - 23 (0 bit)
access : read-write

EN25 : bitfield EN25
bits : 25 - 24 (0 bit)
access : read-write

EN26 : bitfield EN26
bits : 26 - 25 (0 bit)
access : read-write

EN27 : bitfield EN27
bits : 27 - 26 (0 bit)
access : read-write

EN28 : bitfield EN28
bits : 28 - 27 (0 bit)
access : read-write

EN29 : bitfield EN29
bits : 29 - 28 (0 bit)
access : read-write

EN30 : bitfield EN30
bits : 30 - 29 (0 bit)
access : read-write

EN31 : bitfield EN31
bits : 31 - 30 (0 bit)
access : read-write


ELVR1

register ELVR1
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ELVR1 ELVR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LA16 LB16 LA17 LB17 LA18 LB18 LA19 LB19 LA20 LB20 LA21 LB21 LA22 LB22 LA23 LB23 LA24 LB24 LA25 LB25 LA26 LB26 LA27 LB27 LA28 LB28 LA29 LB29 LA30 LB30 LA31 LB31

LA16 : bitfield LA16
bits : 0 - -1 (0 bit)
access : read-write

LB16 : bitfield LB16
bits : 1 - 0 (0 bit)
access : read-write

LA17 : bitfield LA17
bits : 2 - 1 (0 bit)
access : read-write

LB17 : bitfield LB17
bits : 3 - 2 (0 bit)
access : read-write

LA18 : bitfield LA18
bits : 4 - 3 (0 bit)
access : read-write

LB18 : bitfield LB18
bits : 5 - 4 (0 bit)
access : read-write

LA19 : bitfield LA19
bits : 6 - 5 (0 bit)
access : read-write

LB19 : bitfield LB19
bits : 7 - 6 (0 bit)
access : read-write

LA20 : bitfield LA20
bits : 8 - 7 (0 bit)
access : read-write

LB20 : bitfield LB20
bits : 9 - 8 (0 bit)
access : read-write

LA21 : bitfield LA21
bits : 10 - 9 (0 bit)
access : read-write

LB21 : bitfield LB21
bits : 11 - 10 (0 bit)
access : read-write

LA22 : bitfield LA22
bits : 12 - 11 (0 bit)
access : read-write

LB22 : bitfield LB22
bits : 13 - 12 (0 bit)
access : read-write

LA23 : bitfield LA23
bits : 14 - 13 (0 bit)
access : read-write

LB23 : bitfield LB23
bits : 15 - 14 (0 bit)
access : read-write

LA24 : bitfield LA24
bits : 16 - 15 (0 bit)
access : read-write

LB24 : bitfield LB24
bits : 17 - 16 (0 bit)
access : read-write

LA25 : bitfield LA25
bits : 18 - 17 (0 bit)
access : read-write

LB25 : bitfield LB25
bits : 19 - 18 (0 bit)
access : read-write

LA26 : bitfield LA26
bits : 20 - 19 (0 bit)
access : read-write

LB26 : bitfield LB26
bits : 21 - 20 (0 bit)
access : read-write

LA27 : bitfield LA27
bits : 22 - 21 (0 bit)
access : read-write

LB27 : bitfield LB27
bits : 23 - 22 (0 bit)
access : read-write

LA28 : bitfield LA28
bits : 24 - 23 (0 bit)
access : read-write

LB28 : bitfield LB28
bits : 25 - 24 (0 bit)
access : read-write

LA29 : bitfield LA29
bits : 26 - 25 (0 bit)
access : read-write

LB29 : bitfield LB29
bits : 27 - 26 (0 bit)
access : read-write

LA30 : bitfield LA30
bits : 28 - 27 (0 bit)
access : read-write

LB30 : bitfield LB30
bits : 29 - 28 (0 bit)
access : read-write

LA31 : bitfield LA31
bits : 30 - 29 (0 bit)
access : read-write

LB31 : bitfield LB31
bits : 31 - 30 (0 bit)
access : read-write


NMIRR

register NMIRR
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

NMIRR NMIRR read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 NR

NR : bitfield NR
bits : 0 - -1 (0 bit)
access : read-only


NMICL

register NMICL
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NMICL NMICL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 NCL

NCL : bitfield NCL
bits : 0 - -1 (0 bit)
access : read-write


EIRR

register EIRR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EIRR EIRR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ER0 ER1 ER2 ER3 ER4 ER5 ER6 ER7 ER8 ER9 ER10 ER11 ER12 ER13 ER14 ER15 ER16 ER17 ER18 ER19 ER20 ER21 ER22 ER23 ER24 ER25 ER26 ER27 ER28 ER29 ER30 ER31

ER0 : bitfield ER0
bits : 0 - -1 (0 bit)
access : read-only

ER1 : bitfield ER1
bits : 1 - 0 (0 bit)
access : read-only

ER2 : bitfield ER2
bits : 2 - 1 (0 bit)
access : read-only

ER3 : bitfield ER3
bits : 3 - 2 (0 bit)
access : read-only

ER4 : bitfield ER4
bits : 4 - 3 (0 bit)
access : read-only

ER5 : bitfield ER5
bits : 5 - 4 (0 bit)
access : read-only

ER6 : bitfield ER6
bits : 6 - 5 (0 bit)
access : read-only

ER7 : bitfield ER7
bits : 7 - 6 (0 bit)
access : read-only

ER8 : bitfield ER8
bits : 8 - 7 (0 bit)
access : read-only

ER9 : bitfield ER9
bits : 9 - 8 (0 bit)
access : read-only

ER10 : bitfield ER10
bits : 10 - 9 (0 bit)
access : read-only

ER11 : bitfield ER11
bits : 11 - 10 (0 bit)
access : read-only

ER12 : bitfield ER12
bits : 12 - 11 (0 bit)
access : read-only

ER13 : bitfield ER13
bits : 13 - 12 (0 bit)
access : read-only

ER14 : bitfield ER14
bits : 14 - 13 (0 bit)
access : read-only

ER15 : bitfield ER15
bits : 15 - 14 (0 bit)
access : read-only

ER16 : bitfield ER16
bits : 16 - 15 (0 bit)
access : read-only

ER17 : bitfield ER17
bits : 17 - 16 (0 bit)
access : read-only

ER18 : bitfield ER18
bits : 18 - 17 (0 bit)
access : read-only

ER19 : bitfield ER19
bits : 19 - 18 (0 bit)
access : read-only

ER20 : bitfield ER20
bits : 20 - 19 (0 bit)
access : read-only

ER21 : bitfield ER21
bits : 21 - 20 (0 bit)
access : read-only

ER22 : bitfield ER22
bits : 22 - 21 (0 bit)
access : read-only

ER23 : bitfield ER23
bits : 23 - 22 (0 bit)
access : read-only

ER24 : bitfield ER24
bits : 24 - 23 (0 bit)
access : read-only

ER25 : bitfield ER25
bits : 25 - 24 (0 bit)
access : read-only

ER26 : bitfield ER26
bits : 26 - 25 (0 bit)
access : read-only

ER27 : bitfield ER27
bits : 27 - 26 (0 bit)
access : read-only

ER28 : bitfield ER28
bits : 28 - 27 (0 bit)
access : read-only

ER29 : bitfield ER29
bits : 29 - 28 (0 bit)
access : read-only

ER30 : bitfield ER30
bits : 30 - 29 (0 bit)
access : read-only

ER31 : bitfield ER31
bits : 31 - 30 (0 bit)
access : read-only


EICL

register EICL
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EICL EICL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ECL0 ECL1 ECL2 ECL3 ECL4 ECL5 ECL6 ECL7 ECL8 ECL9 ECL10 ECL11 ECL12 ECL13 ECL14 ECL15 ECL16 ECL17 ECL18 ECL19 ECL20 ECL21 ECL22 ECL23 ECL24 ECL25 ECL26 ECL27 ECL28 ECL29 ECL30 ECL31

ECL0 : bitfield ECL0
bits : 0 - -1 (0 bit)
access : read-write

ECL1 : bitfield ECL1
bits : 1 - 0 (0 bit)
access : read-write

ECL2 : bitfield ECL2
bits : 2 - 1 (0 bit)
access : read-write

ECL3 : bitfield ECL3
bits : 3 - 2 (0 bit)
access : read-write

ECL4 : bitfield ECL4
bits : 4 - 3 (0 bit)
access : read-write

ECL5 : bitfield ECL5
bits : 5 - 4 (0 bit)
access : read-write

ECL6 : bitfield ECL6
bits : 6 - 5 (0 bit)
access : read-write

ECL7 : bitfield ECL7
bits : 7 - 6 (0 bit)
access : read-write

ECL8 : bitfield ECL8
bits : 8 - 7 (0 bit)
access : read-write

ECL9 : bitfield ECL9
bits : 9 - 8 (0 bit)
access : read-write

ECL10 : bitfield ECL10
bits : 10 - 9 (0 bit)
access : read-write

ECL11 : bitfield ECL11
bits : 11 - 10 (0 bit)
access : read-write

ECL12 : bitfield ECL12
bits : 12 - 11 (0 bit)
access : read-write

ECL13 : bitfield ECL13
bits : 13 - 12 (0 bit)
access : read-write

ECL14 : bitfield ECL14
bits : 14 - 13 (0 bit)
access : read-write

ECL15 : bitfield ECL15
bits : 15 - 14 (0 bit)
access : read-write

ECL16 : bitfield ECL16
bits : 16 - 15 (0 bit)
access : read-write

ECL17 : bitfield ECL17
bits : 17 - 16 (0 bit)
access : read-write

ECL18 : bitfield ECL18
bits : 18 - 17 (0 bit)
access : read-write

ECL19 : bitfield ECL19
bits : 19 - 18 (0 bit)
access : read-write

ECL20 : bitfield ECL20
bits : 20 - 19 (0 bit)
access : read-write

ECL21 : bitfield ECL21
bits : 21 - 20 (0 bit)
access : read-write

ECL22 : bitfield ECL22
bits : 22 - 21 (0 bit)
access : read-write

ECL23 : bitfield ECL23
bits : 23 - 22 (0 bit)
access : read-write

ECL24 : bitfield ECL24
bits : 24 - 23 (0 bit)
access : read-write

ECL25 : bitfield ECL25
bits : 25 - 24 (0 bit)
access : read-write

ECL26 : bitfield ECL26
bits : 26 - 25 (0 bit)
access : read-write

ECL27 : bitfield ECL27
bits : 27 - 26 (0 bit)
access : read-write

ECL28 : bitfield ECL28
bits : 28 - 27 (0 bit)
access : read-write

ECL29 : bitfield ECL29
bits : 29 - 28 (0 bit)
access : read-write

ECL30 : bitfield ECL30
bits : 30 - 29 (0 bit)
access : read-write

ECL31 : bitfield ECL31
bits : 31 - 30 (0 bit)
access : read-write


ELVR

register ELVR
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ELVR ELVR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LA0 LB0 LA1 LB1 LA2 LB2 LA3 LB3 LA4 LB4 LA5 LB5 LA6 LB6 LA7 LB7 LA8 LB8 LA9 LB9 LA10 LB10 LA11 LB11 LA12 LB12 LA13 LB13 LA14 LB14 LA15 LB15

LA0 : bitfield LA0
bits : 0 - -1 (0 bit)
access : read-write

LB0 : bitfield LB0
bits : 1 - 0 (0 bit)
access : read-write

LA1 : bitfield LA1
bits : 2 - 1 (0 bit)
access : read-write

LB1 : bitfield LB1
bits : 3 - 2 (0 bit)
access : read-write

LA2 : bitfield LA2
bits : 4 - 3 (0 bit)
access : read-write

LB2 : bitfield LB2
bits : 5 - 4 (0 bit)
access : read-write

LA3 : bitfield LA3
bits : 6 - 5 (0 bit)
access : read-write

LB3 : bitfield LB3
bits : 7 - 6 (0 bit)
access : read-write

LA4 : bitfield LA4
bits : 8 - 7 (0 bit)
access : read-write

LB4 : bitfield LB4
bits : 9 - 8 (0 bit)
access : read-write

LA5 : bitfield LA5
bits : 10 - 9 (0 bit)
access : read-write

LB5 : bitfield LB5
bits : 11 - 10 (0 bit)
access : read-write

LA6 : bitfield LA6
bits : 12 - 11 (0 bit)
access : read-write

LB6 : bitfield LB6
bits : 13 - 12 (0 bit)
access : read-write

LA7 : bitfield LA7
bits : 14 - 13 (0 bit)
access : read-write

LB7 : bitfield LB7
bits : 15 - 14 (0 bit)
access : read-write

LA8 : bitfield LA8
bits : 16 - 15 (0 bit)
access : read-write

LB8 : bitfield LB8
bits : 17 - 16 (0 bit)
access : read-write

LA9 : bitfield LA9
bits : 18 - 17 (0 bit)
access : read-write

LB9 : bitfield LB9
bits : 19 - 18 (0 bit)
access : read-write

LA10 : bitfield LA10
bits : 20 - 19 (0 bit)
access : read-write

LB10 : bitfield LB10
bits : 21 - 20 (0 bit)
access : read-write

LA11 : bitfield LA11
bits : 22 - 21 (0 bit)
access : read-write

LB11 : bitfield LB11
bits : 23 - 22 (0 bit)
access : read-write

LA12 : bitfield LA12
bits : 24 - 23 (0 bit)
access : read-write

LB12 : bitfield LB12
bits : 25 - 24 (0 bit)
access : read-write

LA13 : bitfield LA13
bits : 26 - 25 (0 bit)
access : read-write

LB13 : bitfield LB13
bits : 27 - 26 (0 bit)
access : read-write

LA14 : bitfield LA14
bits : 28 - 27 (0 bit)
access : read-write

LB14 : bitfield LB14
bits : 29 - 28 (0 bit)
access : read-write

LA15 : bitfield LA15
bits : 30 - 29 (0 bit)
access : read-write

LB15 : bitfield LB15
bits : 31 - 30 (0 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.