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DS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x4 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x700 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x704 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x708 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x70C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x710 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x800 Bytes (0x0)
size : 0x16 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x714 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

Registers

REG_CTL

RCK_CTL

PMD_CTL

WRFSR

WIFSR

WIER

WILVR

DSRAMR

BUR01

BUR02

BUR03

BUR04

BUR05

BUR06

BUR07

BUR08

BUR09

BUR10

BUR11

BUR12

BUR13

BUR14

BUR15

BUR16


REG_CTL

register REG_CTL
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

REG_CTL REG_CTL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ISUBSEL

ISUBSEL : bitfield ISUBSEL
bits : 1 - 1 (1 bit)
access : read-write


RCK_CTL

register RCK_CTL
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCK_CTL RCK_CTL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RTCCKE CECCKE

RTCCKE : bitfield RTCCKE
bits : 0 - -1 (0 bit)
access : read-write

CECCKE : bitfield CECCKE
bits : 1 - 0 (0 bit)
access : read-write


PMD_CTL

register PMD_CTL
address_offset : 0x700 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMD_CTL PMD_CTL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RTCE

RTCE : bitfield RTCE
bits : 0 - -1 (0 bit)
access : read-write


WRFSR

register WRFSR
address_offset : 0x704 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WRFSR WRFSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 WINITX WLVDH

WINITX : bitfield WINITX
bits : 0 - -1 (0 bit)
access : read-write

WLVDH : bitfield WLVDH
bits : 1 - 0 (0 bit)
access : read-write


WIFSR

register WIFSR
address_offset : 0x708 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

WIFSR WIFSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRTCI WLVDI WUI0 WUI1 WUI2 WUI3 WUI4 WUI5 WCEC0I WCEC1I

WRTCI : bitfield WRTCI
bits : 0 - -1 (0 bit)
access : read-only

WLVDI : bitfield WLVDI
bits : 1 - 0 (0 bit)
access : read-only

WUI0 : bitfield WUI0
bits : 2 - 1 (0 bit)
access : read-only

WUI1 : bitfield WUI1
bits : 3 - 2 (0 bit)
access : read-only

WUI2 : bitfield WUI2
bits : 4 - 3 (0 bit)
access : read-only

WUI3 : bitfield WUI3
bits : 5 - 4 (0 bit)
access : read-only

WUI4 : bitfield WUI4
bits : 6 - 5 (0 bit)
access : read-only

WUI5 : bitfield WUI5
bits : 7 - 6 (0 bit)
access : read-only

WCEC0I : bitfield WCEC0I
bits : 8 - 7 (0 bit)
access : read-only

WCEC1I : bitfield WCEC1I
bits : 9 - 8 (0 bit)
access : read-only


WIER

register WIER
address_offset : 0x70C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WIER WIER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRTCE WLVDE WUI1E WUI2E WUI3E WUI4E WUI5E WCEC0E WCEC1E

WRTCE : bitfield WRTCE
bits : 0 - -1 (0 bit)
access : read-write

WLVDE : bitfield WLVDE
bits : 1 - 0 (0 bit)
access : read-write

WUI1E : bitfield WUI1E
bits : 3 - 2 (0 bit)
access : read-write

WUI2E : bitfield WUI2E
bits : 4 - 3 (0 bit)
access : read-write

WUI3E : bitfield WUI3E
bits : 5 - 4 (0 bit)
access : read-write

WUI4E : bitfield WUI4E
bits : 6 - 5 (0 bit)
access : read-write

WUI5E : bitfield WUI5E
bits : 7 - 6 (0 bit)
access : read-write

WCEC0E : bitfield WCEC0E
bits : 8 - 7 (0 bit)
access : read-write

WCEC1E : bitfield WCEC1E
bits : 9 - 8 (0 bit)
access : read-write


WILVR

register WILVR
address_offset : 0x710 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WILVR WILVR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 WUI1LV WUI2LV WUI3LV WUI4LV WUI5LV

WUI1LV : bitfield WUI1LV
bits : 0 - -1 (0 bit)
access : read-write

WUI2LV : bitfield WUI2LV
bits : 1 - 0 (0 bit)
access : read-write

WUI3LV : bitfield WUI3LV
bits : 2 - 1 (0 bit)
access : read-write

WUI4LV : bitfield WUI4LV
bits : 3 - 2 (0 bit)
access : read-write

WUI5LV : bitfield WUI5LV
bits : 4 - 3 (0 bit)
access : read-write


DSRAMR

register DSRAMR
address_offset : 0x714 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSRAMR DSRAMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SRAMR

SRAMR : bitfield SRAMR
bits : 0 - 0 (1 bit)
access : read-write


BUR01

register BUR01
address_offset : 0x800 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR01 BUR01 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR02

register BUR02
address_offset : 0x801 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR02 BUR02 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR03

register BUR03
address_offset : 0x802 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR03 BUR03 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR04

register BUR04
address_offset : 0x803 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR04 BUR04 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR05

register BUR05
address_offset : 0x804 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR05 BUR05 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR06

register BUR06
address_offset : 0x805 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR06 BUR06 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR07

register BUR07
address_offset : 0x806 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR07 BUR07 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR08

register BUR08
address_offset : 0x807 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR08 BUR08 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR09

register BUR09
address_offset : 0x808 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR09 BUR09 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR10

register BUR10
address_offset : 0x809 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR10 BUR10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR11

register BUR11
address_offset : 0x80A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR11 BUR11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR12

register BUR12
address_offset : 0x80B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR12 BUR12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR13

register BUR13
address_offset : 0x80C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR13 BUR13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR14

register BUR14
address_offset : 0x80D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR14 BUR14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR15

register BUR15
address_offset : 0x80E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR15 BUR15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

BUR16

register BUR16
address_offset : 0x80F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUR16 BUR16 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0


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