\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
Start UART receiver
address_offset : 0x0 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_STARTRX : Start UART receiver
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Unspecified - - Pin select for RTS signal
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PIN : Pin number
bits : 0 - 3 (4 bit)
CONNECT : Connection
bits : 31 - 30 (0 bit)
Enumeration:
1 : Disconnected
Disconnect
0 : Connected
Connect
End of enumeration elements list.
RXD EasyDMA channel - - Data pointer
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PTR : Data pointer
bits : 0 - 30 (31 bit)
TXD EasyDMA channel - - Data pointer
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PTR : Data pointer
bits : 0 - 30 (31 bit)
CTS is activated (set low). Clear To Send.
address_offset : 0x100 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_CTS : CTS is activated (set low). Clear To Send.
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
CTS is deactivated (set high). Not Clear To Send.
address_offset : 0x104 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_NCTS : CTS is deactivated (set high). Not Clear To Send.
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Data received in RXD (but potentially not yet transferred to Data RAM)
address_offset : 0x108 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_RXDRDY : Data received in RXD (but potentially not yet transferred to Data RAM)
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Receive buffer is filled up
address_offset : 0x110 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_ENDRX : Receive buffer is filled up
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Data sent from TXD
address_offset : 0x11C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_TXDRDY : Data sent from TXD
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Last TX byte transmitted
address_offset : 0x120 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_ENDTX : Last TX byte transmitted
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Error detected
address_offset : 0x124 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_ERROR : Error detected
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Receiver timeout
address_offset : 0x144 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_RXTO : Receiver timeout
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
UART receiver has started
address_offset : 0x14C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_RXSTARTED : UART receiver has started
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
UART transmitter has started
address_offset : 0x150 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_TXSTARTED : UART transmitter has started
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Transmitter stopped
address_offset : 0x158 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_TXSTOPPED : Transmitter stopped
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Shortcuts between local events and tasks
address_offset : 0x200 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENDRX_STARTRX : Shortcut between event ENDRX and task STARTRX
bits : 5 - 4 (0 bit)
Enumeration:
0 : Disabled
Disable shortcut
1 : Enabled
Enable shortcut
End of enumeration elements list.
ENDRX_STOPRX : Shortcut between event ENDRX and task STOPRX
bits : 6 - 5 (0 bit)
Enumeration:
0 : Disabled
Disable shortcut
1 : Enabled
Enable shortcut
End of enumeration elements list.
Flush RX FIFO into RX buffer
address_offset : 0x2C Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_FLUSHRX : Flush RX FIFO into RX buffer
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Enable or disable interrupt
address_offset : 0x300 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTS : Enable or disable interrupt for event CTS
bits : 0 - -1 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
NCTS : Enable or disable interrupt for event NCTS
bits : 1 - 0 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
RXDRDY : Enable or disable interrupt for event RXDRDY
bits : 2 - 1 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
ENDRX : Enable or disable interrupt for event ENDRX
bits : 4 - 3 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
TXDRDY : Enable or disable interrupt for event TXDRDY
bits : 7 - 6 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
ENDTX : Enable or disable interrupt for event ENDTX
bits : 8 - 7 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
ERROR : Enable or disable interrupt for event ERROR
bits : 9 - 8 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
RXTO : Enable or disable interrupt for event RXTO
bits : 17 - 16 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
RXSTARTED : Enable or disable interrupt for event RXSTARTED
bits : 19 - 18 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
TXSTARTED : Enable or disable interrupt for event TXSTARTED
bits : 20 - 19 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
TXSTOPPED : Enable or disable interrupt for event TXSTOPPED
bits : 22 - 21 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
Enable interrupt
address_offset : 0x304 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTS : Write '1' to enable interrupt for event CTS
bits : 0 - -1 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
NCTS : Write '1' to enable interrupt for event NCTS
bits : 1 - 0 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
RXDRDY : Write '1' to enable interrupt for event RXDRDY
bits : 2 - 1 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
ENDRX : Write '1' to enable interrupt for event ENDRX
bits : 4 - 3 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
TXDRDY : Write '1' to enable interrupt for event TXDRDY
bits : 7 - 6 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
ENDTX : Write '1' to enable interrupt for event ENDTX
bits : 8 - 7 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
ERROR : Write '1' to enable interrupt for event ERROR
bits : 9 - 8 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
RXTO : Write '1' to enable interrupt for event RXTO
bits : 17 - 16 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
RXSTARTED : Write '1' to enable interrupt for event RXSTARTED
bits : 19 - 18 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
TXSTARTED : Write '1' to enable interrupt for event TXSTARTED
bits : 20 - 19 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
TXSTOPPED : Write '1' to enable interrupt for event TXSTOPPED
bits : 22 - 21 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
Disable interrupt
address_offset : 0x308 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTS : Write '1' to disable interrupt for event CTS
bits : 0 - -1 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
NCTS : Write '1' to disable interrupt for event NCTS
bits : 1 - 0 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
RXDRDY : Write '1' to disable interrupt for event RXDRDY
bits : 2 - 1 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
ENDRX : Write '1' to disable interrupt for event ENDRX
bits : 4 - 3 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
TXDRDY : Write '1' to disable interrupt for event TXDRDY
bits : 7 - 6 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
ENDTX : Write '1' to disable interrupt for event ENDTX
bits : 8 - 7 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
ERROR : Write '1' to disable interrupt for event ERROR
bits : 9 - 8 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
RXTO : Write '1' to disable interrupt for event RXTO
bits : 17 - 16 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
RXSTARTED : Write '1' to disable interrupt for event RXSTARTED
bits : 19 - 18 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
TXSTARTED : Write '1' to disable interrupt for event TXSTARTED
bits : 20 - 19 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
TXSTOPPED : Write '1' to disable interrupt for event TXSTOPPED
bits : 22 - 21 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
Stop UART receiver
address_offset : 0x4 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_STOPRX : Stop UART receiver
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Unspecified - - Pin select for TXD signal
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PIN : Pin number
bits : 0 - 3 (4 bit)
CONNECT : Connection
bits : 31 - 30 (0 bit)
Enumeration:
1 : Disconnected
Disconnect
0 : Connected
Connect
End of enumeration elements list.
RXD EasyDMA channel - - Maximum number of bytes in receive buffer
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAXCNT : Maximum number of bytes in receive buffer
bits : 0 - 8 (9 bit)
TXD EasyDMA channel - - Maximum number of bytes in transmit buffer
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAXCNT : Maximum number of bytes in transmit buffer
bits : 0 - 8 (9 bit)
Error source Note : this register is read / write one to clear.
address_offset : 0x480 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OVERRUN : Overrun error
bits : 0 - -1 (0 bit)
Enumeration: ( read )
0 : NotPresent
Read: error not present
1 : Present
Read: error present
End of enumeration elements list.
PARITY : Parity error
bits : 1 - 0 (0 bit)
Enumeration: ( read )
0 : NotPresent
Read: error not present
1 : Present
Read: error present
End of enumeration elements list.
FRAMING : Framing error occurred
bits : 2 - 1 (0 bit)
Enumeration: ( read )
0 : NotPresent
Read: error not present
1 : Present
Read: error present
End of enumeration elements list.
BREAK : Break condition
bits : 3 - 2 (0 bit)
Enumeration: ( read )
0 : NotPresent
Read: error not present
1 : Present
Read: error present
End of enumeration elements list.
Enable UART
address_offset : 0x500 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Enable or disable UARTE
bits : 0 - 2 (3 bit)
Enumeration:
0 : Disabled
Disable UARTE
8 : Enabled
Enable UARTE
End of enumeration elements list.
Baud rate. Accuracy depends on the HFCLK source selected.
address_offset : 0x524 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BAUDRATE : Baud rate
bits : 0 - 30 (31 bit)
Enumeration:
0x0004F000 : Baud1200
1200 baud (actual rate: 1205)
0x0009D000 : Baud2400
2400 baud (actual rate: 2396)
0x0013B000 : Baud4800
4800 baud (actual rate: 4808)
0x00275000 : Baud9600
9600 baud (actual rate: 9598)
0x003AF000 : Baud14400
14400 baud (actual rate: 14401)
0x004EA000 : Baud19200
19200 baud (actual rate: 19208)
0x0075C000 : Baud28800
28800 baud (actual rate: 28777)
0x00800000 : Baud31250
31250 baud
0x009D0000 : Baud38400
38400 baud (actual rate: 38369)
0x00E50000 : Baud56000
56000 baud (actual rate: 55944)
0x00EB0000 : Baud57600
57600 baud (actual rate: 57554)
0x013A9000 : Baud76800
76800 baud (actual rate: 76923)
0x01D60000 : Baud115200
115200 baud (actual rate: 115108)
0x03B00000 : Baud230400
230400 baud (actual rate: 231884)
0x04000000 : Baud250000
250000 baud
0x07400000 : Baud460800
460800 baud (actual rate: 457143)
0x0F000000 : Baud921600
921600 baud (actual rate: 941176)
0x10000000 : Baud1M
1Mega baud
End of enumeration elements list.
Configuration of parity and hardware flow control
address_offset : 0x56C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HWFC : Hardware flow control
bits : 0 - -1 (0 bit)
Enumeration:
0 : Disabled
Disabled
1 : Enabled
Enabled
End of enumeration elements list.
PARITY : Parity
bits : 1 - 2 (2 bit)
Enumeration:
0x0 : Excluded
Exclude parity bit
0x7 : Included
Include even parity bit
End of enumeration elements list.
STOP : Stop bits
bits : 4 - 3 (0 bit)
Enumeration:
0 : One
One stop bit
1 : Two
Two stop bits
End of enumeration elements list.
Start UART transmitter
address_offset : 0x8 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_STARTTX : Start UART transmitter
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Unspecified - - Pin select for CTS signal
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PIN : Pin number
bits : 0 - 3 (4 bit)
CONNECT : Connection
bits : 31 - 30 (0 bit)
Enumeration:
1 : Disconnected
Disconnect
0 : Connected
Connect
End of enumeration elements list.
RXD EasyDMA channel - - Number of bytes transferred in the last transaction
address_offset : 0x8 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AMOUNT : Number of bytes transferred in the last transaction
bits : 0 - 8 (9 bit)
TXD EasyDMA channel - - Number of bytes transferred in the last transaction
address_offset : 0x8 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AMOUNT : Number of bytes transferred in the last transaction
bits : 0 - 8 (9 bit)
Stop UART transmitter
address_offset : 0xC Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_STOPTX : Stop UART transmitter
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Unspecified - - Pin select for RXD signal
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PIN : Pin number
bits : 0 - 3 (4 bit)
CONNECT : Connection
bits : 31 - 30 (0 bit)
Enumeration:
1 : Disconnected
Disconnect
0 : Connected
Connect
End of enumeration elements list.
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.