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NFCT

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

TASKS_ACTIVATE

FRAMESTATUS - RX

TXD - FRAMECONFIG

RXD - FRAMECONFIG

EVENTS_READY

EVENTS_FIELDDETECTED

EVENTS_FIELDLOST

EVENTS_TXFRAMESTART

EVENTS_TXFRAMEEND

EVENTS_RXFRAMESTART

EVENTS_RXFRAMEEND

EVENTS_ERROR

EVENTS_RXERROR

EVENTS_ENDRX

EVENTS_ENDTX

EVENTS_AUTOCOLRESSTARTED

EVENTS_COLLISION

EVENTS_SELECTED

EVENTS_STARTED

TASKS_ENABLERXDATA

SHORTS

TASKS_GOIDLE

TASKS_GOSLEEP

INTEN

INTENSET

INTENCLR

TASKS_DISABLE

TXD - AMOUNT

RXD - AMOUNT

ERRORSTATUS

CURRENTLOADCTRL

FIELDPRESENT

FRAMEDELAYMIN

FRAMEDELAYMAX

FRAMEDELAYMODE

PACKETPTR

MAXLEN

NFCID1_LAST

NFCID1_2ND_LAST

NFCID1_3RD_LAST

SENSRES

SELRES

TASKS_SENSE

TASKS_STARTTX


TASKS_ACTIVATE

Activate NFC peripheral for incoming and outgoing frames, change state to activated
address_offset : 0x0 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TASKS_ACTIVATE TASKS_ACTIVATE write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FRAMESTATUS - RX

Unspecified - - Result of last incoming frames
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRAMESTATUS - RX FRAMESTATUS - RX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CRCERROR PARITYSTATUS OVERRUN

CRCERROR : No valid End of Frame detected
bits : 0 - -1 (0 bit)

Enumeration:

0 : CRCCorrect

Valid CRC detected

1 : CRCError

CRC received does not match local check

End of enumeration elements list.

PARITYSTATUS : Parity status of received frame
bits : 2 - 1 (0 bit)

Enumeration:

0 : ParityOK

Frame received with parity OK

1 : ParityError

Frame received with parity error

End of enumeration elements list.

OVERRUN : Overrun detected
bits : 3 - 2 (0 bit)

Enumeration:

0 : NoOverrun

No overrun detected

1 : Overrun

Overrun error

End of enumeration elements list.


TXD - FRAMECONFIG

Unspecified - - Configuration of outgoing frames
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXD - FRAMECONFIG TXD - FRAMECONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PARITY DISCARDMODE SOF CRCMODETX

PARITY : Adding parity or not in the frame
bits : 0 - -1 (0 bit)

Enumeration:

0 : NoParity

Parity is not added in TX frames

1 : Parity

Parity is added TX frames

End of enumeration elements list.

DISCARDMODE : Discarding unused bits in start or at end of a Frame
bits : 1 - 0 (0 bit)

Enumeration:

0 : DiscardEnd

Unused bits is discarded at end of frame

1 : DiscardStart

Unused bits is discarded at start of frame

End of enumeration elements list.

SOF : Adding SoF or not in TX frames
bits : 2 - 1 (0 bit)

Enumeration:

0 : NoSoF

Start of Frame symbol not added

1 : SoF

Start of Frame symbol added

End of enumeration elements list.

CRCMODETX : CRC mode for outgoing frames
bits : 4 - 3 (0 bit)

Enumeration:

0 : NoCRCTX

CRC is not added to the frame

1 : CRC16TX

16 bit CRC added to the frame based on all the data read from RAM that is used in the frame

End of enumeration elements list.


RXD - FRAMECONFIG

Unspecified - - Configuration of incoming frames
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXD - FRAMECONFIG RXD - FRAMECONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PARITY SOF CRCMODERX

PARITY : Parity expected or not in RX frame
bits : 0 - -1 (0 bit)

Enumeration:

0 : NoParity

Parity is not expected in RX frames

1 : Parity

Parity is expected in RX frames

End of enumeration elements list.

SOF : SoF expected or not in RX frames
bits : 2 - 1 (0 bit)

Enumeration:

0 : NoSoF

Start of Frame symbol is not expected in RX frames

1 : SoF

Start of Frame symbol is expected in RX frames

End of enumeration elements list.

CRCMODERX : CRC mode for incoming frames
bits : 4 - 3 (0 bit)

Enumeration:

0 : NoCRCRX

CRC is not expected in RX frames

1 : CRC16RX

Last 16 bits in RX frame is CRC, CRC is checked and CRCSTATUS updated

End of enumeration elements list.


EVENTS_READY

The NFC peripheral is ready to receive and send frames
address_offset : 0x100 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_READY EVENTS_READY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_FIELDDETECTED

Remote NFC field detected
address_offset : 0x104 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_FIELDDETECTED EVENTS_FIELDDETECTED read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_FIELDLOST

Remote NFC field lost
address_offset : 0x108 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_FIELDLOST EVENTS_FIELDLOST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_TXFRAMESTART

Marks the start of the first symbol of a transmitted frame
address_offset : 0x10C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_TXFRAMESTART EVENTS_TXFRAMESTART read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_TXFRAMEEND

Marks the end of the last transmitted on-air symbol of a frame
address_offset : 0x110 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_TXFRAMEEND EVENTS_TXFRAMEEND read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_RXFRAMESTART

Marks the end of the first symbol of a received frame
address_offset : 0x114 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_RXFRAMESTART EVENTS_RXFRAMESTART read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_RXFRAMEEND

Received data have been checked (CRC, parity) and transferred to RAM, and EasyDMA has ended accessing the RX buffer
address_offset : 0x118 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_RXFRAMEEND EVENTS_RXFRAMEEND read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_ERROR

NFC error reported. The ERRORSTATUS register contains details on the source of the error.
address_offset : 0x11C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_ERROR EVENTS_ERROR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_RXERROR

NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the source of the error.
address_offset : 0x128 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_RXERROR EVENTS_RXERROR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_ENDRX

RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full.
address_offset : 0x12C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_ENDRX EVENTS_ENDRX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_ENDTX

Transmission of data in RAM has ended, and EasyDMA has ended accessing the TX buffer
address_offset : 0x130 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_ENDTX EVENTS_ENDTX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_AUTOCOLRESSTARTED

Auto collision resolution process has started
address_offset : 0x138 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_AUTOCOLRESSTARTED EVENTS_AUTOCOLRESSTARTED read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_COLLISION

NFC Auto collision resolution error reported.
address_offset : 0x148 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_COLLISION EVENTS_COLLISION read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_SELECTED

NFC Auto collision resolution successfully completed
address_offset : 0x14C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_SELECTED EVENTS_SELECTED read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EVENTS_STARTED

EasyDMA is ready to receive or send frames.
address_offset : 0x150 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTS_STARTED EVENTS_STARTED read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TASKS_ENABLERXDATA

Initializes the EasyDMA for receive.
address_offset : 0x1C Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TASKS_ENABLERXDATA TASKS_ENABLERXDATA write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

SHORTS

Shortcut register
address_offset : 0x200 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SHORTS SHORTS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FIELDDETECTED_ACTIVATE FIELDLOST_SENSE

FIELDDETECTED_ACTIVATE : Shortcut between FIELDDETECTED event and ACTIVATE task
bits : 0 - -1 (0 bit)

Enumeration:

0 : Disabled

Disable shortcut

1 : Enabled

Enable shortcut

End of enumeration elements list.

FIELDLOST_SENSE : Shortcut between FIELDLOST event and SENSE task
bits : 1 - 0 (0 bit)

Enumeration:

0 : Disabled

Disable shortcut

1 : Enabled

Enable shortcut

End of enumeration elements list.


TASKS_GOIDLE

Force state machine to IDLE state
address_offset : 0x24 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TASKS_GOIDLE TASKS_GOIDLE write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TASKS_GOSLEEP

Force state machine to SLEEP_A state
address_offset : 0x28 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TASKS_GOSLEEP TASKS_GOSLEEP write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

INTEN

Enable or disable interrupt
address_offset : 0x300 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTEN INTEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READY FIELDDETECTED FIELDLOST TXFRAMESTART TXFRAMEEND RXFRAMESTART RXFRAMEEND ERROR RXERROR ENDRX ENDTX AUTOCOLRESSTARTED COLLISION SELECTED STARTED

READY : Enable or disable interrupt for READY event
bits : 0 - -1 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

FIELDDETECTED : Enable or disable interrupt for FIELDDETECTED event
bits : 1 - 0 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

FIELDLOST : Enable or disable interrupt for FIELDLOST event
bits : 2 - 1 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

TXFRAMESTART : Enable or disable interrupt for TXFRAMESTART event
bits : 3 - 2 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

TXFRAMEEND : Enable or disable interrupt for TXFRAMEEND event
bits : 4 - 3 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

RXFRAMESTART : Enable or disable interrupt for RXFRAMESTART event
bits : 5 - 4 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

RXFRAMEEND : Enable or disable interrupt for RXFRAMEEND event
bits : 6 - 5 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

ERROR : Enable or disable interrupt for ERROR event
bits : 7 - 6 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

RXERROR : Enable or disable interrupt for RXERROR event
bits : 10 - 9 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

ENDRX : Enable or disable interrupt for ENDRX event
bits : 11 - 10 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

ENDTX : Enable or disable interrupt for ENDTX event
bits : 12 - 11 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

AUTOCOLRESSTARTED : Enable or disable interrupt for AUTOCOLRESSTARTED event
bits : 14 - 13 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

COLLISION : Enable or disable interrupt for COLLISION event
bits : 18 - 17 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

SELECTED : Enable or disable interrupt for SELECTED event
bits : 19 - 18 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.

STARTED : Enable or disable interrupt for STARTED event
bits : 20 - 19 (0 bit)

Enumeration:

0 : Disabled

Disable

1 : Enabled

Enable

End of enumeration elements list.


INTENSET

Enable interrupt
address_offset : 0x304 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTENSET INTENSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READY FIELDDETECTED FIELDLOST TXFRAMESTART TXFRAMEEND RXFRAMESTART RXFRAMEEND ERROR RXERROR ENDRX ENDTX AUTOCOLRESSTARTED COLLISION SELECTED STARTED

READY : Write '1' to Enable interrupt for READY event
bits : 0 - -1 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

FIELDDETECTED : Write '1' to Enable interrupt for FIELDDETECTED event
bits : 1 - 0 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

FIELDLOST : Write '1' to Enable interrupt for FIELDLOST event
bits : 2 - 1 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

TXFRAMESTART : Write '1' to Enable interrupt for TXFRAMESTART event
bits : 3 - 2 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

TXFRAMEEND : Write '1' to Enable interrupt for TXFRAMEEND event
bits : 4 - 3 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

RXFRAMESTART : Write '1' to Enable interrupt for RXFRAMESTART event
bits : 5 - 4 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

RXFRAMEEND : Write '1' to Enable interrupt for RXFRAMEEND event
bits : 6 - 5 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

ERROR : Write '1' to Enable interrupt for ERROR event
bits : 7 - 6 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

RXERROR : Write '1' to Enable interrupt for RXERROR event
bits : 10 - 9 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

ENDRX : Write '1' to Enable interrupt for ENDRX event
bits : 11 - 10 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

ENDTX : Write '1' to Enable interrupt for ENDTX event
bits : 12 - 11 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

AUTOCOLRESSTARTED : Write '1' to Enable interrupt for AUTOCOLRESSTARTED event
bits : 14 - 13 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

COLLISION : Write '1' to Enable interrupt for COLLISION event
bits : 18 - 17 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

SELECTED : Write '1' to Enable interrupt for SELECTED event
bits : 19 - 18 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.

STARTED : Write '1' to Enable interrupt for STARTED event
bits : 20 - 19 (0 bit)

Enumeration: ( write )

1 : Set

Enable

End of enumeration elements list.


INTENCLR

Disable interrupt
address_offset : 0x308 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTENCLR INTENCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READY FIELDDETECTED FIELDLOST TXFRAMESTART TXFRAMEEND RXFRAMESTART RXFRAMEEND ERROR RXERROR ENDRX ENDTX AUTOCOLRESSTARTED COLLISION SELECTED STARTED

READY : Write '1' to Disable interrupt for READY event
bits : 0 - -1 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

FIELDDETECTED : Write '1' to Disable interrupt for FIELDDETECTED event
bits : 1 - 0 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

FIELDLOST : Write '1' to Disable interrupt for FIELDLOST event
bits : 2 - 1 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

TXFRAMESTART : Write '1' to Disable interrupt for TXFRAMESTART event
bits : 3 - 2 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

TXFRAMEEND : Write '1' to Disable interrupt for TXFRAMEEND event
bits : 4 - 3 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

RXFRAMESTART : Write '1' to Disable interrupt for RXFRAMESTART event
bits : 5 - 4 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

RXFRAMEEND : Write '1' to Disable interrupt for RXFRAMEEND event
bits : 6 - 5 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

ERROR : Write '1' to Disable interrupt for ERROR event
bits : 7 - 6 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

RXERROR : Write '1' to Disable interrupt for RXERROR event
bits : 10 - 9 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

ENDRX : Write '1' to Disable interrupt for ENDRX event
bits : 11 - 10 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

ENDTX : Write '1' to Disable interrupt for ENDTX event
bits : 12 - 11 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

AUTOCOLRESSTARTED : Write '1' to Disable interrupt for AUTOCOLRESSTARTED event
bits : 14 - 13 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

COLLISION : Write '1' to Disable interrupt for COLLISION event
bits : 18 - 17 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

SELECTED : Write '1' to Disable interrupt for SELECTED event
bits : 19 - 18 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.

STARTED : Write '1' to Disable interrupt for STARTED event
bits : 20 - 19 (0 bit)

Enumeration: ( write )

1 : Clear

Disable

End of enumeration elements list.


TASKS_DISABLE

Disable NFC peripheral
address_offset : 0x4 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TASKS_DISABLE TASKS_DISABLE write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TXD - AMOUNT

Unspecified - - Size of outgoing frame
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXD - AMOUNT TXD - AMOUNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TXDATABITS TXDATABYTES

TXDATABITS : Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit).
bits : 0 - 1 (2 bit)

TXDATABYTES : Number of complete bytes that shall be included in the frame, excluding CRC, parity and framing
bits : 3 - 10 (8 bit)


RXD - AMOUNT

Unspecified - - Size of last incoming frame
address_offset : 0x4 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RXD - AMOUNT RXD - AMOUNT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RXDATABITS RXDATABYTES

RXDATABITS : Number of bits in the last byte in the frame, if less than 8 (including CRC, but excluding parity and SoF/EoF framing).
bits : 0 - 1 (2 bit)

RXDATABYTES : Number of complete bytes received in the frame (including CRC, but excluding parity and SoF/EoF framing)
bits : 3 - 10 (8 bit)


ERRORSTATUS

NFC Error Status register
address_offset : 0x404 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ERRORSTATUS ERRORSTATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FRAMEDELAYTIMEOUT NFCFIELDTOOSTRONG NFCFIELDTOOWEAK

FRAMEDELAYTIMEOUT : No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX
bits : 0 - -1 (0 bit)

NFCFIELDTOOSTRONG : Field level is too high at max load resistance
bits : 2 - 1 (0 bit)

NFCFIELDTOOWEAK : Field level is too low at min load resistance
bits : 3 - 2 (0 bit)


CURRENTLOADCTRL

Current value driven to the NFC Load Control
address_offset : 0x430 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CURRENTLOADCTRL CURRENTLOADCTRL read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURRENTLOADCTRL

CURRENTLOADCTRL : Current value driven to the NFC Load Control
bits : 0 - 4 (5 bit)


FIELDPRESENT

Indicates the presence or not of a valid field
address_offset : 0x43C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FIELDPRESENT FIELDPRESENT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FIELDPRESENT LOCKDETECT

FIELDPRESENT : Indicates the presence or not of a valid field. Available only in the activated state.
bits : 0 - -1 (0 bit)

Enumeration:

0 : NoField

No valid field detected

1 : FieldPresent

Valid field detected

End of enumeration elements list.

LOCKDETECT : Indicates if the low level has locked to the field
bits : 1 - 0 (0 bit)

Enumeration:

0 : NotLocked

Not locked to field

1 : Locked

Locked to field

End of enumeration elements list.


FRAMEDELAYMIN

Minimum frame delay
address_offset : 0x504 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRAMEDELAYMIN FRAMEDELAYMIN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FRAMEDELAYMIN

FRAMEDELAYMIN : Minimum frame delay in number of 13.56 MHz clocks
bits : 0 - 14 (15 bit)


FRAMEDELAYMAX

Maximum frame delay
address_offset : 0x508 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRAMEDELAYMAX FRAMEDELAYMAX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FRAMEDELAYMAX

FRAMEDELAYMAX : Maximum frame delay in number of 13.56 MHz clocks
bits : 0 - 14 (15 bit)


FRAMEDELAYMODE

Configuration register for the Frame Delay Timer
address_offset : 0x50C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRAMEDELAYMODE FRAMEDELAYMODE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FRAMEDELAYMODE

FRAMEDELAYMODE : Configuration register for the Frame Delay Timer
bits : 0 - 0 (1 bit)

Enumeration:

0 : FreeRun

Transmission is independent of frame timer and will start when the STARTTX task is triggered. No timeout.

1 : Window

Frame is transmitted between FRAMEDELAYMIN and FRAMEDELAYMAX

2 : ExactVal

Frame is transmitted exactly at FRAMEDELAYMAX

3 : WindowGrid

Frame is transmitted on a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX

End of enumeration elements list.


PACKETPTR

Packet pointer for TXD and RXD data storage in Data RAM
address_offset : 0x510 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PACKETPTR PACKETPTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PTR

PTR : Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte aligned RAM address.
bits : 0 - 30 (31 bit)


MAXLEN

Size of allocated for TXD and RXD data storage buffer in Data RAM
address_offset : 0x514 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MAXLEN MAXLEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MAXLEN

MAXLEN : Size of allocated for TXD and RXD data storage buffer in Data RAM
bits : 0 - 7 (8 bit)


NFCID1_LAST

Last NFCID1 part (4, 7 or 10 bytes ID)
address_offset : 0x590 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NFCID1_LAST NFCID1_LAST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NFCID1_Z NFCID1_Y NFCID1_X NFCID1_W

NFCID1_Z : NFCID1 byte Z (very last byte sent)
bits : 0 - 6 (7 bit)

NFCID1_Y : NFCID1 byte Y
bits : 8 - 14 (7 bit)

NFCID1_X : NFCID1 byte X
bits : 16 - 22 (7 bit)

NFCID1_W : NFCID1 byte W
bits : 24 - 30 (7 bit)


NFCID1_2ND_LAST

Second last NFCID1 part (7 or 10 bytes ID)
address_offset : 0x594 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NFCID1_2ND_LAST NFCID1_2ND_LAST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NFCID1_V NFCID1_U NFCID1_T

NFCID1_V : NFCID1 byte V
bits : 0 - 6 (7 bit)

NFCID1_U : NFCID1 byte U
bits : 8 - 14 (7 bit)

NFCID1_T : NFCID1 byte T
bits : 16 - 22 (7 bit)


NFCID1_3RD_LAST

Third last NFCID1 part (10 bytes ID)
address_offset : 0x598 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NFCID1_3RD_LAST NFCID1_3RD_LAST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NFCID1_S NFCID1_R NFCID1_Q

NFCID1_S : NFCID1 byte S
bits : 0 - 6 (7 bit)

NFCID1_R : NFCID1 byte R
bits : 8 - 14 (7 bit)

NFCID1_Q : NFCID1 byte Q
bits : 16 - 22 (7 bit)


SENSRES

NFC-A SENS_RES auto-response settings
address_offset : 0x5A0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SENSRES SENSRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BITFRAMESDD RFU5 NFCIDSIZE PLATFCONFIG RFU74

BITFRAMESDD : Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification
bits : 0 - 3 (4 bit)

Enumeration:

0 : SDD00000

SDD pattern 00000

1 : SDD00001

SDD pattern 00001

2 : SDD00010

SDD pattern 00010

4 : SDD00100

SDD pattern 00100

8 : SDD01000

SDD pattern 01000

16 : SDD10000

SDD pattern 10000

End of enumeration elements list.

RFU5 : Reserved for future use. Shall be 0.
bits : 5 - 4 (0 bit)

NFCIDSIZE : NFCID1 size. This value is used by the Auto collision resolution engine.
bits : 6 - 6 (1 bit)

Enumeration:

0 : NFCID1Single

NFCID1 size: single (4 bytes)

1 : NFCID1Double

NFCID1 size: double (7 bytes)

2 : NFCID1Triple

NFCID1 size: triple (10 bytes)

End of enumeration elements list.

PLATFCONFIG : Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification
bits : 8 - 10 (3 bit)

RFU74 : Reserved for future use. Shall be 0.
bits : 12 - 14 (3 bit)


SELRES

NFC-A SEL_RES auto-response settings
address_offset : 0x5A4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SELRES SELRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RFU10 CASCADE RFU43 PROTOCOL RFU7

RFU10 : Reserved for future use. Shall be 0.
bits : 0 - 0 (1 bit)

CASCADE : Cascade bit (controlled by hardware, write has no effect)
bits : 2 - 1 (0 bit)

Enumeration:

0 : Complete

NFCID1 complete

1 : NotComplete

NFCID1 not complete

End of enumeration elements list.

RFU43 : Reserved for future use. Shall be 0.
bits : 3 - 3 (1 bit)

PROTOCOL : Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum, NFC Digital Protocol Technical Specification
bits : 5 - 5 (1 bit)

RFU7 : Reserved for future use. Shall be 0.
bits : 7 - 6 (0 bit)


TASKS_SENSE

Enable NFC sense field mode, change state to sense mode
address_offset : 0x8 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TASKS_SENSE TASKS_SENSE write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TASKS_STARTTX

Start transmission of a outgoing frame, change state to transmit
address_offset : 0xC Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TASKS_STARTTX TASKS_STARTTX write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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