\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
Start TWI receive sequence
address_offset : 0x0 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_STARTRX : Start TWI receive sequence
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Unspecified - - Pin select for SCL signal
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PIN : Pin number
bits : 0 - 3 (4 bit)
PORT : Port number
bits : 5 - 4 (0 bit)
CONNECT : Connection
bits : 31 - 30 (0 bit)
Enumeration:
1 : Disconnected
Disconnect
0 : Connected
Connect
End of enumeration elements list.
RXD EasyDMA channel - - Data pointer
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PTR : Data pointer
bits : 0 - 30 (31 bit)
TXD EasyDMA channel - - Data pointer
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PTR : Data pointer
bits : 0 - 30 (31 bit)
TWI stopped
address_offset : 0x104 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_STOPPED : TWI stopped
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
TWI error
address_offset : 0x124 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_ERROR : TWI error
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Stop TWI transaction. Must be issued while the TWI master is not suspended.
address_offset : 0x14 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_STOP : Stop TWI transaction. Must be issued while the TWI master is not suspended.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended.
address_offset : 0x148 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_SUSPENDED : Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended.
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Receive sequence started
address_offset : 0x14C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_RXSTARTED : Receive sequence started
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Transmit sequence started
address_offset : 0x150 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_TXSTARTED : Transmit sequence started
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Byte boundary, starting to receive the last byte
address_offset : 0x15C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_LASTRX : Byte boundary, starting to receive the last byte
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Byte boundary, starting to transmit the last byte
address_offset : 0x160 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_LASTTX : Byte boundary, starting to transmit the last byte
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Suspend TWI transaction
address_offset : 0x1C Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_SUSPEND : Suspend TWI transaction
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Resume TWI transaction
address_offset : 0x20 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_RESUME : Resume TWI transaction
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Shortcuts between local events and tasks
address_offset : 0x200 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LASTTX_STARTRX : Shortcut between event LASTTX and task STARTRX
bits : 7 - 6 (0 bit)
Enumeration:
0 : Disabled
Disable shortcut
1 : Enabled
Enable shortcut
End of enumeration elements list.
LASTTX_SUSPEND : Shortcut between event LASTTX and task SUSPEND
bits : 8 - 7 (0 bit)
Enumeration:
0 : Disabled
Disable shortcut
1 : Enabled
Enable shortcut
End of enumeration elements list.
LASTTX_STOP : Shortcut between event LASTTX and task STOP
bits : 9 - 8 (0 bit)
Enumeration:
0 : Disabled
Disable shortcut
1 : Enabled
Enable shortcut
End of enumeration elements list.
LASTRX_STARTTX : Shortcut between event LASTRX and task STARTTX
bits : 10 - 9 (0 bit)
Enumeration:
0 : Disabled
Disable shortcut
1 : Enabled
Enable shortcut
End of enumeration elements list.
LASTRX_SUSPEND : Shortcut between event LASTRX and task SUSPEND
bits : 11 - 10 (0 bit)
Enumeration:
0 : Disabled
Disable shortcut
1 : Enabled
Enable shortcut
End of enumeration elements list.
LASTRX_STOP : Shortcut between event LASTRX and task STOP
bits : 12 - 11 (0 bit)
Enumeration:
0 : Disabled
Disable shortcut
1 : Enabled
Enable shortcut
End of enumeration elements list.
Enable or disable interrupt
address_offset : 0x300 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STOPPED : Enable or disable interrupt for event STOPPED
bits : 1 - 0 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
ERROR : Enable or disable interrupt for event ERROR
bits : 9 - 8 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
SUSPENDED : Enable or disable interrupt for event SUSPENDED
bits : 18 - 17 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
RXSTARTED : Enable or disable interrupt for event RXSTARTED
bits : 19 - 18 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
TXSTARTED : Enable or disable interrupt for event TXSTARTED
bits : 20 - 19 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
LASTRX : Enable or disable interrupt for event LASTRX
bits : 23 - 22 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
LASTTX : Enable or disable interrupt for event LASTTX
bits : 24 - 23 (0 bit)
Enumeration:
0 : Disabled
Disable
1 : Enabled
Enable
End of enumeration elements list.
Enable interrupt
address_offset : 0x304 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STOPPED : Write '1' to enable interrupt for event STOPPED
bits : 1 - 0 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
ERROR : Write '1' to enable interrupt for event ERROR
bits : 9 - 8 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
SUSPENDED : Write '1' to enable interrupt for event SUSPENDED
bits : 18 - 17 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
RXSTARTED : Write '1' to enable interrupt for event RXSTARTED
bits : 19 - 18 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
TXSTARTED : Write '1' to enable interrupt for event TXSTARTED
bits : 20 - 19 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
LASTRX : Write '1' to enable interrupt for event LASTRX
bits : 23 - 22 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
LASTTX : Write '1' to enable interrupt for event LASTTX
bits : 24 - 23 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
Disable interrupt
address_offset : 0x308 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STOPPED : Write '1' to disable interrupt for event STOPPED
bits : 1 - 0 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
ERROR : Write '1' to disable interrupt for event ERROR
bits : 9 - 8 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
SUSPENDED : Write '1' to disable interrupt for event SUSPENDED
bits : 18 - 17 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
RXSTARTED : Write '1' to disable interrupt for event RXSTARTED
bits : 19 - 18 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
TXSTARTED : Write '1' to disable interrupt for event TXSTARTED
bits : 20 - 19 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
LASTRX : Write '1' to disable interrupt for event LASTRX
bits : 23 - 22 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
LASTTX : Write '1' to disable interrupt for event LASTTX
bits : 24 - 23 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
Unspecified - - Pin select for SDA signal
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PIN : Pin number
bits : 0 - 3 (4 bit)
PORT : Port number
bits : 5 - 4 (0 bit)
CONNECT : Connection
bits : 31 - 30 (0 bit)
Enumeration:
1 : Disconnected
Disconnect
0 : Connected
Connect
End of enumeration elements list.
RXD EasyDMA channel - - Maximum number of bytes in receive buffer
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAXCNT : Maximum number of bytes in receive buffer
bits : 0 - 14 (15 bit)
TXD EasyDMA channel - - Maximum number of bytes in transmit buffer
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAXCNT : Maximum number of bytes in transmit buffer
bits : 0 - 14 (15 bit)
Error source
address_offset : 0x4C4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OVERRUN : Overrun error
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotReceived
Error did not occur
1 : Received
Error occurred
End of enumeration elements list.
ANACK : NACK received after sending the address (write '1' to clear)
bits : 1 - 0 (0 bit)
Enumeration:
0 : NotReceived
Error did not occur
1 : Received
Error occurred
End of enumeration elements list.
DNACK : NACK received after sending a data byte (write '1' to clear)
bits : 2 - 1 (0 bit)
Enumeration:
0 : NotReceived
Error did not occur
1 : Received
Error occurred
End of enumeration elements list.
Enable TWIM
address_offset : 0x500 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Enable or disable TWIM
bits : 0 - 2 (3 bit)
Enumeration:
0 : Disabled
Disable TWIM
6 : Enabled
Enable TWIM
End of enumeration elements list.
TWI frequency. Accuracy depends on the HFCLK source selected.
address_offset : 0x524 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FREQUENCY : TWI master clock frequency
bits : 0 - 30 (31 bit)
Enumeration:
0x01980000 : K100
100 kbps
0x04000000 : K250
250 kbps
0x06400000 : K400
400 kbps
End of enumeration elements list.
Address used in the TWI transfer
address_offset : 0x588 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDRESS : Address used in the TWI transfer
bits : 0 - 5 (6 bit)
Start TWI transmit sequence
address_offset : 0x8 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_STARTTX : Start TWI transmit sequence
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
RXD EasyDMA channel - - Number of bytes transferred in the last transaction
address_offset : 0x8 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AMOUNT : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte.
bits : 0 - 14 (15 bit)
TXD EasyDMA channel - - Number of bytes transferred in the last transaction
address_offset : 0x8 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AMOUNT : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte.
bits : 0 - 14 (15 bit)
RXD EasyDMA channel - - EasyDMA list type
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LIST : List type
bits : 0 - 1 (2 bit)
Enumeration:
0 : Disabled
Disable EasyDMA list
1 : ArrayList
Use array list
End of enumeration elements list.
TXD EasyDMA channel - - EasyDMA list type
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LIST : List type
bits : 0 - 1 (2 bit)
Enumeration:
0 : Disabled
Disable EasyDMA list
1 : ArrayList
Use array list
End of enumeration elements list.
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