\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
address_offset : 0x0 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_OUT : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Subscribe configuration for task OUT[n]
address_offset : 0x100 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task OUT[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
address_offset : 0x108 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_SET : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
address_offset : 0x124 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_CLR : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event
address_offset : 0x144C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : Mode
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disabled
Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.
1 : Event
Event mode
3 : Task
Task mode
End of enumeration elements list.
PSEL : GPIO number associated with SET[n], CLR[n], and OUT[n] tasks and IN[n] event
bits : 8 - 11 (4 bit)
PORT : Port number
bits : 13 - 12 (0 bit)
POLARITY : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.
bits : 16 - 16 (1 bit)
Enumeration:
0 : None
Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.
1 : LoToHi
Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.
2 : HiToLo
Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.
3 : Toggle
Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.
End of enumeration elements list.
OUTINIT : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.
bits : 20 - 19 (0 bit)
Enumeration:
0 : Low
Task mode: Initial value of pin before task triggering is low
1 : High
Task mode: Initial value of pin before task triggering is high
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
address_offset : 0x148 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_SET : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Subscribe configuration for task SET[n]
address_offset : 0x160 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task SET[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Event generated from multiple input GPIO pins with SENSE mechanism enabled
address_offset : 0x17C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_PORT : Event generated from multiple input GPIO pins with SENSE mechanism enabled
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
address_offset : 0x18 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_OUT : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Subscribe configuration for task OUT[n]
address_offset : 0x184 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task OUT[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
address_offset : 0x18C Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_SET : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
address_offset : 0x18C Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_CLR : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event
address_offset : 0x1968 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : Mode
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disabled
Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.
1 : Event
Event mode
3 : Task
Task mode
End of enumeration elements list.
PSEL : GPIO number associated with SET[n], CLR[n], and OUT[n] tasks and IN[n] event
bits : 8 - 11 (4 bit)
PORT : Port number
bits : 13 - 12 (0 bit)
POLARITY : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.
bits : 16 - 16 (1 bit)
Enumeration:
0 : None
Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.
1 : LoToHi
Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.
2 : HiToLo
Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.
3 : Toggle
Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.
End of enumeration elements list.
OUTINIT : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.
bits : 20 - 19 (0 bit)
Enumeration:
0 : Low
Task mode: Initial value of pin before task triggering is low
1 : High
Task mode: Initial value of pin before task triggering is high
End of enumeration elements list.
Description collection: Subscribe configuration for task CLR[n]
address_offset : 0x1C0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task CLR[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
address_offset : 0x1D4 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_SET : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event
address_offset : 0x1E88 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : Mode
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disabled
Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.
1 : Event
Event mode
3 : Task
Task mode
End of enumeration elements list.
PSEL : GPIO number associated with SET[n], CLR[n], and OUT[n] tasks and IN[n] event
bits : 8 - 11 (4 bit)
PORT : Port number
bits : 13 - 12 (0 bit)
POLARITY : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.
bits : 16 - 16 (1 bit)
Enumeration:
0 : None
Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.
1 : LoToHi
Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.
2 : HiToLo
Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.
3 : Toggle
Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.
End of enumeration elements list.
OUTINIT : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.
bits : 20 - 19 (0 bit)
Enumeration:
0 : Low
Task mode: Initial value of pin before task triggering is low
1 : High
Task mode: Initial value of pin before task triggering is high
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
address_offset : 0x1F8 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_CLR : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Publish configuration for event PORT
address_offset : 0x1FC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that event PORT will publish to.
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable publishing
1 : Enabled
Enable publishing
End of enumeration elements list.
Description collection: Event generated from pin specified in CONFIG[n].PSEL
address_offset : 0x200 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_IN : Event generated from pin specified in CONFIG[n].PSEL
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Description collection: Subscribe configuration for task OUT[n]
address_offset : 0x20C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task OUT[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Subscribe configuration for task SET[n]
address_offset : 0x214 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task SET[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
address_offset : 0x220 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_SET : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event
address_offset : 0x23AC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : Mode
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disabled
Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.
1 : Event
Event mode
3 : Task
Task mode
End of enumeration elements list.
PSEL : GPIO number associated with SET[n], CLR[n], and OUT[n] tasks and IN[n] event
bits : 8 - 11 (4 bit)
PORT : Port number
bits : 13 - 12 (0 bit)
POLARITY : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.
bits : 16 - 16 (1 bit)
Enumeration:
0 : None
Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.
1 : LoToHi
Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.
2 : HiToLo
Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.
3 : Toggle
Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.
End of enumeration elements list.
OUTINIT : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.
bits : 20 - 19 (0 bit)
Enumeration:
0 : Low
Task mode: Initial value of pin before task triggering is low
1 : High
Task mode: Initial value of pin before task triggering is high
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
address_offset : 0x268 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_CLR : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
address_offset : 0x28 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_OUT : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event
address_offset : 0x28D4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : Mode
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disabled
Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.
1 : Event
Event mode
3 : Task
Task mode
End of enumeration elements list.
PSEL : GPIO number associated with SET[n], CLR[n], and OUT[n] tasks and IN[n] event
bits : 8 - 11 (4 bit)
PORT : Port number
bits : 13 - 12 (0 bit)
POLARITY : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.
bits : 16 - 16 (1 bit)
Enumeration:
0 : None
Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.
1 : LoToHi
Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.
2 : HiToLo
Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.
3 : Toggle
Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.
End of enumeration elements list.
OUTINIT : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.
bits : 20 - 19 (0 bit)
Enumeration:
0 : Low
Task mode: Initial value of pin before task triggering is low
1 : High
Task mode: Initial value of pin before task triggering is high
End of enumeration elements list.
Description collection: Subscribe configuration for task OUT[n]
address_offset : 0x298 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task OUT[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Subscribe configuration for task CLR[n]
address_offset : 0x2A4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task CLR[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Subscribe configuration for task SET[n]
address_offset : 0x2CC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task SET[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
address_offset : 0x2DC Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_CLR : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event
address_offset : 0x2E00 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : Mode
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disabled
Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.
1 : Event
Event mode
3 : Task
Task mode
End of enumeration elements list.
PSEL : GPIO number associated with SET[n], CLR[n], and OUT[n] tasks and IN[n] event
bits : 8 - 11 (4 bit)
PORT : Port number
bits : 13 - 12 (0 bit)
POLARITY : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.
bits : 16 - 16 (1 bit)
Enumeration:
0 : None
Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.
1 : LoToHi
Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.
2 : HiToLo
Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.
3 : Toggle
Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.
End of enumeration elements list.
OUTINIT : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.
bits : 20 - 19 (0 bit)
Enumeration:
0 : Low
Task mode: Initial value of pin before task triggering is low
1 : High
Task mode: Initial value of pin before task triggering is high
End of enumeration elements list.
Description collection: Publish configuration for event IN[n]
address_offset : 0x300 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that event IN[n] will publish to.
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable publishing
1 : Enabled
Enable publishing
End of enumeration elements list.
Description collection: Event generated from pin specified in CONFIG[n].PSEL
address_offset : 0x304 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_IN : Event generated from pin specified in CONFIG[n].PSEL
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Enable interrupt
address_offset : 0x304 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IN0 : Write '1' to enable interrupt for event IN[0]
bits : 0 - -1 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
IN1 : Write '1' to enable interrupt for event IN[1]
bits : 1 - 0 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
IN2 : Write '1' to enable interrupt for event IN[2]
bits : 2 - 1 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
IN3 : Write '1' to enable interrupt for event IN[3]
bits : 3 - 2 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
IN4 : Write '1' to enable interrupt for event IN[4]
bits : 4 - 3 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
IN5 : Write '1' to enable interrupt for event IN[5]
bits : 5 - 4 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
IN6 : Write '1' to enable interrupt for event IN[6]
bits : 6 - 5 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
IN7 : Write '1' to enable interrupt for event IN[7]
bits : 7 - 6 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
PORT : Write '1' to enable interrupt for event PORT
bits : 31 - 30 (0 bit)
Enumeration: ( write )
1 : Set
Enable
End of enumeration elements list.
Disable interrupt
address_offset : 0x308 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IN0 : Write '1' to disable interrupt for event IN[0]
bits : 0 - -1 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
IN1 : Write '1' to disable interrupt for event IN[1]
bits : 1 - 0 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
IN2 : Write '1' to disable interrupt for event IN[2]
bits : 2 - 1 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
IN3 : Write '1' to disable interrupt for event IN[3]
bits : 3 - 2 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
IN4 : Write '1' to disable interrupt for event IN[4]
bits : 4 - 3 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
IN5 : Write '1' to disable interrupt for event IN[5]
bits : 5 - 4 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
IN6 : Write '1' to disable interrupt for event IN[6]
bits : 6 - 5 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
IN7 : Write '1' to disable interrupt for event IN[7]
bits : 7 - 6 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
PORT : Write '1' to disable interrupt for event PORT
bits : 31 - 30 (0 bit)
Enumeration: ( write )
1 : Clear
Disable
End of enumeration elements list.
Description collection: Subscribe configuration for task OUT[n]
address_offset : 0x328 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task OUT[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
address_offset : 0x354 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_CLR : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Subscribe configuration for task SET[n]
address_offset : 0x388 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task SET[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Subscribe configuration for task CLR[n]
address_offset : 0x38C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task CLR[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Subscribe configuration for task OUT[n]
address_offset : 0x3BC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task OUT[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
address_offset : 0x3C Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_OUT : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
address_offset : 0x3D0 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_CLR : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
address_offset : 0x4 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_OUT : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Event generated from pin specified in CONFIG[n].PSEL
address_offset : 0x40C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_IN : Event generated from pin specified in CONFIG[n].PSEL
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Description collection: Subscribe configuration for task SET[n]
address_offset : 0x448 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task SET[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Subscribe configuration for task OUT[n]
address_offset : 0x454 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task OUT[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Subscribe configuration for task CLR[n]
address_offset : 0x478 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task CLR[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Publish configuration for event IN[n]
address_offset : 0x484 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that event IN[n] will publish to.
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable publishing
1 : Enabled
Enable publishing
End of enumeration elements list.
Description collection: Subscribe configuration for task OUT[n]
address_offset : 0x4F0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task OUT[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Latency selection for Event mode (MODE=Event) with rising or falling edge detection on the pin.
address_offset : 0x504 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LATENCY : Latency setting
bits : 0 - -1 (0 bit)
Enumeration:
0 : LowPower
Low power setting, for signals with minimum hold time tGPIOTE,HOLD,LP; refer to Electrical specification section
1 : LowLatency
Low latency setting, for signals with minimum hold time tGPIOTE,HOLD,LL; refer to Electrical specification section
End of enumeration elements list.
Description collection: Subscribe configuration for task SET[n]
address_offset : 0x50C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task SET[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Event generated from pin specified in CONFIG[n].PSEL
address_offset : 0x518 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_IN : Event generated from pin specified in CONFIG[n].PSEL
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
address_offset : 0x54 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_OUT : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Subscribe configuration for task CLR[n]
address_offset : 0x568 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task CLR[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Subscribe configuration for task SET[n]
address_offset : 0x5D4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task SET[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
address_offset : 0x60 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_SET : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Publish configuration for event IN[n]
address_offset : 0x60C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that event IN[n] will publish to.
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable publishing
1 : Enabled
Enable publishing
End of enumeration elements list.
Description collection: Event generated from pin specified in CONFIG[n].PSEL
address_offset : 0x628 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_IN : Event generated from pin specified in CONFIG[n].PSEL
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Description collection: Subscribe configuration for task CLR[n]
address_offset : 0x65C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task CLR[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Subscribe configuration for task SET[n]
address_offset : 0x6A0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task SET[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
address_offset : 0x70 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_OUT : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Event generated from pin specified in CONFIG[n].PSEL
address_offset : 0x73C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_IN : Event generated from pin specified in CONFIG[n].PSEL
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Description collection: Subscribe configuration for task CLR[n]
address_offset : 0x754 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task CLR[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Publish configuration for event IN[n]
address_offset : 0x798 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that event IN[n] will publish to.
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable publishing
1 : Enabled
Enable publishing
End of enumeration elements list.
Description collection: Subscribe configuration for task CLR[n]
address_offset : 0x850 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that task CLR[n] will subscribe to
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable subscription
1 : Enabled
Enable subscription
End of enumeration elements list.
Description collection: Event generated from pin specified in CONFIG[n].PSEL
address_offset : 0x854 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_IN : Event generated from pin specified in CONFIG[n].PSEL
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Description collection: Publish configuration for event IN[n]
address_offset : 0x928 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that event IN[n] will publish to.
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable publishing
1 : Enabled
Enable publishing
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
address_offset : 0x94 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_SET : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Event generated from pin specified in CONFIG[n].PSEL
address_offset : 0x970 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EVENTS_IN : Event generated from pin specified in CONFIG[n].PSEL
bits : 0 - -1 (0 bit)
Enumeration:
0 : NotGenerated
Event not generated
1 : Generated
Event generated
End of enumeration elements list.
Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event
address_offset : 0xA20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : Mode
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disabled
Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.
1 : Event
Event mode
3 : Task
Task mode
End of enumeration elements list.
PSEL : GPIO number associated with SET[n], CLR[n], and OUT[n] tasks and IN[n] event
bits : 8 - 11 (4 bit)
PORT : Port number
bits : 13 - 12 (0 bit)
POLARITY : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.
bits : 16 - 16 (1 bit)
Enumeration:
0 : None
Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.
1 : LoToHi
Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.
2 : HiToLo
Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.
3 : Toggle
Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.
End of enumeration elements list.
OUTINIT : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.
bits : 20 - 19 (0 bit)
Enumeration:
0 : Low
Task mode: Initial value of pin before task triggering is low
1 : High
Task mode: Initial value of pin before task triggering is high
End of enumeration elements list.
Description collection: Publish configuration for event IN[n]
address_offset : 0xABC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that event IN[n] will publish to.
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable publishing
1 : Enabled
Enable publishing
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
address_offset : 0xC Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_OUT : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
address_offset : 0xC0 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_CLR : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Publish configuration for event IN[n]
address_offset : 0xC54 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that event IN[n] will publish to.
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable publishing
1 : Enabled
Enable publishing
End of enumeration elements list.
Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
address_offset : 0xCC Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TASKS_SET : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.
bits : 0 - -1 (0 bit)
Enumeration:
1 : Trigger
Trigger task
End of enumeration elements list.
Description collection: Publish configuration for event IN[n]
address_offset : 0xDF0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHIDX : DPPI channel that event IN[n] will publish to.
bits : 0 - 6 (7 bit)
EN :
bits : 31 - 30 (0 bit)
Enumeration:
0 : Disabled
Disable publishing
1 : Enabled
Enable publishing
End of enumeration elements list.
Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event
address_offset : 0xF34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : Mode
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disabled
Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.
1 : Event
Event mode
3 : Task
Task mode
End of enumeration elements list.
PSEL : GPIO number associated with SET[n], CLR[n], and OUT[n] tasks and IN[n] event
bits : 8 - 11 (4 bit)
PORT : Port number
bits : 13 - 12 (0 bit)
POLARITY : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.
bits : 16 - 16 (1 bit)
Enumeration:
0 : None
Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.
1 : LoToHi
Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.
2 : HiToLo
Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.
3 : Toggle
Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.
End of enumeration elements list.
OUTINIT : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.
bits : 20 - 19 (0 bit)
Enumeration:
0 : Low
Task mode: Initial value of pin before task triggering is low
1 : High
Task mode: Initial value of pin before task triggering is high
End of enumeration elements list.
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