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CMP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

Registers

CMP0CR

CMP1CR

CMPSR


CMP0CR

Comparator0 Control Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMP0CR CMP0CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN IE HYSEN CN0

EN : Comparator0 Enable 1 = Enable 0 = Disable Comparator0 output needs wait 10 us stable time after CMP0EN is set
bits : 0 - 0 (1 bit)
access : read-write

IE : Comparator0 Interrupt Enable 1 = Enable comparator0 interrupt function 0 = Disable comparator0 interrupt function Interrupt is generated if CMP0IE bit is set to 1 after comparator0 conversion finished.
bits : 1 - 1 (1 bit)
access : read-write

HYSEN : CMP0 Hysterisis Enable 1 = Enable comparator0 Hysterisis function; the typical range is 20mV. 0 = Disable comparator0 Hysterisis function (Default).
bits : 2 - 2 (1 bit)
access : read-write

CN0 : Comparator0 negative input select 1 = The internal comparator reference voltage (Vref=1.2V) is selected as the negative comparator input 0 = The comparator0 reference pin CPN0 is selected as the negative comparator input
bits : 4 - 4 (1 bit)
access : read-write


CMP1CR

Comparator1 Control Register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMP1CR CMP1CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN IE HYSEN CN1

EN : Comparator1 Enable 1 = Enable 0 = Disable Comparator1 output needs wait 10 us stable time after CMP1EN is set
bits : 0 - 0 (1 bit)
access : read-write

IE : Comparator1 Interrupt Enable 1 = Enable Comparator1 interrupt function 0 = Disable Comparator1 interrupt function Interrupt is generated if CMP1IE bit is set to 1 after comparator1 conversion finished.
bits : 1 - 1 (1 bit)
access : read-write

HYSEN : Comparator1 Hysterisis Enable 1 = Enable comparator1 Hysterisis function; the typical range is 20mV. 0 = Disable comparator1 Hysterisis function (Default).
bits : 2 - 2 (1 bit)
access : read-write

CN1 : Comparator1 negative input select 1 = The internal comparator reference voltage (Vref=1.2V) is selected as the negative comparator input 0 = The comparator1 reference pin CPN1 is selected as the negative comparator input
bits : 4 - 4 (1 bit)
access : read-write


CMPSR

Comparator Channel Selection Enable Register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPSR CMPSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPF0 CMPF1 CO0 CO1

CMPF0 : Comparator0 Flag This bit is set by hardware whenever the comparator0 output changes state. This will cause an interrupt if CMP0IE set. Write 1 to clear this bit to zero.
bits : 0 - 0 (1 bit)
access : read-write

CMPF1 : Comparator1 Flag This bit is set by hardware whenever the comparator1 output changes state. This will cause an interrupt if CMP1IE set. Write 1 to clear this bit to zero.
bits : 1 - 1 (1 bit)
access : read-write

CO0 : Comparator0 Output Synchronized to the APB clock to allow reading by software. Cleared when the comparator is disabled (CMP0EN = 0).
bits : 2 - 2 (1 bit)
access : read-only

CO1 : Comparator1 Output Synchronized to the APB clock to allow reading by software. Cleared when the comparator is disabled (CMP1EN = 0).
bits : 3 - 3 (1 bit)
access : read-only



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